Commit 33a9a5ab authored by Tianci.Yin's avatar Tianci.Yin Committed by Alex Deucher

drm/amdgpu: remove memory training p2c buffer reservation(V2)

IP discovery TMR(occupied the top VRAM with size DISCOVERY_TMR_SIZE)
has been reserved, and the p2c buffer is in the range of this TMR, so
the p2c buffer reservation is unnecessary.
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarKevin Wang <kevin1.wang@amd.com>
Reviewed-by: default avatarXiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: default avatarTianci.Yin <tianci.yin@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8d40002f
...@@ -202,7 +202,6 @@ struct psp_memory_training_context { ...@@ -202,7 +202,6 @@ struct psp_memory_training_context {
/*vram offset of the p2c training data*/ /*vram offset of the p2c training data*/
u64 p2c_train_data_offset; u64 p2c_train_data_offset;
struct amdgpu_bo *p2c_bo;
/*vram offset of the c2p training data*/ /*vram offset of the c2p training data*/
u64 c2p_train_data_offset; u64 c2p_train_data_offset;
......
...@@ -1714,9 +1714,6 @@ static int amdgpu_ttm_training_reserve_vram_fini(struct amdgpu_device *adev) ...@@ -1714,9 +1714,6 @@ static int amdgpu_ttm_training_reserve_vram_fini(struct amdgpu_device *adev)
amdgpu_bo_free_kernel(&ctx->c2p_bo, NULL, NULL); amdgpu_bo_free_kernel(&ctx->c2p_bo, NULL, NULL);
ctx->c2p_bo = NULL; ctx->c2p_bo = NULL;
amdgpu_bo_free_kernel(&ctx->p2c_bo, NULL, NULL);
ctx->p2c_bo = NULL;
return 0; return 0;
} }
...@@ -1755,17 +1752,6 @@ static int amdgpu_ttm_training_reserve_vram_init(struct amdgpu_device *adev) ...@@ -1755,17 +1752,6 @@ static int amdgpu_ttm_training_reserve_vram_init(struct amdgpu_device *adev)
ctx->p2c_train_data_offset, ctx->p2c_train_data_offset,
ctx->c2p_train_data_offset); ctx->c2p_train_data_offset);
ret = amdgpu_bo_create_kernel_at(adev,
ctx->p2c_train_data_offset,
ctx->train_data_size,
AMDGPU_GEM_DOMAIN_VRAM,
&ctx->p2c_bo,
NULL);
if (ret) {
DRM_ERROR("alloc p2c_bo failed(%d)!\n", ret);
goto Err_out;
}
ret = amdgpu_bo_create_kernel_at(adev, ret = amdgpu_bo_create_kernel_at(adev,
ctx->c2p_train_data_offset, ctx->c2p_train_data_offset,
ctx->train_data_size, ctx->train_data_size,
...@@ -1774,15 +1760,12 @@ static int amdgpu_ttm_training_reserve_vram_init(struct amdgpu_device *adev) ...@@ -1774,15 +1760,12 @@ static int amdgpu_ttm_training_reserve_vram_init(struct amdgpu_device *adev)
NULL); NULL);
if (ret) { if (ret) {
DRM_ERROR("alloc c2p_bo failed(%d)!\n", ret); DRM_ERROR("alloc c2p_bo failed(%d)!\n", ret);
goto Err_out; amdgpu_ttm_training_reserve_vram_fini(adev);
return ret;
} }
ctx->init = PSP_MEM_TRAIN_RESERVE_SUCCESS; ctx->init = PSP_MEM_TRAIN_RESERVE_SUCCESS;
return 0; return 0;
Err_out:
amdgpu_ttm_training_reserve_vram_fini(adev);
return ret;
} }
/** /**
......
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