Commit 3480a142 authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://ppc.bkbits.net/for-linus-ppc

into home.osdl.org:/home/torvalds/v2.5/linux
parents 19d4808f bd385290
......@@ -57,14 +57,5 @@ config FCC_QS6612
bool "QS6612"
endchoice
comment "Generic MPC8260 Options"
config DCACHE_DISABLE
bool "Disable data cache"
help
This option allows you to run the kernel with data cache disabled.
Say Y if you experience CPM lock-ups.
endmenu
......@@ -65,7 +65,13 @@ uImage: vmlinux
$(Q)$(MAKE) $(build)=$(boot)/images $(boot)/images/$@
define archhelp
@echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/images/zImage.*)'
@echo ' uImage - Create a bootable image for U-Boot / PPCBoot'
@echo ' install - Install kernel using'
@echo ' (your) ~/bin/installkernel or'
@echo ' (distribution) /sbin/installkernel or'
@echo ' install to $$(INSTALL_PATH) and run lilo'
@echo ' *_defconfig - Select default config from arch/$(ARCH)/ppc/configs'
endef
archclean:
......
......@@ -3,6 +3,8 @@
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/serial.h>
#include <linux/serialP.h>
#include <linux/serial_reg.h>
#include <asm/serial.h>
......
......@@ -468,11 +468,6 @@ CONFIG_SCC_CONSOLE=y
CONFIG_FCC2_ENET=y
# CONFIG_FCC3_ENET is not set
#
# Generic MPC8260 Options
#
CONFIG_DCACHE_DISABLE=y
#
# USB support
#
......
......@@ -460,11 +460,6 @@ CONFIG_SCC_ENET=y
#
CONFIG_SCC_CONSOLE=y
#
# Generic MPC8260 Options
#
# CONFIG_DCACHE_DISABLE is not set
#
# USB support
#
......
......@@ -75,11 +75,7 @@ _GLOBAL(__setup_cpu_745x)
setup_common_caches:
mfspr r11,HID0
andi. r0,r11,HID0_DCE
#ifdef CONFIG_DCACHE_DISABLE
ori r11,r11,HID0_ICE
#else
ori r11,r11,HID0_ICE|HID0_DCE
#endif
ori r8,r11,HID0_ICFI
bne 1f /* don't invalidate the D-cache */
ori r8,r8,HID0_DCI /* unless it wasn't enabled */
......
......@@ -123,7 +123,7 @@ EXPORT_SYMBOL(strncmp);
EXPORT_SYMBOL(strcasecmp);
EXPORT_SYMBOL(__div64_32);
/* EXPORT_SYMBOL(csum_partial); already in net/netsyms.c */
EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_partial_copy_generic);
EXPORT_SYMBOL(ip_fast_csum);
EXPORT_SYMBOL(csum_tcpudp_magic);
......
......@@ -65,6 +65,7 @@ union thread_union init_thread_union
/* initial task structure */
struct task_struct init_task = INIT_TASK(init_task);
EXPORT_SYMBOL(init_task);
/* only used to get secondary processor up */
struct task_struct *current_set[NR_CPUS] = {&init_task, };
......
......@@ -171,12 +171,12 @@ int show_cpuinfo(struct seq_file *m, void *v)
return 0;
pvr = cpu_data[i].pvr;
lpj = cpu_data[i].loops_per_jiffy;
seq_printf(m, "processor\t: %d\n", i);
#else
pvr = mfspr(PVR);
lpj = loops_per_jiffy;
#endif
seq_printf(m, "processor\t: %d\n", i);
seq_printf(m, "cpu\t\t: ");
if (cur_cpu_spec[i]->pvr_mask)
......
......@@ -59,10 +59,13 @@ static void add_node(struct device_node *np, struct proc_dir_entry *de)
* Unfortunately proc_register puts each new entry
* at the beginning of the list. So we rearrange them.
*/
ent = create_proc_read_entry(pp->name, S_IRUGO, de,
property_read_proc, pp);
ent = create_proc_read_entry(pp->name, strncmp(pp->name, "security-", 9) ?
S_IRUGO : S_IRUSR, de, property_read_proc, pp);
if (ent == 0)
break;
if (!strncmp(pp->name, "security-", 9))
ent->size = 0; /* don't leak number of password chars */
else
ent->size = pp->length;
*lastp = ent;
lastp = &ent->next;
......
......@@ -121,7 +121,7 @@
#define MPC10X_MCTLR_EXT_MEM_START_2 0x8c /* Banks 4-7 */
#define MPC10X_MCTLR_MEM_END_1 0x90 /* Banks 0-3 */
#define MPC10X_MCTLR_MEM_END_2i 0x94 /* Banks 4-7 */
#define MPC10X_MCTLR_MEM_END_2 0x94 /* Banks 4-7 */
#define MPC10X_MCTLR_EXT_MEM_END_1 0x98 /* Banks 0-3 */
#define MPC10X_MCTLR_EXT_MEM_END_2 0x9c /* Banks 4-7 */
......
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