drm/nouveau/kms/nv50-: convert wndw sema_set() to new push macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drivers/gpu/drm/nouveau/dispnv50/base.h

@@ -11,7 +11,7 @@ int base507c_acquire(struct nv50_wndw *, struct nv50_wndw_atom *,
 		     struct nv50_head_atom *);
 void base507c_release(struct nv50_wndw *, struct nv50_wndw_atom *,
 		      struct nv50_head_atom *);
-void base507c_sema_set(struct nv50_wndw *, struct nv50_wndw_atom *);
+int base507c_sema_set(struct nv50_wndw *, struct nv50_wndw_atom *);
 void base507c_sema_clr(struct nv50_wndw *);
 void base507c_ntfy_set(struct nv50_wndw *, struct nv50_wndw_atom *);
 void base507c_ntfy_clr(struct nv50_wndw *);

drivers/gpu/drm/nouveau/dispnv50/base507c.c

@@ -23,6 +23,7 @@
 
 #include <nvif/cl507c.h>
 #include <nvif/event.h>
+#include <nvif/push507c.h>
 #include <nvif/timer.h>
 
 #include <drm/drm_atomic_helper.h>
@@ -163,18 +164,20 @@ base507c_sema_clr(struct nv50_wndw *wndw)
 	}
 }
 
-void
+int
 base507c_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
 {
-	u32 *push;
-	if ((push = evo_wait(&wndw->wndw, 5))) {
-		evo_mthd(push, 0x0088, 4);
-		evo_data(push, asyw->sema.offset);
-		evo_data(push, asyw->sema.acquire);
-		evo_data(push, asyw->sema.release);
-		evo_data(push, asyw->sema.handle);
-		evo_kick(push, &wndw->wndw);
-	}
+	struct nvif_push *push = wndw->wndw.push;
+	int ret;
+
+	if ((ret = PUSH_WAIT(push, 5)))
+		return ret;
+
+	PUSH_NVSQ(push, NV507C, 0x0088, asyw->sema.offset,
+				0x008c, asyw->sema.acquire,
+				0x0090, asyw->sema.release,
+				0x0094, asyw->sema.handle);
+	return 0;
 }
 
 void

drivers/gpu/drm/nouveau/dispnv50/wndw.h

@@ -57,7 +57,7 @@ struct nv50_wndw_func {
 	void (*prepare)(struct nv50_wndw *, struct nv50_head_atom *asyh,
 			struct nv50_wndw_atom *asyw);
 
-	void (*sema_set)(struct nv50_wndw *, struct nv50_wndw_atom *);
+	int (*sema_set)(struct nv50_wndw *, struct nv50_wndw_atom *);
 	void (*sema_clr)(struct nv50_wndw *);
 	void (*ntfy_reset)(struct nouveau_bo *, u32 offset);
 	void (*ntfy_set)(struct nv50_wndw *, struct nv50_wndw_atom *);
@@ -115,7 +115,7 @@ int wndwc37e_acquire(struct nv50_wndw *, struct nv50_wndw_atom *,
 		     struct nv50_head_atom *);
 void wndwc37e_release(struct nv50_wndw *, struct nv50_wndw_atom *,
 		      struct nv50_head_atom *);
-void wndwc37e_sema_set(struct nv50_wndw *, struct nv50_wndw_atom *);
+int wndwc37e_sema_set(struct nv50_wndw *, struct nv50_wndw_atom *);
 void wndwc37e_sema_clr(struct nv50_wndw *);
 void wndwc37e_ntfy_set(struct nv50_wndw *, struct nv50_wndw_atom *);
 void wndwc37e_ntfy_clr(struct nv50_wndw *);

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

@@ -27,6 +27,7 @@
 #include <nouveau_bo.h>
 
 #include <nvif/clc37e.h>
+#include <nvif/pushc37b.h>
 
 static void
 wndwc37e_csc_clr(struct nv50_wndw *wndw)
@@ -185,18 +186,20 @@ wndwc37e_sema_clr(struct nv50_wndw *wndw)
 	}
 }
 
-void
+int
 wndwc37e_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
 {
-	u32 *push;
-	if ((push = evo_wait(&wndw->wndw, 5))) {
-		evo_mthd(push, 0x020c, 4);
-		evo_data(push, asyw->sema.offset);
-		evo_data(push, asyw->sema.acquire);
-		evo_data(push, asyw->sema.release);
-		evo_data(push, asyw->sema.handle);
-		evo_kick(push, &wndw->wndw);
-	}
+	struct nvif_push *push = wndw->wndw.push;
+	int ret;
+
+	if ((ret = PUSH_WAIT(push, 5)))
+		return ret;
+
+	PUSH_NVSQ(push, NVC37E, 0x020c, asyw->sema.offset,
+				0x0210, asyw->sema.acquire,
+				0x0214, asyw->sema.release,
+				0x0218, asyw->sema.handle);
+	return 0;
 }
 
 void

drivers/gpu/drm/nouveau/include/nvif/push507c.h

+#ifndef __NVIF_PUSH507C_H__
+#define __NVIF_PUSH507C_H__
+#include <nvif/push.h>
+
+#include <nvhw/class/cl507c.h>
+
+#define PUSH_HDR(p,m,c) do {                                                    \
+        PUSH_ASSERT(!((m) & ~DRF_SMASK(NV507C_DMA_METHOD_OFFSET)), "mthd");     \
+        PUSH_ASSERT(!((c) & ~DRF_MASK(NV507C_DMA_METHOD_COUNT)), "size");       \
+        PUSH_DATA__((p), NVDEF(NV507C, DMA, OPCODE, METHOD) |                   \
+			 NVVAL(NV507C, DMA, METHOD_COUNT, (c)) |                \
+			 NVVAL(NV507C, DMA, METHOD_OFFSET, (m) >> 2),           \
+		    " mthd 0x%04x size %d - %s", (u32)(m), (u32)(c), __func__); \
+} while(0)
+
+#define PUSH_MTHD_HDR(p,s,m,c) PUSH_HDR(p,m,c)
+#define PUSH_MTHD_INC 4:4
+
+#define PUSH_JUMP(p,o) do {                                                 \
+        PUSH_ASSERT(!((o) & ~DRF_SMASK(NV507C_DMA_JUMP_OFFSET)), "offset"); \
+	PUSH_DATA__((p), NVDEF(NV507C, DMA, OPCODE, JUMP) |                 \
+			 NVVAL(NV507C, DMA, JUMP_OFFSET, (o) >> 2),         \
+		    "jump 0x%08x - %s", (u32)(o), __func__);                \
+} while(0)
+#endif