Commit 34fe804e authored by David S. Miller's avatar David S. Miller

Merge branch 'sparx5-ptp'

Horatiu Vultur says:

====================
net: sparx5: Add PTP Hardware Clock support

Add support for PTP Hardware Clock (PHC) for sparx5.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents a972711d 608111fc
...@@ -53,12 +53,14 @@ properties: ...@@ -53,12 +53,14 @@ properties:
items: items:
- description: register based extraction - description: register based extraction
- description: frame dma based extraction - description: frame dma based extraction
- description: ptp interrupt
interrupt-names: interrupt-names:
minItems: 1 minItems: 1
items: items:
- const: xtr - const: xtr
- const: fdma - const: fdma
- const: ptp
resets: resets:
items: items:
......
...@@ -471,9 +471,10 @@ switch: switch@0x600000000 { ...@@ -471,9 +471,10 @@ switch: switch@0x600000000 {
<0x6 0x10004000 0x7fc000>, <0x6 0x10004000 0x7fc000>,
<0x6 0x11010000 0xaf0000>; <0x6 0x11010000 0xaf0000>;
reg-names = "cpu", "dev", "gcb"; reg-names = "cpu", "dev", "gcb";
interrupt-names = "xtr", "fdma"; interrupt-names = "xtr", "fdma", "ptp";
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
resets = <&reset 0>; resets = <&reset 0>;
reset-names = "switch"; reset-names = "switch";
}; };
......
...@@ -7,4 +7,5 @@ obj-$(CONFIG_SPARX5_SWITCH) += sparx5-switch.o ...@@ -7,4 +7,5 @@ obj-$(CONFIG_SPARX5_SWITCH) += sparx5-switch.o
sparx5-switch-objs := sparx5_main.o sparx5_packet.o \ sparx5-switch-objs := sparx5_main.o sparx5_packet.o \
sparx5_netdev.o sparx5_phylink.o sparx5_port.o sparx5_mactable.o sparx5_vlan.o \ sparx5_netdev.o sparx5_phylink.o sparx5_port.o sparx5_mactable.o sparx5_vlan.o \
sparx5_switchdev.o sparx5_calendar.o sparx5_ethtool.o sparx5_fdma.o sparx5_switchdev.o sparx5_calendar.o sparx5_ethtool.o sparx5_fdma.o \
sparx5_ptp.o
...@@ -1183,6 +1183,39 @@ static void sparx5_config_port_stats(struct sparx5 *sparx5, int portno) ...@@ -1183,6 +1183,39 @@ static void sparx5_config_port_stats(struct sparx5 *sparx5, int portno)
sparx5, ANA_AC_PORT_STAT_CFG(portno, SPX5_PORT_POLICER_DROPS)); sparx5, ANA_AC_PORT_STAT_CFG(portno, SPX5_PORT_POLICER_DROPS));
} }
static int sparx5_get_ts_info(struct net_device *dev,
struct ethtool_ts_info *info)
{
struct sparx5_port *port = netdev_priv(dev);
struct sparx5 *sparx5 = port->sparx5;
struct sparx5_phc *phc;
if (!sparx5->ptp)
return ethtool_op_get_ts_info(dev, info);
phc = &sparx5->phc[SPARX5_PHC_PORT];
info->phc_index = phc->clock ? ptp_clock_index(phc->clock) : -1;
if (info->phc_index == -1) {
info->so_timestamping |= SOF_TIMESTAMPING_TX_SOFTWARE |
SOF_TIMESTAMPING_RX_SOFTWARE |
SOF_TIMESTAMPING_SOFTWARE;
return 0;
}
info->so_timestamping |= SOF_TIMESTAMPING_TX_SOFTWARE |
SOF_TIMESTAMPING_RX_SOFTWARE |
SOF_TIMESTAMPING_SOFTWARE |
SOF_TIMESTAMPING_TX_HARDWARE |
SOF_TIMESTAMPING_RX_HARDWARE |
SOF_TIMESTAMPING_RAW_HARDWARE;
info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON) |
BIT(HWTSTAMP_TX_ONESTEP_SYNC);
info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
BIT(HWTSTAMP_FILTER_ALL);
return 0;
}
const struct ethtool_ops sparx5_ethtool_ops = { const struct ethtool_ops sparx5_ethtool_ops = {
.get_sset_count = sparx5_get_sset_count, .get_sset_count = sparx5_get_sset_count,
.get_strings = sparx5_get_sset_strings, .get_strings = sparx5_get_sset_strings,
...@@ -1194,6 +1227,7 @@ const struct ethtool_ops sparx5_ethtool_ops = { ...@@ -1194,6 +1227,7 @@ const struct ethtool_ops sparx5_ethtool_ops = {
.get_eth_mac_stats = sparx5_get_eth_mac_stats, .get_eth_mac_stats = sparx5_get_eth_mac_stats,
.get_eth_ctrl_stats = sparx5_get_eth_mac_ctrl_stats, .get_eth_ctrl_stats = sparx5_get_eth_mac_ctrl_stats,
.get_rmon_stats = sparx5_get_eth_rmon_stats, .get_rmon_stats = sparx5_get_eth_rmon_stats,
.get_ts_info = sparx5_get_ts_info,
}; };
int sparx_stats_init(struct sparx5 *sparx5) int sparx_stats_init(struct sparx5 *sparx5)
......
...@@ -240,6 +240,8 @@ static bool sparx5_fdma_rx_get_frame(struct sparx5 *sparx5, struct sparx5_rx *rx ...@@ -240,6 +240,8 @@ static bool sparx5_fdma_rx_get_frame(struct sparx5 *sparx5, struct sparx5_rx *rx
skb_pull(skb, IFH_LEN * sizeof(u32)); skb_pull(skb, IFH_LEN * sizeof(u32));
if (likely(!(skb->dev->features & NETIF_F_RXFCS))) if (likely(!(skb->dev->features & NETIF_F_RXFCS)))
skb_trim(skb, skb->len - ETH_FCS_LEN); skb_trim(skb, skb->len - ETH_FCS_LEN);
sparx5_ptp_rxtstamp(sparx5, skb, fi.timestamp);
skb->protocol = eth_type_trans(skb, skb->dev); skb->protocol = eth_type_trans(skb, skb->dev);
/* Everything we see on an interface that is in the HW bridge /* Everything we see on an interface that is in the HW bridge
* has already been forwarded * has already been forwarded
......
...@@ -190,6 +190,7 @@ static const struct sparx5_main_io_resource sparx5_main_iomap[] = { ...@@ -190,6 +190,7 @@ static const struct sparx5_main_io_resource sparx5_main_iomap[] = {
{ TARGET_ASM, 0x10600000, 1 }, /* 0x610600000 */ { TARGET_ASM, 0x10600000, 1 }, /* 0x610600000 */
{ TARGET_GCB, 0x11010000, 2 }, /* 0x611010000 */ { TARGET_GCB, 0x11010000, 2 }, /* 0x611010000 */
{ TARGET_QS, 0x11030000, 2 }, /* 0x611030000 */ { TARGET_QS, 0x11030000, 2 }, /* 0x611030000 */
{ TARGET_PTP, 0x11040000, 2 }, /* 0x611040000 */
{ TARGET_ANA_ACL, 0x11050000, 2 }, /* 0x611050000 */ { TARGET_ANA_ACL, 0x11050000, 2 }, /* 0x611050000 */
{ TARGET_LRN, 0x11060000, 2 }, /* 0x611060000 */ { TARGET_LRN, 0x11060000, 2 }, /* 0x611060000 */
{ TARGET_VCAP_SUPER, 0x11080000, 2 }, /* 0x611080000 */ { TARGET_VCAP_SUPER, 0x11080000, 2 }, /* 0x611080000 */
...@@ -692,6 +693,18 @@ static int sparx5_start(struct sparx5 *sparx5) ...@@ -692,6 +693,18 @@ static int sparx5_start(struct sparx5 *sparx5)
} else { } else {
sparx5->xtr_irq = -ENXIO; sparx5->xtr_irq = -ENXIO;
} }
if (sparx5->ptp_irq >= 0) {
err = devm_request_threaded_irq(sparx5->dev, sparx5->ptp_irq,
NULL, sparx5_ptp_irq_handler,
IRQF_ONESHOT, "sparx5-ptp",
sparx5);
if (err)
sparx5->ptp_irq = -ENXIO;
sparx5->ptp = 1;
}
return err; return err;
} }
...@@ -808,6 +821,7 @@ static int mchp_sparx5_probe(struct platform_device *pdev) ...@@ -808,6 +821,7 @@ static int mchp_sparx5_probe(struct platform_device *pdev)
sparx5->fdma_irq = platform_get_irq_byname(sparx5->pdev, "fdma"); sparx5->fdma_irq = platform_get_irq_byname(sparx5->pdev, "fdma");
sparx5->xtr_irq = platform_get_irq_byname(sparx5->pdev, "xtr"); sparx5->xtr_irq = platform_get_irq_byname(sparx5->pdev, "xtr");
sparx5->ptp_irq = platform_get_irq_byname(sparx5->pdev, "ptp");
/* Read chip ID to check CPU interface */ /* Read chip ID to check CPU interface */
sparx5->chip_id = spx5_rd(sparx5, GCB_CHIP_ID); sparx5->chip_id = spx5_rd(sparx5, GCB_CHIP_ID);
...@@ -846,6 +860,12 @@ static int mchp_sparx5_probe(struct platform_device *pdev) ...@@ -846,6 +860,12 @@ static int mchp_sparx5_probe(struct platform_device *pdev)
dev_err(sparx5->dev, "Start failed\n"); dev_err(sparx5->dev, "Start failed\n");
goto cleanup_ports; goto cleanup_ports;
} }
err = sparx5_ptp_init(sparx5);
if (err) {
dev_err(sparx5->dev, "PTP failed\n");
goto cleanup_ports;
}
goto cleanup_config; goto cleanup_config;
cleanup_ports: cleanup_ports:
...@@ -869,6 +889,7 @@ static int mchp_sparx5_remove(struct platform_device *pdev) ...@@ -869,6 +889,7 @@ static int mchp_sparx5_remove(struct platform_device *pdev)
disable_irq(sparx5->fdma_irq); disable_irq(sparx5->fdma_irq);
sparx5->fdma_irq = -ENXIO; sparx5->fdma_irq = -ENXIO;
} }
sparx5_ptp_deinit(sparx5);
sparx5_fdma_stop(sparx5); sparx5_fdma_stop(sparx5);
sparx5_cleanup_ports(sparx5); sparx5_cleanup_ports(sparx5);
/* Unregister netdevs */ /* Unregister netdevs */
......
...@@ -14,6 +14,8 @@ ...@@ -14,6 +14,8 @@
#include <linux/if_vlan.h> #include <linux/if_vlan.h>
#include <linux/bitmap.h> #include <linux/bitmap.h>
#include <linux/phylink.h> #include <linux/phylink.h>
#include <linux/net_tstamp.h>
#include <linux/ptp_clock_kernel.h>
#include <linux/hrtimer.h> #include <linux/hrtimer.h>
#include "sparx5_main_regs.h" #include "sparx5_main_regs.h"
...@@ -79,6 +81,18 @@ enum sparx5_vlan_port_type { ...@@ -79,6 +81,18 @@ enum sparx5_vlan_port_type {
#define FDMA_RX_DCB_MAX_DBS 15 #define FDMA_RX_DCB_MAX_DBS 15
#define FDMA_TX_DCB_MAX_DBS 1 #define FDMA_TX_DCB_MAX_DBS 1
#define SPARX5_PHC_COUNT 3
#define SPARX5_PHC_PORT 0
#define IFH_REW_OP_NOOP 0x0
#define IFH_REW_OP_ONE_STEP_PTP 0x3
#define IFH_REW_OP_TWO_STEP_PTP 0x4
#define IFH_PDU_TYPE_NONE 0x0
#define IFH_PDU_TYPE_PTP 0x5
#define IFH_PDU_TYPE_IPV4_UDP_PTP 0x6
#define IFH_PDU_TYPE_IPV6_UDP_PTP 0x7
struct sparx5; struct sparx5;
struct sparx5_db_hw { struct sparx5_db_hw {
...@@ -167,9 +181,12 @@ struct sparx5_port { ...@@ -167,9 +181,12 @@ struct sparx5_port {
enum sparx5_port_max_tags max_vlan_tags; enum sparx5_port_max_tags max_vlan_tags;
enum sparx5_vlan_port_type vlan_type; enum sparx5_vlan_port_type vlan_type;
u32 custom_etype; u32 custom_etype;
u32 ifh[IFH_LEN];
bool vlan_aware; bool vlan_aware;
struct hrtimer inj_timer; struct hrtimer inj_timer;
/* ptp */
u8 ptp_cmd;
u16 ts_id;
struct sk_buff_head tx_skbs;
}; };
enum sparx5_core_clockfreq { enum sparx5_core_clockfreq {
...@@ -179,6 +196,26 @@ enum sparx5_core_clockfreq { ...@@ -179,6 +196,26 @@ enum sparx5_core_clockfreq {
SPX5_CORE_CLOCK_625MHZ, /* 625MHZ core clock frequency */ SPX5_CORE_CLOCK_625MHZ, /* 625MHZ core clock frequency */
}; };
struct sparx5_phc {
struct ptp_clock *clock;
struct ptp_clock_info info;
struct hwtstamp_config hwtstamp_config;
struct sparx5 *sparx5;
u8 index;
};
struct sparx5_skb_cb {
u8 rew_op;
u8 pdu_type;
u8 pdu_w16_offset;
u16 ts_id;
unsigned long jiffies;
};
#define SPARX5_PTP_TIMEOUT msecs_to_jiffies(10)
#define SPARX5_SKB_CB(skb) \
((struct sparx5_skb_cb *)((skb)->cb))
struct sparx5 { struct sparx5 {
struct platform_device *pdev; struct platform_device *pdev;
struct device *dev; struct device *dev;
...@@ -226,6 +263,14 @@ struct sparx5 { ...@@ -226,6 +263,14 @@ struct sparx5 {
int fdma_irq; int fdma_irq;
struct sparx5_rx rx; struct sparx5_rx rx;
struct sparx5_tx tx; struct sparx5_tx tx;
/* PTP */
bool ptp;
struct sparx5_phc phc[SPARX5_PHC_COUNT];
spinlock_t ptp_clock_lock; /* lock for phc */
spinlock_t ptp_ts_id_lock; /* lock for ts_id */
struct mutex ptp_lock; /* lock for ptp interface state */
u16 ptp_skbs;
int ptp_irq;
}; };
/* sparx5_switchdev.c */ /* sparx5_switchdev.c */
...@@ -235,6 +280,7 @@ void sparx5_unregister_notifier_blocks(struct sparx5 *sparx5); ...@@ -235,6 +280,7 @@ void sparx5_unregister_notifier_blocks(struct sparx5 *sparx5);
/* sparx5_packet.c */ /* sparx5_packet.c */
struct frame_info { struct frame_info {
int src_port; int src_port;
u32 timestamp;
}; };
void sparx5_xtr_flush(struct sparx5 *sparx5, u8 grp); void sparx5_xtr_flush(struct sparx5 *sparx5, u8 grp);
...@@ -288,12 +334,30 @@ void sparx5_get_stats64(struct net_device *ndev, struct rtnl_link_stats64 *stats ...@@ -288,12 +334,30 @@ void sparx5_get_stats64(struct net_device *ndev, struct rtnl_link_stats64 *stats
int sparx_stats_init(struct sparx5 *sparx5); int sparx_stats_init(struct sparx5 *sparx5);
/* sparx5_netdev.c */ /* sparx5_netdev.c */
void sparx5_set_port_ifh_timestamp(void *ifh_hdr, u64 timestamp);
void sparx5_set_port_ifh_rew_op(void *ifh_hdr, u32 rew_op);
void sparx5_set_port_ifh_pdu_type(void *ifh_hdr, u32 pdu_type);
void sparx5_set_port_ifh_pdu_w16_offset(void *ifh_hdr, u32 pdu_w16_offset);
void sparx5_set_port_ifh(void *ifh_hdr, u16 portno);
bool sparx5_netdevice_check(const struct net_device *dev); bool sparx5_netdevice_check(const struct net_device *dev);
struct net_device *sparx5_create_netdev(struct sparx5 *sparx5, u32 portno); struct net_device *sparx5_create_netdev(struct sparx5 *sparx5, u32 portno);
int sparx5_register_netdevs(struct sparx5 *sparx5); int sparx5_register_netdevs(struct sparx5 *sparx5);
void sparx5_destroy_netdevs(struct sparx5 *sparx5); void sparx5_destroy_netdevs(struct sparx5 *sparx5);
void sparx5_unregister_netdevs(struct sparx5 *sparx5); void sparx5_unregister_netdevs(struct sparx5 *sparx5);
/* sparx5_ptp.c */
int sparx5_ptp_init(struct sparx5 *sparx5);
void sparx5_ptp_deinit(struct sparx5 *sparx5);
int sparx5_ptp_hwtstamp_set(struct sparx5_port *port, struct ifreq *ifr);
int sparx5_ptp_hwtstamp_get(struct sparx5_port *port, struct ifreq *ifr);
void sparx5_ptp_rxtstamp(struct sparx5 *sparx5, struct sk_buff *skb,
u64 timestamp);
int sparx5_ptp_txtstamp_request(struct sparx5_port *port,
struct sk_buff *skb);
void sparx5_ptp_txtstamp_release(struct sparx5_port *port,
struct sk_buff *skb);
irqreturn_t sparx5_ptp_irq_handler(int irq, void *args);
/* Clock period in picoseconds */ /* Clock period in picoseconds */
static inline u32 sparx5_clk_period(enum sparx5_core_clockfreq cclock) static inline u32 sparx5_clk_period(enum sparx5_core_clockfreq cclock)
{ {
......
...@@ -54,7 +54,7 @@ static void __ifh_encode_bitfield(void *ifh, u64 value, u32 pos, u32 width) ...@@ -54,7 +54,7 @@ static void __ifh_encode_bitfield(void *ifh, u64 value, u32 pos, u32 width)
ifh_hdr[byte - 5] |= (u8)((encode & 0xFF0000000000) >> 40); ifh_hdr[byte - 5] |= (u8)((encode & 0xFF0000000000) >> 40);
} }
static void sparx5_set_port_ifh(void *ifh_hdr, u16 portno) void sparx5_set_port_ifh(void *ifh_hdr, u16 portno)
{ {
/* VSTAX.RSV = 1. MSBit must be 1 */ /* VSTAX.RSV = 1. MSBit must be 1 */
ifh_encode_bitfield(ifh_hdr, 1, VSTAX + 79, 1); ifh_encode_bitfield(ifh_hdr, 1, VSTAX + 79, 1);
...@@ -74,6 +74,26 @@ static void sparx5_set_port_ifh(void *ifh_hdr, u16 portno) ...@@ -74,6 +74,26 @@ static void sparx5_set_port_ifh(void *ifh_hdr, u16 portno)
ifh_encode_bitfield(ifh_hdr, 1, 67, 1); ifh_encode_bitfield(ifh_hdr, 1, 67, 1);
} }
void sparx5_set_port_ifh_rew_op(void *ifh_hdr, u32 rew_op)
{
ifh_encode_bitfield(ifh_hdr, rew_op, VSTAX + 32, 10);
}
void sparx5_set_port_ifh_pdu_type(void *ifh_hdr, u32 pdu_type)
{
ifh_encode_bitfield(ifh_hdr, pdu_type, 191, 4);
}
void sparx5_set_port_ifh_pdu_w16_offset(void *ifh_hdr, u32 pdu_w16_offset)
{
ifh_encode_bitfield(ifh_hdr, pdu_w16_offset, 195, 6);
}
void sparx5_set_port_ifh_timestamp(void *ifh_hdr, u64 timestamp)
{
ifh_encode_bitfield(ifh_hdr, timestamp, 232, 40);
}
static int sparx5_port_open(struct net_device *ndev) static int sparx5_port_open(struct net_device *ndev)
{ {
struct sparx5_port *port = netdev_priv(ndev); struct sparx5_port *port = netdev_priv(ndev);
...@@ -179,6 +199,24 @@ static int sparx5_get_port_parent_id(struct net_device *dev, ...@@ -179,6 +199,24 @@ static int sparx5_get_port_parent_id(struct net_device *dev,
return 0; return 0;
} }
static int sparx5_port_ioctl(struct net_device *dev, struct ifreq *ifr,
int cmd)
{
struct sparx5_port *sparx5_port = netdev_priv(dev);
struct sparx5 *sparx5 = sparx5_port->sparx5;
if (!phy_has_hwtstamp(dev->phydev) && sparx5->ptp) {
switch (cmd) {
case SIOCSHWTSTAMP:
return sparx5_ptp_hwtstamp_set(sparx5_port, ifr);
case SIOCGHWTSTAMP:
return sparx5_ptp_hwtstamp_get(sparx5_port, ifr);
}
}
return phy_mii_ioctl(dev->phydev, ifr, cmd);
}
static const struct net_device_ops sparx5_port_netdev_ops = { static const struct net_device_ops sparx5_port_netdev_ops = {
.ndo_open = sparx5_port_open, .ndo_open = sparx5_port_open,
.ndo_stop = sparx5_port_stop, .ndo_stop = sparx5_port_stop,
...@@ -189,6 +227,7 @@ static const struct net_device_ops sparx5_port_netdev_ops = { ...@@ -189,6 +227,7 @@ static const struct net_device_ops sparx5_port_netdev_ops = {
.ndo_validate_addr = eth_validate_addr, .ndo_validate_addr = eth_validate_addr,
.ndo_get_stats64 = sparx5_get_stats64, .ndo_get_stats64 = sparx5_get_stats64,
.ndo_get_port_parent_id = sparx5_get_port_parent_id, .ndo_get_port_parent_id = sparx5_get_port_parent_id,
.ndo_eth_ioctl = sparx5_port_ioctl,
}; };
bool sparx5_netdevice_check(const struct net_device *dev) bool sparx5_netdevice_check(const struct net_device *dev)
...@@ -210,7 +249,6 @@ struct net_device *sparx5_create_netdev(struct sparx5 *sparx5, u32 portno) ...@@ -210,7 +249,6 @@ struct net_device *sparx5_create_netdev(struct sparx5 *sparx5, u32 portno)
spx5_port->ndev = ndev; spx5_port->ndev = ndev;
spx5_port->sparx5 = sparx5; spx5_port->sparx5 = sparx5;
spx5_port->portno = portno; spx5_port->portno = portno;
sparx5_set_port_ifh(spx5_port->ifh, portno);
ndev->netdev_ops = &sparx5_port_netdev_ops; ndev->netdev_ops = &sparx5_port_netdev_ops;
ndev->ethtool_ops = &sparx5_ethtool_ops; ndev->ethtool_ops = &sparx5_ethtool_ops;
......
...@@ -44,6 +44,12 @@ void sparx5_ifh_parse(u32 *ifh, struct frame_info *info) ...@@ -44,6 +44,12 @@ void sparx5_ifh_parse(u32 *ifh, struct frame_info *info)
((u32)xtr_hdr[30] << 0); ((u32)xtr_hdr[30] << 0);
fwd = (fwd >> 5); fwd = (fwd >> 5);
info->src_port = FIELD_GET(GENMASK(7, 1), fwd); info->src_port = FIELD_GET(GENMASK(7, 1), fwd);
info->timestamp =
((u64)xtr_hdr[2] << 24) |
((u64)xtr_hdr[3] << 16) |
((u64)xtr_hdr[4] << 8) |
((u64)xtr_hdr[5] << 0);
} }
static void sparx5_xtr_grp(struct sparx5 *sparx5, u8 grp, bool byte_swap) static void sparx5_xtr_grp(struct sparx5 *sparx5, u8 grp, bool byte_swap)
...@@ -144,6 +150,7 @@ static void sparx5_xtr_grp(struct sparx5 *sparx5, u8 grp, bool byte_swap) ...@@ -144,6 +150,7 @@ static void sparx5_xtr_grp(struct sparx5 *sparx5, u8 grp, bool byte_swap)
/* Finish up skb */ /* Finish up skb */
skb_put(skb, byte_cnt - ETH_FCS_LEN); skb_put(skb, byte_cnt - ETH_FCS_LEN);
eth_skb_pad(skb); eth_skb_pad(skb);
sparx5_ptp_rxtstamp(sparx5, skb, fi.timestamp);
skb->protocol = eth_type_trans(skb, netdev); skb->protocol = eth_type_trans(skb, netdev);
netdev->stats.rx_bytes += skb->len; netdev->stats.rx_bytes += skb->len;
netdev->stats.rx_packets++; netdev->stats.rx_packets++;
...@@ -218,20 +225,44 @@ int sparx5_port_xmit_impl(struct sk_buff *skb, struct net_device *dev) ...@@ -218,20 +225,44 @@ int sparx5_port_xmit_impl(struct sk_buff *skb, struct net_device *dev)
struct net_device_stats *stats = &dev->stats; struct net_device_stats *stats = &dev->stats;
struct sparx5_port *port = netdev_priv(dev); struct sparx5_port *port = netdev_priv(dev);
struct sparx5 *sparx5 = port->sparx5; struct sparx5 *sparx5 = port->sparx5;
u32 ifh[IFH_LEN];
int ret; int ret;
memset(ifh, 0, IFH_LEN * 4);
sparx5_set_port_ifh(ifh, port->portno);
if (sparx5->ptp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
ret = sparx5_ptp_txtstamp_request(port, skb);
if (ret)
return ret;
sparx5_set_port_ifh_rew_op(ifh, SPARX5_SKB_CB(skb)->rew_op);
sparx5_set_port_ifh_pdu_type(ifh, SPARX5_SKB_CB(skb)->pdu_type);
sparx5_set_port_ifh_pdu_w16_offset(ifh, SPARX5_SKB_CB(skb)->pdu_w16_offset);
sparx5_set_port_ifh_timestamp(ifh, SPARX5_SKB_CB(skb)->ts_id);
}
skb_tx_timestamp(skb);
if (sparx5->fdma_irq > 0) if (sparx5->fdma_irq > 0)
ret = sparx5_fdma_xmit(sparx5, port->ifh, skb); ret = sparx5_fdma_xmit(sparx5, ifh, skb);
else else
ret = sparx5_inject(sparx5, port->ifh, skb, dev); ret = sparx5_inject(sparx5, ifh, skb, dev);
if (ret == NETDEV_TX_OK) { if (ret == NETDEV_TX_OK) {
stats->tx_bytes += skb->len; stats->tx_bytes += skb->len;
stats->tx_packets++; stats->tx_packets++;
skb_tx_timestamp(skb);
if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
SPARX5_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
return ret;
dev_kfree_skb_any(skb); dev_kfree_skb_any(skb);
} else { } else {
stats->tx_dropped++; stats->tx_dropped++;
if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
SPARX5_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
sparx5_ptp_txtstamp_release(port, skb);
} }
return ret; return ret;
} }
......
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