Commit 3594f00b authored by Will Deacon's avatar Will Deacon Committed by Jiri Slaby

KVM: ARM/arm64: avoid returning negative error code as bool

commit 18d45766 upstream.

is_valid_cache returns true if the specified cache is valid.
Unfortunately, if the parameter passed it out of range, we return
-ENOENT, which ends up as true leading to potential hilarity.

This patch returns false on the failure path instead.

Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: default avatarShannon Zhao <shannon.zhao@linaro.org>
Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
parent 60731b1c
...@@ -621,7 +621,7 @@ static bool is_valid_cache(u32 val) ...@@ -621,7 +621,7 @@ static bool is_valid_cache(u32 val)
u32 level, ctype; u32 level, ctype;
if (val >= CSSELR_MAX) if (val >= CSSELR_MAX)
return -ENOENT; return false;
/* Bottom bit is Instruction or Data bit. Next 3 bits are level. */ /* Bottom bit is Instruction or Data bit. Next 3 bits are level. */
level = (val >> 1); level = (val >> 1);
......
...@@ -836,7 +836,7 @@ static bool is_valid_cache(u32 val) ...@@ -836,7 +836,7 @@ static bool is_valid_cache(u32 val)
u32 level, ctype; u32 level, ctype;
if (val >= CSSELR_MAX) if (val >= CSSELR_MAX)
return -ENOENT; return false;
/* Bottom bit is Instruction or Data bit. Next 3 bits are level. */ /* Bottom bit is Instruction or Data bit. Next 3 bits are level. */
level = (val >> 1); level = (val >> 1);
......
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