Commit 36623ef8 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter

drm/i915: get/put runtime PM in more places at i915_debugfs.c

These are places where we read (not write) registers while we're
runtime suspended.
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c19a0df2
...@@ -1348,6 +1348,8 @@ static int i915_fbc_status(struct seq_file *m, void *unused) ...@@ -1348,6 +1348,8 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
return 0; return 0;
} }
intel_runtime_pm_get(dev_priv);
if (intel_fbc_enabled(dev)) { if (intel_fbc_enabled(dev)) {
seq_puts(m, "FBC enabled\n"); seq_puts(m, "FBC enabled\n");
} else { } else {
...@@ -1391,6 +1393,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused) ...@@ -1391,6 +1393,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
} }
seq_putc(m, '\n'); seq_putc(m, '\n');
} }
intel_runtime_pm_put(dev_priv);
return 0; return 0;
} }
...@@ -1405,11 +1410,15 @@ static int i915_ips_status(struct seq_file *m, void *unused) ...@@ -1405,11 +1410,15 @@ static int i915_ips_status(struct seq_file *m, void *unused)
return 0; return 0;
} }
intel_runtime_pm_get(dev_priv);
if (IS_BROADWELL(dev) || I915_READ(IPS_CTL) & IPS_ENABLE) if (IS_BROADWELL(dev) || I915_READ(IPS_CTL) & IPS_ENABLE)
seq_puts(m, "enabled\n"); seq_puts(m, "enabled\n");
else else
seq_puts(m, "disabled\n"); seq_puts(m, "disabled\n");
intel_runtime_pm_put(dev_priv);
return 0; return 0;
} }
...@@ -1420,6 +1429,8 @@ static int i915_sr_status(struct seq_file *m, void *unused) ...@@ -1420,6 +1429,8 @@ static int i915_sr_status(struct seq_file *m, void *unused)
drm_i915_private_t *dev_priv = dev->dev_private; drm_i915_private_t *dev_priv = dev->dev_private;
bool sr_enabled = false; bool sr_enabled = false;
intel_runtime_pm_get(dev_priv);
if (HAS_PCH_SPLIT(dev)) if (HAS_PCH_SPLIT(dev))
sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN; sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev)) else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
...@@ -1429,6 +1440,8 @@ static int i915_sr_status(struct seq_file *m, void *unused) ...@@ -1429,6 +1440,8 @@ static int i915_sr_status(struct seq_file *m, void *unused)
else if (IS_PINEVIEW(dev)) else if (IS_PINEVIEW(dev))
sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
intel_runtime_pm_put(dev_priv);
seq_printf(m, "self-refresh: %s\n", seq_printf(m, "self-refresh: %s\n",
sr_enabled ? "enabled" : "disabled"); sr_enabled ? "enabled" : "disabled");
...@@ -1974,12 +1987,16 @@ static int i915_energy_uJ(struct seq_file *m, void *data) ...@@ -1974,12 +1987,16 @@ static int i915_energy_uJ(struct seq_file *m, void *data)
if (INTEL_INFO(dev)->gen < 6) if (INTEL_INFO(dev)->gen < 6)
return -ENODEV; return -ENODEV;
intel_runtime_pm_get(dev_priv);
rdmsrl(MSR_RAPL_POWER_UNIT, power); rdmsrl(MSR_RAPL_POWER_UNIT, power);
power = (power & 0x1f00) >> 8; power = (power & 0x1f00) >> 8;
units = 1000000 / (1 << power); /* convert to uJ */ units = 1000000 / (1 << power); /* convert to uJ */
power = I915_READ(MCH_SECP_NRG_STTS); power = I915_READ(MCH_SECP_NRG_STTS);
power *= units; power *= units;
intel_runtime_pm_put(dev_priv);
seq_printf(m, "%llu", (long long unsigned)power); seq_printf(m, "%llu", (long long unsigned)power);
return 0; return 0;
......
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