Commit 378d0aee authored by Maxime Ripard's avatar Maxime Ripard Committed by Olof Johansson

ARM: sun7i: dt: Fix interrupt trigger types

The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The
GIC can work on several interrupt triggers, and the A20 was actually setting it
up to use a rising edge as a trigger, while it was actually a level high
trigger, leading to some interrupts that would be completely ignored if the
edge was missed.
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarHans de Goede <hdegoede@redhat.com>
Cc: stable@vger.kernel.org #3.12+
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 2a82f95c
...@@ -170,7 +170,7 @@ soc@01c00000 { ...@@ -170,7 +170,7 @@ soc@01c00000 {
emac: ethernet@01c0b000 { emac: ethernet@01c0b000 {
compatible = "allwinner,sun4i-emac"; compatible = "allwinner,sun4i-emac";
reg = <0x01c0b000 0x1000>; reg = <0x01c0b000 0x1000>;
interrupts = <0 55 1>; interrupts = <0 55 4>;
clocks = <&ahb_gates 17>; clocks = <&ahb_gates 17>;
status = "disabled"; status = "disabled";
}; };
...@@ -186,7 +186,7 @@ mdio@01c0b080 { ...@@ -186,7 +186,7 @@ mdio@01c0b080 {
pio: pinctrl@01c20800 { pio: pinctrl@01c20800 {
compatible = "allwinner,sun7i-a20-pinctrl"; compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>; reg = <0x01c20800 0x400>;
interrupts = <0 28 1>; interrupts = <0 28 4>;
clocks = <&apb0_gates 5>; clocks = <&apb0_gates 5>;
gpio-controller; gpio-controller;
interrupt-controller; interrupt-controller;
...@@ -251,12 +251,12 @@ emac_pins_a: emac0@0 { ...@@ -251,12 +251,12 @@ emac_pins_a: emac0@0 {
timer@01c20c00 { timer@01c20c00 {
compatible = "allwinner,sun4i-timer"; compatible = "allwinner,sun4i-timer";
reg = <0x01c20c00 0x90>; reg = <0x01c20c00 0x90>;
interrupts = <0 22 1>, interrupts = <0 22 4>,
<0 23 1>, <0 23 4>,
<0 24 1>, <0 24 4>,
<0 25 1>, <0 25 4>,
<0 67 1>, <0 67 4>,
<0 68 1>; <0 68 4>;
clocks = <&osc24M>; clocks = <&osc24M>;
}; };
...@@ -273,7 +273,7 @@ sid: eeprom@01c23800 { ...@@ -273,7 +273,7 @@ sid: eeprom@01c23800 {
uart0: serial@01c28000 { uart0: serial@01c28000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>; reg = <0x01c28000 0x400>;
interrupts = <0 1 1>; interrupts = <0 1 4>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&apb1_gates 16>; clocks = <&apb1_gates 16>;
...@@ -283,7 +283,7 @@ uart0: serial@01c28000 { ...@@ -283,7 +283,7 @@ uart0: serial@01c28000 {
uart1: serial@01c28400 { uart1: serial@01c28400 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>; reg = <0x01c28400 0x400>;
interrupts = <0 2 1>; interrupts = <0 2 4>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&apb1_gates 17>; clocks = <&apb1_gates 17>;
...@@ -293,7 +293,7 @@ uart1: serial@01c28400 { ...@@ -293,7 +293,7 @@ uart1: serial@01c28400 {
uart2: serial@01c28800 { uart2: serial@01c28800 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>; reg = <0x01c28800 0x400>;
interrupts = <0 3 1>; interrupts = <0 3 4>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&apb1_gates 18>; clocks = <&apb1_gates 18>;
...@@ -303,7 +303,7 @@ uart2: serial@01c28800 { ...@@ -303,7 +303,7 @@ uart2: serial@01c28800 {
uart3: serial@01c28c00 { uart3: serial@01c28c00 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>; reg = <0x01c28c00 0x400>;
interrupts = <0 4 1>; interrupts = <0 4 4>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&apb1_gates 19>; clocks = <&apb1_gates 19>;
...@@ -313,7 +313,7 @@ uart3: serial@01c28c00 { ...@@ -313,7 +313,7 @@ uart3: serial@01c28c00 {
uart4: serial@01c29000 { uart4: serial@01c29000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x01c29000 0x400>; reg = <0x01c29000 0x400>;
interrupts = <0 17 1>; interrupts = <0 17 4>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&apb1_gates 20>; clocks = <&apb1_gates 20>;
...@@ -323,7 +323,7 @@ uart4: serial@01c29000 { ...@@ -323,7 +323,7 @@ uart4: serial@01c29000 {
uart5: serial@01c29400 { uart5: serial@01c29400 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x01c29400 0x400>; reg = <0x01c29400 0x400>;
interrupts = <0 18 1>; interrupts = <0 18 4>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&apb1_gates 21>; clocks = <&apb1_gates 21>;
...@@ -333,7 +333,7 @@ uart5: serial@01c29400 { ...@@ -333,7 +333,7 @@ uart5: serial@01c29400 {
uart6: serial@01c29800 { uart6: serial@01c29800 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x01c29800 0x400>; reg = <0x01c29800 0x400>;
interrupts = <0 19 1>; interrupts = <0 19 4>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&apb1_gates 22>; clocks = <&apb1_gates 22>;
...@@ -343,7 +343,7 @@ uart6: serial@01c29800 { ...@@ -343,7 +343,7 @@ uart6: serial@01c29800 {
uart7: serial@01c29c00 { uart7: serial@01c29c00 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x01c29c00 0x400>; reg = <0x01c29c00 0x400>;
interrupts = <0 20 1>; interrupts = <0 20 4>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&apb1_gates 23>; clocks = <&apb1_gates 23>;
...@@ -353,7 +353,7 @@ uart7: serial@01c29c00 { ...@@ -353,7 +353,7 @@ uart7: serial@01c29c00 {
i2c0: i2c@01c2ac00 { i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun4i-i2c";
reg = <0x01c2ac00 0x400>; reg = <0x01c2ac00 0x400>;
interrupts = <0 7 1>; interrupts = <0 7 4>;
clocks = <&apb1_gates 0>; clocks = <&apb1_gates 0>;
clock-frequency = <100000>; clock-frequency = <100000>;
status = "disabled"; status = "disabled";
...@@ -362,7 +362,7 @@ i2c0: i2c@01c2ac00 { ...@@ -362,7 +362,7 @@ i2c0: i2c@01c2ac00 {
i2c1: i2c@01c2b000 { i2c1: i2c@01c2b000 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun4i-i2c";
reg = <0x01c2b000 0x400>; reg = <0x01c2b000 0x400>;
interrupts = <0 8 1>; interrupts = <0 8 4>;
clocks = <&apb1_gates 1>; clocks = <&apb1_gates 1>;
clock-frequency = <100000>; clock-frequency = <100000>;
status = "disabled"; status = "disabled";
...@@ -371,7 +371,7 @@ i2c1: i2c@01c2b000 { ...@@ -371,7 +371,7 @@ i2c1: i2c@01c2b000 {
i2c2: i2c@01c2b400 { i2c2: i2c@01c2b400 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun4i-i2c";
reg = <0x01c2b400 0x400>; reg = <0x01c2b400 0x400>;
interrupts = <0 9 1>; interrupts = <0 9 4>;
clocks = <&apb1_gates 2>; clocks = <&apb1_gates 2>;
clock-frequency = <100000>; clock-frequency = <100000>;
status = "disabled"; status = "disabled";
...@@ -380,7 +380,7 @@ i2c2: i2c@01c2b400 { ...@@ -380,7 +380,7 @@ i2c2: i2c@01c2b400 {
i2c3: i2c@01c2b800 { i2c3: i2c@01c2b800 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun4i-i2c";
reg = <0x01c2b800 0x400>; reg = <0x01c2b800 0x400>;
interrupts = <0 88 1>; interrupts = <0 88 4>;
clocks = <&apb1_gates 3>; clocks = <&apb1_gates 3>;
clock-frequency = <100000>; clock-frequency = <100000>;
status = "disabled"; status = "disabled";
...@@ -389,7 +389,7 @@ i2c3: i2c@01c2b800 { ...@@ -389,7 +389,7 @@ i2c3: i2c@01c2b800 {
i2c4: i2c@01c2bc00 { i2c4: i2c@01c2bc00 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun4i-i2c";
reg = <0x01c2bc00 0x400>; reg = <0x01c2bc00 0x400>;
interrupts = <0 89 1>; interrupts = <0 89 4>;
clocks = <&apb1_gates 15>; clocks = <&apb1_gates 15>;
clock-frequency = <100000>; clock-frequency = <100000>;
status = "disabled"; status = "disabled";
......
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