Commit 37b95951 authored by Tianyu Lan's avatar Tianyu Lan Committed by Radim Krčmář

KVM/x86: Fix wrong macro references of X86_CR0_PG_BIT and X86_CR4_PAE_BIT in kvm_valid_sregs()

kvm_valid_sregs() should use X86_CR0_PG and X86_CR4_PAE to check bit
status rather than X86_CR0_PG_BIT and X86_CR4_PAE_BIT. This patch is
to fix it.

Fixes: f2981033(KVM/x86: Check input paging mode when cs.l is set)
Reported-by: default avatarJeremi Piotrowski <jeremi.piotrowski@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: default avatarTianyu Lan <Tianyu.Lan@microsoft.com>
Signed-off-by: default avatarRadim Krčmář <rkrcmar@redhat.com>
parent f44efa5a
...@@ -7496,13 +7496,13 @@ EXPORT_SYMBOL_GPL(kvm_task_switch); ...@@ -7496,13 +7496,13 @@ EXPORT_SYMBOL_GPL(kvm_task_switch);
int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
{ {
if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG_BIT)) { if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
/* /*
* When EFER.LME and CR0.PG are set, the processor is in * When EFER.LME and CR0.PG are set, the processor is in
* 64-bit mode (though maybe in a 32-bit code segment). * 64-bit mode (though maybe in a 32-bit code segment).
* CR4.PAE and EFER.LMA must be set. * CR4.PAE and EFER.LMA must be set.
*/ */
if (!(sregs->cr4 & X86_CR4_PAE_BIT) if (!(sregs->cr4 & X86_CR4_PAE)
|| !(sregs->efer & EFER_LMA)) || !(sregs->efer & EFER_LMA))
return -EINVAL; return -EINVAL;
} else { } else {
......
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