Commit 3861da58 authored by olivier moysan's avatar olivier moysan Committed by Mark Brown

ASoC: stm32: add h7 support for sai

Document device tree bindings for STM32H7 SAI.
Signed-off-by: default avatarolivier moysan <olivier.moysan@st.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 701a6ec3
...@@ -6,7 +6,7 @@ The SAI contains two independent audio sub-blocks. Each sub-block has ...@@ -6,7 +6,7 @@ The SAI contains two independent audio sub-blocks. Each sub-block has
its own clock generator and I/O lines controller. its own clock generator and I/O lines controller.
Required properties: Required properties:
- compatible: Should be "st,stm32f4-sai" - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai"
- reg: Base address and size of SAI common register set. - reg: Base address and size of SAI common register set.
- clocks: Must contain phandle and clock specifier pairs for each entry - clocks: Must contain phandle and clock specifier pairs for each entry
in clock-names. in clock-names.
...@@ -47,24 +47,24 @@ sound_card { ...@@ -47,24 +47,24 @@ sound_card {
}; };
sai1: sai1@40015800 { sai1: sai1@40015800 {
compatible = "st,stm32f4-sai"; compatible = "st,stm32h7-sai";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x40015800 0x400>; ranges = <0 0x40015800 0x400>;
reg = <0x40015800 0x4>; reg = <0x40015800 0x4>;
clocks = <&rcc 1 CLK_SAIQ_PDIV>, <&rcc 1 CLK_I2SQ_PDIV>; clocks = <&rcc PLL1_Q>, <&rcc PLL2_P>;
clock-names = "x8k", "x11k"; clock-names = "x8k", "x11k";
interrupts = <87>; interrupts = <87>;
sai1b: audio-controller@40015824 { sai1a: audio-controller@40015804 {
compatible = "st,stm32-sai-sub-b"; compatible = "st,stm32-sai-sub-a";
reg = <0x24 0x1C>; reg = <0x4 0x1C>;
clocks = <&rcc 1 CLK_SAI2>; clocks = <&rcc SAI1_CK>;
clock-names = "sai_ck"; clock-names = "sai_ck";
dmas = <&dma2 5 0 0x400 0x0>; dmas = <&dmamux1 1 87 0x400 0x0>;
dma-names = "tx"; dma-names = "tx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1b>; pinctrl-0 = <&pinctrl_sai1a>;
sai1b_port: port { sai1b_port: port {
cpu_endpoint: endpoint { cpu_endpoint: endpoint {
......
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