Commit 38805823 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

ARM: dts: r8a7790: Add SCIF2 clock

Based on Rev. 2.00 of the R-Car Gen2 datasheet.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 803f7e0b
...@@ -1302,19 +1302,19 @@ R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0 ...@@ -1302,19 +1302,19 @@ R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0
mstp3_clks: mstp3_clks@e615013c { mstp3_clks: mstp3_clks@e615013c {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>,
<&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
<&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
<&hp_clk>, <&hp_clk>; <&hp_clk>, <&hp_clk>;
#clock-cells = <1>; #clock-cells = <1>;
clock-indices = < clock-indices = <
R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3
R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1 R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
>; >;
clock-output-names = clock-output-names =
"iic2", "tpu0", "mmcif1", "sdhi3", "iic2", "tpu0", "mmcif1", "scif2", "sdhi3",
"sdhi2", "sdhi1", "sdhi0", "mmcif0", "sdhi2", "sdhi1", "sdhi0", "mmcif0",
"iic0", "pciec", "iic1", "ssusb", "cmt1", "iic0", "pciec", "iic1", "ssusb", "cmt1",
"usbdmac0", "usbdmac1"; "usbdmac0", "usbdmac1";
......
...@@ -66,6 +66,7 @@ ...@@ -66,6 +66,7 @@
#define R8A7790_CLK_IIC2 0 #define R8A7790_CLK_IIC2 0
#define R8A7790_CLK_TPU0 4 #define R8A7790_CLK_TPU0 4
#define R8A7790_CLK_MMCIF1 5 #define R8A7790_CLK_MMCIF1 5
#define R8A7790_CLK_SCIF2 10
#define R8A7790_CLK_SDHI3 11 #define R8A7790_CLK_SDHI3 11
#define R8A7790_CLK_SDHI2 12 #define R8A7790_CLK_SDHI2 12
#define R8A7790_CLK_SDHI1 13 #define R8A7790_CLK_SDHI1 13
......
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