Commit 392b73cb authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson

arm64: dts: qcom: msm8998*: Keep MMCC & MMSS_SMMU enabled by default

MMCC is a component of the SoC that should always be configured. It was kept
off due to misconfiguration on clamshell machines. Keep it disabled on these
ones and enable it by default on all the others.

Exactly the same story applies to MMSS_SMMU, which directly depends on MMCC.

Do note, that if a platform doesn't use neither EFIFB (only applies to WoA
devices in this case) or simplefb (applies to precisely 2 msm8998 devices
as of this commit), this will not cause any harm.
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-10-konrad.dybcio@somainline.org
parent 20bba6b7
...@@ -93,6 +93,20 @@ &CPU7 { ...@@ -93,6 +93,20 @@ &CPU7 {
cpu-idle-states = <&BIG_CPU_SLEEP_1>; cpu-idle-states = <&BIG_CPU_SLEEP_1>;
}; };
/*
* If EFIFB is used, enabling MMCC will cause important MMSS clocks to be cleaned
* up, because as far as Linux is concerned - they are unused. Disable it by default
* on clamshell devices, as it will break them, unless either simplefb is configured to
* hold a vote for these clocks, or panels are brought up properly, using drm/msm.
*/
&mmcc {
status = "disabled";
};
&mmss_smmu {
status = "disabled";
};
&pcie0 { &pcie0 {
status = "okay"; status = "okay";
}; };
......
...@@ -205,14 +205,6 @@ touchscreen@14 { ...@@ -205,14 +205,6 @@ touchscreen@14 {
}; };
}; };
&mmcc {
status = "okay";
};
&mmss_smmu {
status = "okay";
};
&pm8998_gpio { &pm8998_gpio {
vol_up_pin_a: vol-up-active { vol_up_pin_a: vol-up-active {
pins = "gpio6"; pins = "gpio6";
......
...@@ -276,14 +276,6 @@ &lab { ...@@ -276,14 +276,6 @@ &lab {
regulator-soft-start; regulator-soft-start;
}; };
&mmcc {
status = "ok";
};
&mmss_smmu {
status = "ok";
};
&pm8005_regulators { &pm8005_regulators {
/* VDD_GFX supply */ /* VDD_GFX supply */
pm8005_s1: s1 { pm8005_s1: s1 {
......
...@@ -2388,7 +2388,6 @@ mmcc: clock-controller@c8c0000 { ...@@ -2388,7 +2388,6 @@ mmcc: clock-controller@c8c0000 {
#reset-cells = <1>; #reset-cells = <1>;
#power-domain-cells = <1>; #power-domain-cells = <1>;
reg = <0xc8c0000 0x40000>; reg = <0xc8c0000 0x40000>;
status = "disabled";
clock-names = "xo", clock-names = "xo",
"gpll0", "gpll0",
...@@ -2423,7 +2422,6 @@ mmss_smmu: iommu@cd00000 { ...@@ -2423,7 +2422,6 @@ mmss_smmu: iommu@cd00000 {
<&mmcc BIMC_SMMU_AXI_CLK>; <&mmcc BIMC_SMMU_AXI_CLK>;
clock-names = "iface-mm", "iface-smmu", clock-names = "iface-mm", "iface-smmu",
"bus-mm", "bus-smmu"; "bus-mm", "bus-smmu";
status = "disabled";
#global-interrupts = <0>; #global-interrupts = <0>;
interrupts = interrupts =
......
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