sh: R7785RP board updates.

Some fixups for the R7785RP board. Gets iVDR working.
Signed-off-by: Ryusuke Sakato <sakato.ryusuke@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

arch/sh/boards/renesas/r7780rp/setup.c

@@ -97,12 +97,12 @@ device_initcall(r7780rp_devices_setup);
  */
 static void ivdr_clk_enable(struct clk *clk)
 {
-	ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << 8), PA_IVDRCTL);
+	ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
 }
 
 static void ivdr_clk_disable(struct clk *clk)
 {
-	ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << 8), PA_IVDRCTL);
+	ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
 }
 
 static struct clk_ops ivdr_clk_ops = {

arch/sh/drivers/pci/ops-r7780rp.c

@@ -25,22 +25,12 @@ static char r7780mp_irq_tab[] __initdata = {
 	65, 66, 67, 68,
 };
 
-static char r7785rp_irq_tab[][4] __initdata = {
-	{ 65, 66, 67, 68 },	/* INT ABCD */
-	{ 66, 67, 68, 65 },	/* INT BCDA */
-	{ 67, 68, 65, 66 },	/* INT CDAB */
-	{ 68, 65, 66, 67 },	/* INT DABC */
-	{ 64, 64, 64, 64 },	/* PCI Host */
-};
-
 int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
 {
 	if (mach_is_r7780rp())
 		return r7780rp_irq_tab[slot];
-	if (mach_is_r7780mp())
+	if (mach_is_r7780mp() || mach_is_r7785rp())
 		return r7780mp_irq_tab[slot];
-	if (mach_is_r7785rp())
-		return r7785rp_irq_tab[slot][pin];
 
 	printk(KERN_ERR "PCI: Bad IRQ mapping "
 	       "request for slot %d, func %d\n", slot, pin-1);

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

@@ -75,21 +75,26 @@ __initcall(sh7785_devices_setup);
 static struct intc2_data intc2_irq_table[] = {
 	{ 28, 0, 24, 0, 0, 2 },		/* TMU0 */
 
-	{ 40, 8, 24, 0, 3, 3 },		/* SCIF0 ERI */
-	{ 41, 8, 24, 0, 3, 3 },		/* SCIF0 RXI */
-	{ 42, 8, 24, 0, 3, 3 },		/* SCIF0 BRI */
-	{ 43, 8, 24, 0, 3, 3 },		/* SCIF0 TXI */
+	{ 40, 8, 24, 0, 2, 3 },		/* SCIF0 ERI */
+	{ 41, 8, 24, 0, 2, 3 },		/* SCIF0 RXI */
+	{ 42, 8, 24, 0, 2, 3 },		/* SCIF0 BRI */
+	{ 43, 8, 24, 0, 2, 3 },		/* SCIF0 TXI */
 
-	{ 76, 8, 16, 0, 4, 3 },		/* SCIF1 ERI */
-	{ 77, 8, 16, 0, 4, 3 },		/* SCIF1 RXI */
-	{ 78, 8, 16, 0, 4, 3 },		/* SCIF1 BRI */
-	{ 79, 8, 16, 0, 4, 3 },		/* SCIF1 TXI */
+	{ 44, 8, 16, 0, 3, 3 },		/* SCIF1 ERI */
+	{ 45, 8, 16, 0, 3, 3 },		/* SCIF1 RXI */
+	{ 46, 8, 16, 0, 3, 3 },		/* SCIF1 BRI */
+	{ 47, 8, 16, 0, 3, 3 },		/* SCIF1 TXI */
 
 	{ 64, 0x14,  8, 0, 14, 2 },	/* PCIC0 */
 	{ 65, 0x14,  0, 0, 15, 2 },	/* PCIC1 */
 	{ 66, 0x18, 24, 0, 16, 2 },	/* PCIC2 */
 	{ 67, 0x18, 16, 0, 17, 2 },	/* PCIC3 */
 	{ 68, 0x18,  8, 0, 18, 2 },	/* PCIC4 */
+
+	{ 60,  8,  8, 0, 4, 3 },	/* SCIF2 ERI, RXI, BRI, TXI */
+	{ 60,  8,  0, 0, 5, 3 },	/* SCIF3 ERI, RXI, BRI, TXI */
+	{ 60, 12, 24, 0, 6, 3 },	/* SCIF4 ERI, RXI, BRI, TXI */
+	{ 60, 12, 16, 0, 7, 3 },	/* SCIF5 ERI, RXI, BRI, TXI */
 };
 
 void __init init_IRQ_intc2(void)

include/asm-sh/r7780rp.h

@@ -83,6 +83,8 @@
 #define IRQ_ONETH       13              /* On board Ethernet IRQ */
 #define IRQ_PSW         14              /* Push Switch IRQ */
 
+#define IVDR_CK_ON	8		/* iVDR Clock ON */
+
 #elif defined(CONFIG_SH_R7780RP)
 #define PA_POFF		(-1)
 
@@ -152,6 +154,8 @@
 #define IRQ_PSW		13		/* Push Switch IRQ */
 #define IRQ_ZIGBEE	14		/* Ziggbee IO IRQ */
 
+#define IVDR_CK_ON	8		/* iVDR Clock ON */
+
 #elif defined(CONFIG_SH_R7785RP)
 #define PA_BCR		0xa4000000	/* FPGA */
 #define PA_SDPOW	(-1)
@@ -197,6 +201,9 @@
 #define PA_CU3MDR	(PA_BCR+0x0300)
 #define PA_CU5MDR	(PA_BCR+0x0302)
 #define PA_MMSR		(PA_BCR+0x0400)
+
+#define IVDR_CK_ON	4		/* iVDR Clock ON */
+
 #endif
 
 void make_r7780rp_irq(unsigned int irq);