Commit 398b60a8 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'pwm/for-3.14-rc1' of...

Merge tag 'pwm/for-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm changes from Thierry Reding:
 "The patches for this release cycle include various enhancements
  (device tree support, better compile coverage, ...) for existing
  drivers.  There is a new driver for Atmel SoCs.

  Various drivers as well as the sysfs support received minor fixes and
  cleanups"

* tag 'pwm/for-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: tiecap: Remove duplicate put_sync call
  pwm: tiehrpwm: use dev_err() instead of pr_err()
  pwm: pxa: remove unnecessary space before tabs
  pwm: ep93xx: split module author names
  pwm: use seq_puts() instead of seq_printf()
  pwm: atmel-pwm: Do not unprepare clock after successful registration
  of: Add Atmel PWM controller device tree binding
  pwm: atmel-pwm: Add Atmel PWM controller driver
  backlight: pwm_bl: Remove error message upon devm_kzalloc() failure
  pwm: pca9685: depends on I2C rather than REGMAP_I2C
  pwm: renesas-tpu: Enable driver compilation with COMPILE_TEST
  pwm: jz4740: Use devm_clk_get()
  pwm: jz4740: Pass device to clk_get()
  pwm: sysfs: Convert to use ATTRIBUTE_GROUPS macro
  pwm: pxa: Add device tree support
parents 028e219e 6691a199
Atmel PWM controller
Required properties:
- compatible: should be one of:
- "atmel,at91sam9rl-pwm"
- "atmel,sama5d3-pwm"
- reg: physical base address and length of the controller's registers
- #pwm-cells: Should be 3. See pwm.txt in this directory for a
description of the cells format.
Example:
pwm0: pwm@f8034000 {
compatible = "atmel,at91sam9rl-pwm";
reg = <0xf8034000 0x400>;
#pwm-cells = <3>;
};
pwmleds {
compatible = "pwm-leds";
d1 {
label = "d1";
pwms = <&pwm0 3 5000 0>
max-brightness = <255>;
};
d2 {
label = "d2";
pwms = <&pwm0 1 5000 1>
max-brightness = <255>;
};
};
Marvell PWM controller
Required properties:
- compatible: should be one or more of:
- "marvell,pxa250-pwm"
- "marvell,pxa270-pwm"
- "marvell,pxa168-pwm"
- "marvell,pxa910-pwm"
- reg: Physical base address and length of the registers used by the PWM channel
Note that one device instance must be created for each PWM that is used, so the
length covers only the register window for one PWM output, not that of the
entire PWM controller. Currently length is 0x10 for all supported devices.
- #pwm-cells: Should be 1. This cell is used to specify the period in
nanoseconds.
Example PWM device node:
pwm0: pwm@40b00000 {
compatible = "marvell,pxa250-pwm";
reg = <0x40b00000 0x10>;
#pwm-cells = <1>;
};
Example PWM client node:
backlight {
compatible = "pwm-backlight";
pwms = <&pwm0 5000000>;
...
}
...@@ -41,6 +41,15 @@ config PWM_AB8500 ...@@ -41,6 +41,15 @@ config PWM_AB8500
To compile this driver as a module, choose M here: the module To compile this driver as a module, choose M here: the module
will be called pwm-ab8500. will be called pwm-ab8500.
config PWM_ATMEL
tristate "Atmel PWM support"
depends on ARCH_AT91
help
Generic PWM framework driver for Atmel SoC.
To compile this driver as a module, choose M here: the module
will be called pwm-atmel.
config PWM_ATMEL_TCB config PWM_ATMEL_TCB
tristate "Atmel TC Block PWM support" tristate "Atmel TC Block PWM support"
depends on ATMEL_TCLIB && OF depends on ATMEL_TCLIB && OF
...@@ -122,7 +131,8 @@ config PWM_MXS ...@@ -122,7 +131,8 @@ config PWM_MXS
config PWM_PCA9685 config PWM_PCA9685
tristate "NXP PCA9685 PWM driver" tristate "NXP PCA9685 PWM driver"
depends on OF && REGMAP_I2C depends on OF && I2C
select REGMAP_I2C
help help
Generic PWM framework driver for NXP PCA9685 LED controller. Generic PWM framework driver for NXP PCA9685 LED controller.
...@@ -149,7 +159,7 @@ config PWM_PXA ...@@ -149,7 +159,7 @@ config PWM_PXA
config PWM_RENESAS_TPU config PWM_RENESAS_TPU
tristate "Renesas TPU PWM support" tristate "Renesas TPU PWM support"
depends on ARCH_SHMOBILE depends on ARCH_SHMOBILE || COMPILE_TEST
help help
This driver exposes the Timer Pulse Unit (TPU) PWM controller found This driver exposes the Timer Pulse Unit (TPU) PWM controller found
in Renesas chips through the PWM API. in Renesas chips through the PWM API.
......
obj-$(CONFIG_PWM) += core.o obj-$(CONFIG_PWM) += core.o
obj-$(CONFIG_PWM_SYSFS) += sysfs.o obj-$(CONFIG_PWM_SYSFS) += sysfs.o
obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o
obj-$(CONFIG_PWM_ATMEL) += pwm-atmel.o
obj-$(CONFIG_PWM_ATMEL_TCB) += pwm-atmel-tcb.o obj-$(CONFIG_PWM_ATMEL_TCB) += pwm-atmel-tcb.o
obj-$(CONFIG_PWM_BFIN) += pwm-bfin.o obj-$(CONFIG_PWM_BFIN) += pwm-bfin.o
obj-$(CONFIG_PWM_EP93XX) += pwm-ep93xx.o obj-$(CONFIG_PWM_EP93XX) += pwm-ep93xx.o
......
...@@ -808,12 +808,12 @@ static void pwm_dbg_show(struct pwm_chip *chip, struct seq_file *s) ...@@ -808,12 +808,12 @@ static void pwm_dbg_show(struct pwm_chip *chip, struct seq_file *s)
seq_printf(s, " pwm-%-3d (%-20.20s):", i, pwm->label); seq_printf(s, " pwm-%-3d (%-20.20s):", i, pwm->label);
if (test_bit(PWMF_REQUESTED, &pwm->flags)) if (test_bit(PWMF_REQUESTED, &pwm->flags))
seq_printf(s, " requested"); seq_puts(s, " requested");
if (test_bit(PWMF_ENABLED, &pwm->flags)) if (test_bit(PWMF_ENABLED, &pwm->flags))
seq_printf(s, " enabled"); seq_puts(s, " enabled");
seq_printf(s, "\n"); seq_puts(s, "\n");
} }
} }
......
/*
* Driver for Atmel Pulse Width Modulation Controller
*
* Copyright (C) 2013 Atmel Corporation
* Bo Shen <voice.shen@atmel.com>
*
* Licensed under GPLv2.
*/
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/slab.h>
/* The following is global registers for PWM controller */
#define PWM_ENA 0x04
#define PWM_DIS 0x08
#define PWM_SR 0x0C
/* Bit field in SR */
#define PWM_SR_ALL_CH_ON 0x0F
/* The following register is PWM channel related registers */
#define PWM_CH_REG_OFFSET 0x200
#define PWM_CH_REG_SIZE 0x20
#define PWM_CMR 0x0
/* Bit field in CMR */
#define PWM_CMR_CPOL (1 << 9)
#define PWM_CMR_UPD_CDTY (1 << 10)
/* The following registers for PWM v1 */
#define PWMV1_CDTY 0x04
#define PWMV1_CPRD 0x08
#define PWMV1_CUPD 0x10
/* The following registers for PWM v2 */
#define PWMV2_CDTY 0x04
#define PWMV2_CDTYUPD 0x08
#define PWMV2_CPRD 0x0C
#define PWMV2_CPRDUPD 0x10
/*
* Max value for duty and period
*
* Although the duty and period register is 32 bit,
* however only the LSB 16 bits are significant.
*/
#define PWM_MAX_DTY 0xFFFF
#define PWM_MAX_PRD 0xFFFF
#define PRD_MAX_PRES 10
struct atmel_pwm_chip {
struct pwm_chip chip;
struct clk *clk;
void __iomem *base;
void (*config)(struct pwm_chip *chip, struct pwm_device *pwm,
unsigned long dty, unsigned long prd);
};
static inline struct atmel_pwm_chip *to_atmel_pwm_chip(struct pwm_chip *chip)
{
return container_of(chip, struct atmel_pwm_chip, chip);
}
static inline u32 atmel_pwm_readl(struct atmel_pwm_chip *chip,
unsigned long offset)
{
return readl_relaxed(chip->base + offset);
}
static inline void atmel_pwm_writel(struct atmel_pwm_chip *chip,
unsigned long offset, unsigned long val)
{
writel_relaxed(val, chip->base + offset);
}
static inline u32 atmel_pwm_ch_readl(struct atmel_pwm_chip *chip,
unsigned int ch, unsigned long offset)
{
unsigned long base = PWM_CH_REG_OFFSET + ch * PWM_CH_REG_SIZE;
return readl_relaxed(chip->base + base + offset);
}
static inline void atmel_pwm_ch_writel(struct atmel_pwm_chip *chip,
unsigned int ch, unsigned long offset,
unsigned long val)
{
unsigned long base = PWM_CH_REG_OFFSET + ch * PWM_CH_REG_SIZE;
writel_relaxed(val, chip->base + base + offset);
}
static int atmel_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
int duty_ns, int period_ns)
{
struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
unsigned long clk_rate, prd, dty;
unsigned long long div;
unsigned int pres = 0;
int ret;
if (test_bit(PWMF_ENABLED, &pwm->flags) && (period_ns != pwm->period)) {
dev_err(chip->dev, "cannot change PWM period while enabled\n");
return -EBUSY;
}
clk_rate = clk_get_rate(atmel_pwm->clk);
div = clk_rate;
/* Calculate the period cycles */
while (div > PWM_MAX_PRD) {
div = clk_rate / (1 << pres);
div = div * period_ns;
/* 1/Hz = 100000000 ns */
do_div(div, 1000000000);
if (pres++ > PRD_MAX_PRES) {
dev_err(chip->dev, "pres exceeds the maximum value\n");
return -EINVAL;
}
}
/* Calculate the duty cycles */
prd = div;
div *= duty_ns;
do_div(div, period_ns);
dty = div;
ret = clk_enable(atmel_pwm->clk);
if (ret) {
dev_err(chip->dev, "failed to enable PWM clock\n");
return ret;
}
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, pres);
atmel_pwm->config(chip, pwm, dty, prd);
clk_disable(atmel_pwm->clk);
return ret;
}
static void atmel_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm,
unsigned long dty, unsigned long prd)
{
struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
unsigned int val;
if (test_bit(PWMF_ENABLED, &pwm->flags)) {
/*
* If the PWM channel is enabled, using the update register,
* it needs to set bit 10 of CMR to 0
*/
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CUPD, dty);
val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR);
val &= ~PWM_CMR_UPD_CDTY;
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val);
} else {
/*
* If the PWM channel is disabled, write value to duty and
* period registers directly.
*/
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CDTY, dty);
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CPRD, prd);
}
}
static void atmel_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm,
unsigned long dty, unsigned long prd)
{
struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
if (test_bit(PWMF_ENABLED, &pwm->flags)) {
/*
* If the PWM channel is enabled, using the duty update register
* to update the value.
*/
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CDTYUPD, dty);
} else {
/*
* If the PWM channel is disabled, write value to duty and
* period registers directly.
*/
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CDTY, dty);
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CPRD, prd);
}
}
static int atmel_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
enum pwm_polarity polarity)
{
struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
u32 val;
int ret;
val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR);
if (polarity == PWM_POLARITY_NORMAL)
val &= ~PWM_CMR_CPOL;
else
val |= PWM_CMR_CPOL;
ret = clk_enable(atmel_pwm->clk);
if (ret) {
dev_err(chip->dev, "failed to enable PWM clock\n");
return ret;
}
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val);
clk_disable(atmel_pwm->clk);
return 0;
}
static int atmel_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
int ret;
ret = clk_enable(atmel_pwm->clk);
if (ret) {
dev_err(chip->dev, "failed to enable PWM clock\n");
return ret;
}
atmel_pwm_writel(atmel_pwm, PWM_ENA, 1 << pwm->hwpwm);
return 0;
}
static void atmel_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
atmel_pwm_writel(atmel_pwm, PWM_DIS, 1 << pwm->hwpwm);
clk_disable(atmel_pwm->clk);
}
static const struct pwm_ops atmel_pwm_ops = {
.config = atmel_pwm_config,
.set_polarity = atmel_pwm_set_polarity,
.enable = atmel_pwm_enable,
.disable = atmel_pwm_disable,
.owner = THIS_MODULE,
};
struct atmel_pwm_data {
void (*config)(struct pwm_chip *chip, struct pwm_device *pwm,
unsigned long dty, unsigned long prd);
};
static const struct atmel_pwm_data atmel_pwm_data_v1 = {
.config = atmel_pwm_config_v1,
};
static const struct atmel_pwm_data atmel_pwm_data_v2 = {
.config = atmel_pwm_config_v2,
};
static const struct platform_device_id atmel_pwm_devtypes[] = {
{
.name = "at91sam9rl-pwm",
.driver_data = (kernel_ulong_t)&atmel_pwm_data_v1,
}, {
.name = "sama5d3-pwm",
.driver_data = (kernel_ulong_t)&atmel_pwm_data_v2,
}, {
/* sentinel */
},
};
MODULE_DEVICE_TABLE(platform, atmel_pwm_devtypes);
static const struct of_device_id atmel_pwm_dt_ids[] = {
{
.compatible = "atmel,at91sam9rl-pwm",
.data = &atmel_pwm_data_v1,
}, {
.compatible = "atmel,sama5d3-pwm",
.data = &atmel_pwm_data_v2,
}, {
/* sentinel */
},
};
MODULE_DEVICE_TABLE(of, atmel_pwm_dt_ids);
static inline const struct atmel_pwm_data *
atmel_pwm_get_driver_data(struct platform_device *pdev)
{
if (pdev->dev.of_node) {
const struct of_device_id *match;
match = of_match_device(atmel_pwm_dt_ids, &pdev->dev);
if (!match)
return NULL;
return match->data;
} else {
const struct platform_device_id *id;
id = platform_get_device_id(pdev);
return (struct atmel_pwm_data *)id->driver_data;
}
}
static int atmel_pwm_probe(struct platform_device *pdev)
{
const struct atmel_pwm_data *data;
struct atmel_pwm_chip *atmel_pwm;
struct resource *res;
int ret;
data = atmel_pwm_get_driver_data(pdev);
if (!data)
return -ENODEV;
atmel_pwm = devm_kzalloc(&pdev->dev, sizeof(*atmel_pwm), GFP_KERNEL);
if (!atmel_pwm)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
atmel_pwm->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(atmel_pwm->base))
return PTR_ERR(atmel_pwm->base);
atmel_pwm->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(atmel_pwm->clk))
return PTR_ERR(atmel_pwm->clk);
ret = clk_prepare(atmel_pwm->clk);
if (ret) {
dev_err(&pdev->dev, "failed to prepare PWM clock\n");
return ret;
}
atmel_pwm->chip.dev = &pdev->dev;
atmel_pwm->chip.ops = &atmel_pwm_ops;
if (pdev->dev.of_node) {
atmel_pwm->chip.of_xlate = of_pwm_xlate_with_flags;
atmel_pwm->chip.of_pwm_n_cells = 3;
}
atmel_pwm->chip.base = -1;
atmel_pwm->chip.npwm = 4;
atmel_pwm->config = data->config;
ret = pwmchip_add(&atmel_pwm->chip);
if (ret < 0) {
dev_err(&pdev->dev, "failed to add PWM chip %d\n", ret);
goto unprepare_clk;
}
platform_set_drvdata(pdev, atmel_pwm);
return ret;
unprepare_clk:
clk_unprepare(atmel_pwm->clk);
return ret;
}
static int atmel_pwm_remove(struct platform_device *pdev)
{
struct atmel_pwm_chip *atmel_pwm = platform_get_drvdata(pdev);
clk_unprepare(atmel_pwm->clk);
return pwmchip_remove(&atmel_pwm->chip);
}
static struct platform_driver atmel_pwm_driver = {
.driver = {
.name = "atmel-pwm",
.of_match_table = of_match_ptr(atmel_pwm_dt_ids),
},
.id_table = atmel_pwm_devtypes,
.probe = atmel_pwm_probe,
.remove = atmel_pwm_remove,
};
module_platform_driver(atmel_pwm_driver);
MODULE_ALIAS("platform:atmel-pwm");
MODULE_AUTHOR("Bo Shen <voice.shen@atmel.com>");
MODULE_DESCRIPTION("Atmel PWM driver");
MODULE_LICENSE("GPL v2");
...@@ -224,7 +224,7 @@ static struct platform_driver ep93xx_pwm_driver = { ...@@ -224,7 +224,7 @@ static struct platform_driver ep93xx_pwm_driver = {
module_platform_driver(ep93xx_pwm_driver); module_platform_driver(ep93xx_pwm_driver);
MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver"); MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver");
MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>, " MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>");
"H Hartley Sweeten <hsweeten@visionengravers.com>"); MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
MODULE_ALIAS("platform:ep93xx-pwm"); MODULE_ALIAS("platform:ep93xx-pwm");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
...@@ -165,13 +165,12 @@ static const struct pwm_ops jz4740_pwm_ops = { ...@@ -165,13 +165,12 @@ static const struct pwm_ops jz4740_pwm_ops = {
static int jz4740_pwm_probe(struct platform_device *pdev) static int jz4740_pwm_probe(struct platform_device *pdev)
{ {
struct jz4740_pwm_chip *jz4740; struct jz4740_pwm_chip *jz4740;
int ret;
jz4740 = devm_kzalloc(&pdev->dev, sizeof(*jz4740), GFP_KERNEL); jz4740 = devm_kzalloc(&pdev->dev, sizeof(*jz4740), GFP_KERNEL);
if (!jz4740) if (!jz4740)
return -ENOMEM; return -ENOMEM;
jz4740->clk = clk_get(NULL, "ext"); jz4740->clk = devm_clk_get(&pdev->dev, "ext");
if (IS_ERR(jz4740->clk)) if (IS_ERR(jz4740->clk))
return PTR_ERR(jz4740->clk); return PTR_ERR(jz4740->clk);
...@@ -180,29 +179,16 @@ static int jz4740_pwm_probe(struct platform_device *pdev) ...@@ -180,29 +179,16 @@ static int jz4740_pwm_probe(struct platform_device *pdev)
jz4740->chip.npwm = NUM_PWM; jz4740->chip.npwm = NUM_PWM;
jz4740->chip.base = -1; jz4740->chip.base = -1;
ret = pwmchip_add(&jz4740->chip);
if (ret < 0) {
clk_put(jz4740->clk);
return ret;
}
platform_set_drvdata(pdev, jz4740); platform_set_drvdata(pdev, jz4740);
return 0; return pwmchip_add(&jz4740->chip);
} }
static int jz4740_pwm_remove(struct platform_device *pdev) static int jz4740_pwm_remove(struct platform_device *pdev)
{ {
struct jz4740_pwm_chip *jz4740 = platform_get_drvdata(pdev); struct jz4740_pwm_chip *jz4740 = platform_get_drvdata(pdev);
int ret;
ret = pwmchip_remove(&jz4740->chip);
if (ret < 0)
return ret;
clk_put(jz4740->clk); return pwmchip_remove(&jz4740->chip);
return 0;
} }
static struct platform_driver jz4740_pwm_driver = { static struct platform_driver jz4740_pwm_driver = {
......
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/pwm.h> #include <linux/pwm.h>
#include <linux/of_device.h>
#include <asm/div64.h> #include <asm/div64.h>
...@@ -124,6 +125,46 @@ static struct pwm_ops pxa_pwm_ops = { ...@@ -124,6 +125,46 @@ static struct pwm_ops pxa_pwm_ops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
}; };
#ifdef CONFIG_OF
/*
* Device tree users must create one device instance for each pwm channel.
* Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
* code that this is a single channel pxa25x-pwm. Currently all devices are
* supported identically.
*/
static struct of_device_id pwm_of_match[] = {
{ .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
{ .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
{ .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
{ .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
{ }
};
MODULE_DEVICE_TABLE(of, pwm_of_match);
#else
#define pwm_of_match NULL
#endif
static const struct platform_device_id *pxa_pwm_get_id_dt(struct device *dev)
{
const struct of_device_id *id = of_match_device(pwm_of_match, dev);
return id ? id->data : NULL;
}
static struct pwm_device *
pxa_pwm_of_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
{
struct pwm_device *pwm;
pwm = pwm_request_from_chip(pc, 0, NULL);
if (IS_ERR(pwm))
return pwm;
pwm_set_period(pwm, args->args[0]);
return pwm;
}
static int pwm_probe(struct platform_device *pdev) static int pwm_probe(struct platform_device *pdev)
{ {
const struct platform_device_id *id = platform_get_device_id(pdev); const struct platform_device_id *id = platform_get_device_id(pdev);
...@@ -131,6 +172,12 @@ static int pwm_probe(struct platform_device *pdev) ...@@ -131,6 +172,12 @@ static int pwm_probe(struct platform_device *pdev)
struct resource *r; struct resource *r;
int ret = 0; int ret = 0;
if (IS_ENABLED(CONFIG_OF) && id == NULL)
id = pxa_pwm_get_id_dt(&pdev->dev);
if (id == NULL)
return -EINVAL;
pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL); pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
if (pwm == NULL) { if (pwm == NULL) {
dev_err(&pdev->dev, "failed to allocate memory\n"); dev_err(&pdev->dev, "failed to allocate memory\n");
...@@ -146,6 +193,11 @@ static int pwm_probe(struct platform_device *pdev) ...@@ -146,6 +193,11 @@ static int pwm_probe(struct platform_device *pdev)
pwm->chip.base = -1; pwm->chip.base = -1;
pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1; pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
if (IS_ENABLED(CONFIG_OF)) {
pwm->chip.of_xlate = pxa_pwm_of_xlate;
pwm->chip.of_pwm_n_cells = 1;
}
r = platform_get_resource(pdev, IORESOURCE_MEM, 0); r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r); pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r);
if (IS_ERR(pwm->mmio_base)) if (IS_ERR(pwm->mmio_base))
...@@ -176,6 +228,7 @@ static struct platform_driver pwm_driver = { ...@@ -176,6 +228,7 @@ static struct platform_driver pwm_driver = {
.driver = { .driver = {
.name = "pxa25x-pwm", .name = "pxa25x-pwm",
.owner = THIS_MODULE, .owner = THIS_MODULE,
.of_match_table = pwm_of_match,
}, },
.probe = pwm_probe, .probe = pwm_probe,
.remove = pwm_remove, .remove = pwm_remove,
......
...@@ -279,7 +279,6 @@ static int ecap_pwm_remove(struct platform_device *pdev) ...@@ -279,7 +279,6 @@ static int ecap_pwm_remove(struct platform_device *pdev)
pwmss_submodule_state_change(pdev->dev.parent, PWMSS_ECAPCLK_STOP_REQ); pwmss_submodule_state_change(pdev->dev.parent, PWMSS_ECAPCLK_STOP_REQ);
pm_runtime_put_sync(&pdev->dev); pm_runtime_put_sync(&pdev->dev);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev); pm_runtime_disable(&pdev->dev);
return pwmchip_remove(&pc->chip); return pwmchip_remove(&pc->chip);
} }
......
...@@ -360,7 +360,7 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) ...@@ -360,7 +360,7 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
/* Enable TBCLK before enabling PWM device */ /* Enable TBCLK before enabling PWM device */
ret = clk_enable(pc->tbclk); ret = clk_enable(pc->tbclk);
if (ret) { if (ret) {
pr_err("Failed to enable TBCLK for %s\n", dev_err(chip->dev, "Failed to enable TBCLK for %s\n",
dev_name(pc->chip.dev)); dev_name(pc->chip.dev));
return ret; return ret;
} }
......
...@@ -169,15 +169,7 @@ static struct attribute *pwm_attrs[] = { ...@@ -169,15 +169,7 @@ static struct attribute *pwm_attrs[] = {
&dev_attr_polarity.attr, &dev_attr_polarity.attr,
NULL NULL
}; };
ATTRIBUTE_GROUPS(pwm);
static const struct attribute_group pwm_attr_group = {
.attrs = pwm_attrs,
};
static const struct attribute_group *pwm_attr_groups[] = {
&pwm_attr_group,
NULL,
};
static void pwm_export_release(struct device *child) static void pwm_export_release(struct device *child)
{ {
...@@ -205,7 +197,7 @@ static int pwm_export_child(struct device *parent, struct pwm_device *pwm) ...@@ -205,7 +197,7 @@ static int pwm_export_child(struct device *parent, struct pwm_device *pwm)
export->child.release = pwm_export_release; export->child.release = pwm_export_release;
export->child.parent = parent; export->child.parent = parent;
export->child.devt = MKDEV(0, 0); export->child.devt = MKDEV(0, 0);
export->child.groups = pwm_attr_groups; export->child.groups = pwm_groups;
dev_set_name(&export->child, "pwm%u", pwm->hwpwm); dev_set_name(&export->child, "pwm%u", pwm->hwpwm);
ret = device_register(&export->child); ret = device_register(&export->child);
......
...@@ -241,7 +241,6 @@ static int pwm_backlight_probe(struct platform_device *pdev) ...@@ -241,7 +241,6 @@ static int pwm_backlight_probe(struct platform_device *pdev)
pb = devm_kzalloc(&pdev->dev, sizeof(*pb), GFP_KERNEL); pb = devm_kzalloc(&pdev->dev, sizeof(*pb), GFP_KERNEL);
if (!pb) { if (!pb) {
dev_err(&pdev->dev, "no memory for state\n");
ret = -ENOMEM; ret = -ENOMEM;
goto err_alloc; goto err_alloc;
} }
......
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