Commit 3ac0e69e authored by Leon Romanovsky's avatar Leon Romanovsky

net/mlx5: Update main.c new cmd interface

Do mass update of main.c to reuse newly introduced
mlx5_cmd_exec_in*() interfaces.
Reviewed-by: default avatarMoshe Shemesh <moshe@mellanox.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@mellanox.com>
parent 253e790e
...@@ -206,8 +206,7 @@ static void mlx5_set_driver_version(struct mlx5_core_dev *dev) ...@@ -206,8 +206,7 @@ static void mlx5_set_driver_version(struct mlx5_core_dev *dev)
{ {
int driver_ver_sz = MLX5_FLD_SZ_BYTES(set_driver_version_in, int driver_ver_sz = MLX5_FLD_SZ_BYTES(set_driver_version_in,
driver_version); driver_version);
u8 in[MLX5_ST_SZ_BYTES(set_driver_version_in)] = {0}; u8 in[MLX5_ST_SZ_BYTES(set_driver_version_in)] = {};
u8 out[MLX5_ST_SZ_BYTES(set_driver_version_out)] = {0};
int remaining_size = driver_ver_sz; int remaining_size = driver_ver_sz;
char *string; char *string;
...@@ -234,7 +233,7 @@ static void mlx5_set_driver_version(struct mlx5_core_dev *dev) ...@@ -234,7 +233,7 @@ static void mlx5_set_driver_version(struct mlx5_core_dev *dev)
MLX5_SET(set_driver_version_in, in, opcode, MLX5_SET(set_driver_version_in, in, opcode,
MLX5_CMD_OP_SET_DRIVER_VERSION); MLX5_CMD_OP_SET_DRIVER_VERSION);
mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); mlx5_cmd_exec_in(dev, set_driver_version, in);
} }
static int set_dma_caps(struct pci_dev *pdev) static int set_dma_caps(struct pci_dev *pdev)
...@@ -366,7 +365,7 @@ static int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, ...@@ -366,7 +365,7 @@ static int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev,
MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP); MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
MLX5_SET(query_hca_cap_in, in, op_mod, opmod); MLX5_SET(query_hca_cap_in, in, op_mod, opmod);
err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz); err = mlx5_cmd_exec_inout(dev, query_hca_cap, in, out);
if (err) { if (err) {
mlx5_core_warn(dev, mlx5_core_warn(dev,
"QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n", "QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n",
...@@ -409,12 +408,9 @@ int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type) ...@@ -409,12 +408,9 @@ int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type)
static int set_caps(struct mlx5_core_dev *dev, void *in, int opmod) static int set_caps(struct mlx5_core_dev *dev, void *in, int opmod)
{ {
u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)] = {};
MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP); MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP);
MLX5_SET(set_hca_cap_in, in, op_mod, opmod << 1); MLX5_SET(set_hca_cap_in, in, op_mod, opmod << 1);
return mlx5_cmd_exec(dev, in, MLX5_ST_SZ_BYTES(set_hca_cap_in), out, return mlx5_cmd_exec_in(dev, set_hca_cap, in);
sizeof(out));
} }
static int handle_hca_cap_atomic(struct mlx5_core_dev *dev, void *set_ctx) static int handle_hca_cap_atomic(struct mlx5_core_dev *dev, void *set_ctx)
...@@ -653,26 +649,24 @@ static int mlx5_core_set_hca_defaults(struct mlx5_core_dev *dev) ...@@ -653,26 +649,24 @@ static int mlx5_core_set_hca_defaults(struct mlx5_core_dev *dev)
int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id) int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id)
{ {
u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {0}; u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {};
u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {0};
MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA); MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA);
MLX5_SET(enable_hca_in, in, function_id, func_id); MLX5_SET(enable_hca_in, in, function_id, func_id);
MLX5_SET(enable_hca_in, in, embedded_cpu_function, MLX5_SET(enable_hca_in, in, embedded_cpu_function,
dev->caps.embedded_cpu); dev->caps.embedded_cpu);
return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out)); return mlx5_cmd_exec_in(dev, enable_hca, in);
} }
int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id) int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id)
{ {
u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {0}; u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {};
u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {0};
MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA); MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA);
MLX5_SET(disable_hca_in, in, function_id, func_id); MLX5_SET(disable_hca_in, in, function_id, func_id);
MLX5_SET(enable_hca_in, in, embedded_cpu_function, MLX5_SET(enable_hca_in, in, embedded_cpu_function,
dev->caps.embedded_cpu); dev->caps.embedded_cpu);
return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); return mlx5_cmd_exec_in(dev, disable_hca, in);
} }
u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev, u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev,
...@@ -697,14 +691,13 @@ u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev, ...@@ -697,14 +691,13 @@ u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev,
static int mlx5_core_set_issi(struct mlx5_core_dev *dev) static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
{ {
u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0}; u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {};
u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {0}; u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {};
u32 sup_issi; u32 sup_issi;
int err; int err;
MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI); MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI);
err = mlx5_cmd_exec(dev, query_in, sizeof(query_in), err = mlx5_cmd_exec_inout(dev, query_issi, query_in, query_out);
query_out, sizeof(query_out));
if (err) { if (err) {
u32 syndrome; u32 syndrome;
u8 status; u8 status;
...@@ -724,13 +717,11 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev) ...@@ -724,13 +717,11 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0);
if (sup_issi & (1 << 1)) { if (sup_issi & (1 << 1)) {
u32 set_in[MLX5_ST_SZ_DW(set_issi_in)] = {0}; u32 set_in[MLX5_ST_SZ_DW(set_issi_in)] = {};
u32 set_out[MLX5_ST_SZ_DW(set_issi_out)] = {0};
MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI); MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI);
MLX5_SET(set_issi_in, set_in, current_issi, 1); MLX5_SET(set_issi_in, set_in, current_issi, 1);
err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), err = mlx5_cmd_exec_in(dev, set_issi, set_in);
set_out, sizeof(set_out));
if (err) { if (err) {
mlx5_core_err(dev, "Failed to set ISSI to 1 err(%d)\n", mlx5_core_err(dev, "Failed to set ISSI to 1 err(%d)\n",
err); err);
......
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