Commit 3b1db05c authored by Rob Herring's avatar Rob Herring Committed by Stephen Boyd

dt-bindings: clock: renesas: Make example 'clocks' parsable

'clocks' in the example is not parsable with the 0 phandle value
because the number of #clock-cells is unknown in the previous entry.
Solve this by adding the clock provider node. Only 'cpg_clocks' is
needed as the examples are built with fixups which can be used to
identify phandles.

This is in preparation to support schema validation on .dtb files.
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220301190400.1644150-1-robh@kernel.orgAcked-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 892e0dde
...@@ -51,6 +51,18 @@ additionalProperties: false ...@@ -51,6 +51,18 @@ additionalProperties: false
examples: examples:
- | - |
#include <dt-bindings/clock/r8a73a4-clock.h> #include <dt-bindings/clock/r8a73a4-clock.h>
cpg_clocks: cpg_clocks@e6150000 {
compatible = "renesas,r8a73a4-cpg-clocks";
reg = <0xe6150000 0x10000>;
clocks = <&extal1_clk>, <&extal2_clk>;
#clock-cells = <1>;
clock-output-names = "main", "pll0", "pll1", "pll2",
"pll2s", "pll2h", "z", "z2",
"i", "m3", "b", "m1", "m2",
"zx", "zs", "hp";
};
sdhi2_clk: sdhi2_clk@e615007c { sdhi2_clk: sdhi2_clk@e615007c {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe615007c 4>; reg = <0xe615007c 4>;
......
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