EDAC/zynqmp: Add EDAC support for Xilinx ZynqMP OCM

Add EDAC support for Xilinx ZynqMP OCM Controller, so this driver reports CE and
UE errors upon interrupt generation. Also add debugfs files for error injection.

On Xilinx ZynqMP platform, both OCM Controller driver(zynqmp_edac) and DDR
Memory Controller driver(synopsys_edac) co-exist which means both can be loaded
at a time. This scenario is tested on Xilinx ZynqMP platform.

Fix following issue reported by the robot:
  "MAINTAINERS references a file that doesn't exist:
  Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml"

  [ bp:
    - Massage commit message
    - s/EDAC_ZYNQMP_OCM/EDAC_ZYNQMP/
    - Touchups
      ]
Reported-by: kernel test robot <lkp@intel.com>
Co-developed-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230104084512.1855243-3-sai.krishna.potthuri@amd.com

MAINTAINERS

@@ -22908,6 +22908,13 @@ F:	Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml
 F:	drivers/dma/xilinx/xilinx_dpdma.c
 F:	include/dt-bindings/dma/xlnx-zynqmp-dpdma.h
 
+XILINX ZYNQMP OCM EDAC DRIVER
+M:	Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
+M:	Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
+S:	Maintained
+F:	Documentation/devicetree/bindings/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml
+F:	drivers/edac/zynqmp_edac.c
+
 XILINX ZYNQMP PSGTR PHY DRIVER
 M:	Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
 M:	Laurent Pinchart <laurent.pinchart@ideasonboard.com>

drivers/edac/Kconfig

@@ -542,4 +542,12 @@ config EDAC_DMC520
 	  Support for error detection and correction on the
 	  SoCs with ARM DMC-520 DRAM controller.
 
+config EDAC_ZYNQMP
+	tristate "Xilinx ZynqMP OCM Controller"
+	depends on ARCH_ZYNQMP || COMPILE_TEST
+	help
+	  This driver supports error detection and correction for the
+	  Xilinx ZynqMP OCM (On Chip Memory) controller. It can also be
+	  built as a module. In that case it will be called zynqmp_edac.
+
 endif # EDAC

drivers/edac/Makefile

@@ -84,3 +84,4 @@ obj-$(CONFIG_EDAC_QCOM)			+= qcom_edac.o
 obj-$(CONFIG_EDAC_ASPEED)		+= aspeed_edac.o
 obj-$(CONFIG_EDAC_BLUEFIELD)		+= bluefield_edac.o
 obj-$(CONFIG_EDAC_DMC520)		+= dmc520_edac.o
+obj-$(CONFIG_EDAC_ZYNQMP)		+= zynqmp_edac.o