Commit 3c5a0357 authored by Mans Rullgard's avatar Mans Rullgard Committed by Greg Kroah-Hartman

serial: 8250: add uart_config entry for PORT_RT2880

This adds an entry to the uart_config table for PORT_RT2880
enabling rx/tx FIFOs.  The UART is actually a Palmchip BK-3103
which is found in several devices from Alchemy/RMI, Ralink, and
Sigma Designs.
Signed-off-by: default avatarMans Rullgard <mans@mansr.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent facd885c
...@@ -261,6 +261,14 @@ configured less than Maximum supported fifo bytes */ ...@@ -261,6 +261,14 @@ configured less than Maximum supported fifo bytes */
UART_FCR7_64BYTE, UART_FCR7_64BYTE,
.flags = UART_CAP_FIFO, .flags = UART_CAP_FIFO,
}, },
[PORT_RT2880] = {
.name = "Palmchip BK-3103",
.fifo_size = 16,
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO,
},
}; };
/* Uart divisor latch read */ /* Uart divisor latch read */
......
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