Commit 3ccdccfa authored by Andi Kleen's avatar Andi Kleen Committed by H. Peter Anvin

x86: mce: Lower maximum number of banks to architecture limit

The Intel x86 architecture right now only supports 32 machine check
banks, more would bump into other MSRs.

So lower the max define to 32.

This only affects a few bitmaps, most data structures are dynamically
sized anyways.
Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent a2d32bcb
...@@ -130,10 +130,11 @@ void mce_log(struct mce *m); ...@@ -130,10 +130,11 @@ void mce_log(struct mce *m);
DECLARE_PER_CPU(struct sys_device, mce_dev); DECLARE_PER_CPU(struct sys_device, mce_dev);
/* /*
* To support more than 128 would need to escape the predefined * Maximum banks number.
* Linux defined extended banks first. * This is the limit of the current register layout on
* Intel CPUs.
*/ */
#define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1) #define MAX_NR_BANKS 32
#ifdef CONFIG_X86_MCE_INTEL #ifdef CONFIG_X86_MCE_INTEL
extern int mce_cmci_disabled; extern int mce_cmci_disabled;
......
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