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Commit 3e158e1f authored by Sakari Ailus's avatar Sakari Ailus Committed by Mauro Carvalho Chehab
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media: smiapp: Switch to CCS limits 

Use the CCS limit definitions instead of the SMIA ones. This allows
accessing CCS capabilities where needed as well as dropping the old SMIA
limits.
Signed-off-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent ca296a11
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drivers/media/i2c/smiapp/Makefile
View file @ 3e158e1f
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
smiapp-objs += smiapp-core.o smiapp-regs.o \ smiapp-objs += smiapp-core.o smiapp-regs.o \
smiapp-quirk.o smiapp-limits.o ccs-limits.o smiapp-quirk.o ccs-limits.o
obj-$(CONFIG_VIDEO_SMIAPP) += smiapp.o obj-$(CONFIG_VIDEO_SMIAPP) += smiapp.o
ccflags-y += -I $(srctree)/drivers/media/i2c ccflags-y += -I $(srctree)/drivers/media/i2c
drivers/media/i2c/smiapp/smiapp-core.c
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drivers/media/i2c/smiapp/smiapp-limits.c deleted 100644 → 0
View file @ ca296a11
// SPDX-License-Identifier: GPL-2.0-only
/*
* drivers/media/i2c/smiapp/smiapp-limits.c
*
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*/
#include "smiapp.h"
struct smiapp_reg_limits smiapp_reg_limits[] = {
{ SMIAPP_REG_U16_ANALOGUE_GAIN_CAPABILITY, "analogue_gain_capability" }, /* 0 */
{ SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_MIN, "analogue_gain_code_min" },
{ SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_MAX, "analogue_gain_code_max" },
{ SMIAPP_REG_U8_THS_ZERO_MIN, "ths_zero_min" },
{ SMIAPP_REG_U8_TCLK_TRAIL_MIN, "tclk_trail_min" },
{ SMIAPP_REG_U16_INTEGRATION_TIME_CAPABILITY, "integration_time_capability" }, /* 5 */
{ SMIAPP_REG_U16_COARSE_INTEGRATION_TIME_MIN, "coarse_integration_time_min" },
{ SMIAPP_REG_U16_COARSE_INTEGRATION_TIME_MAX_MARGIN, "coarse_integration_time_max_margin" },
{ SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MIN, "fine_integration_time_min" },
{ SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MAX_MARGIN, "fine_integration_time_max_margin" },
{ SMIAPP_REG_U16_DIGITAL_GAIN_CAPABILITY, "digital_gain_capability" }, /* 10 */
{ SMIAPP_REG_U16_DIGITAL_GAIN_MIN, "digital_gain_min" },
{ SMIAPP_REG_U16_DIGITAL_GAIN_MAX, "digital_gain_max" },
{ SMIAPP_REG_F32_MIN_EXT_CLK_FREQ_HZ, "min_ext_clk_freq_hz" },
{ SMIAPP_REG_F32_MAX_EXT_CLK_FREQ_HZ, "max_ext_clk_freq_hz" },
{ SMIAPP_REG_U16_MIN_PRE_PLL_CLK_DIV, "min_pre_pll_clk_div" }, /* 15 */
{ SMIAPP_REG_U16_MAX_PRE_PLL_CLK_DIV, "max_pre_pll_clk_div" },
{ SMIAPP_REG_F32_MIN_PLL_IP_FREQ_HZ, "min_pll_ip_freq_hz" },
{ SMIAPP_REG_F32_MAX_PLL_IP_FREQ_HZ, "max_pll_ip_freq_hz" },
{ SMIAPP_REG_U16_MIN_PLL_MULTIPLIER, "min_pll_multiplier" },
{ SMIAPP_REG_U16_MAX_PLL_MULTIPLIER, "max_pll_multiplier" }, /* 20 */
{ SMIAPP_REG_F32_MIN_PLL_OP_FREQ_HZ, "min_pll_op_freq_hz" },
{ SMIAPP_REG_F32_MAX_PLL_OP_FREQ_HZ, "max_pll_op_freq_hz" },
{ SMIAPP_REG_U16_MIN_VT_SYS_CLK_DIV, "min_vt_sys_clk_div" },
{ SMIAPP_REG_U16_MAX_VT_SYS_CLK_DIV, "max_vt_sys_clk_div" },
{ SMIAPP_REG_F32_MIN_VT_SYS_CLK_FREQ_HZ, "min_vt_sys_clk_freq_hz" }, /* 25 */
{ SMIAPP_REG_F32_MAX_VT_SYS_CLK_FREQ_HZ, "max_vt_sys_clk_freq_hz" },
{ SMIAPP_REG_F32_MIN_VT_PIX_CLK_FREQ_HZ, "min_vt_pix_clk_freq_hz" },
{ SMIAPP_REG_F32_MAX_VT_PIX_CLK_FREQ_HZ, "max_vt_pix_clk_freq_hz" },
{ SMIAPP_REG_U16_MIN_VT_PIX_CLK_DIV, "min_vt_pix_clk_div" },
{ SMIAPP_REG_U16_MAX_VT_PIX_CLK_DIV, "max_vt_pix_clk_div" }, /* 30 */
{ SMIAPP_REG_U16_MIN_FRAME_LENGTH_LINES, "min_frame_length_lines" },
{ SMIAPP_REG_U16_MAX_FRAME_LENGTH_LINES, "max_frame_length_lines" },
{ SMIAPP_REG_U16_MIN_LINE_LENGTH_PCK, "min_line_length_pck" },
{ SMIAPP_REG_U16_MAX_LINE_LENGTH_PCK, "max_line_length_pck" },
{ SMIAPP_REG_U16_MIN_LINE_BLANKING_PCK, "min_line_blanking_pck" }, /* 35 */
{ SMIAPP_REG_U16_MIN_FRAME_BLANKING_LINES, "min_frame_blanking_lines" },
{ SMIAPP_REG_U8_MIN_LINE_LENGTH_PCK_STEP_SIZE, "min_line_length_pck_step_size" },
{ SMIAPP_REG_U16_MIN_OP_SYS_CLK_DIV, "min_op_sys_clk_div" },
{ SMIAPP_REG_U16_MAX_OP_SYS_CLK_DIV, "max_op_sys_clk_div" },
{ SMIAPP_REG_F32_MIN_OP_SYS_CLK_FREQ_HZ, "min_op_sys_clk_freq_hz" }, /* 40 */
{ SMIAPP_REG_F32_MAX_OP_SYS_CLK_FREQ_HZ, "max_op_sys_clk_freq_hz" },
{ SMIAPP_REG_U16_MIN_OP_PIX_CLK_DIV, "min_op_pix_clk_div" },
{ SMIAPP_REG_U16_MAX_OP_PIX_CLK_DIV, "max_op_pix_clk_div" },
{ SMIAPP_REG_F32_MIN_OP_PIX_CLK_FREQ_HZ, "min_op_pix_clk_freq_hz" },
{ SMIAPP_REG_F32_MAX_OP_PIX_CLK_FREQ_HZ, "max_op_pix_clk_freq_hz" }, /* 45 */
{ SMIAPP_REG_U16_X_ADDR_MIN, "x_addr_min" },
{ SMIAPP_REG_U16_Y_ADDR_MIN, "y_addr_min" },
{ SMIAPP_REG_U16_X_ADDR_MAX, "x_addr_max" },
{ SMIAPP_REG_U16_Y_ADDR_MAX, "y_addr_max" },
{ SMIAPP_REG_U16_MIN_X_OUTPUT_SIZE, "min_x_output_size" }, /* 50 */
{ SMIAPP_REG_U16_MIN_Y_OUTPUT_SIZE, "min_y_output_size" },
{ SMIAPP_REG_U16_MAX_X_OUTPUT_SIZE, "max_x_output_size" },
{ SMIAPP_REG_U16_MAX_Y_OUTPUT_SIZE, "max_y_output_size" },
{ SMIAPP_REG_U16_MIN_EVEN_INC, "min_even_inc" },
{ SMIAPP_REG_U16_MAX_EVEN_INC, "max_even_inc" }, /* 55 */
{ SMIAPP_REG_U16_MIN_ODD_INC, "min_odd_inc" },
{ SMIAPP_REG_U16_MAX_ODD_INC, "max_odd_inc" },
{ SMIAPP_REG_U16_SCALING_CAPABILITY, "scaling_capability" },
{ SMIAPP_REG_U16_SCALER_M_MIN, "scaler_m_min" },
{ SMIAPP_REG_U16_SCALER_M_MAX, "scaler_m_max" }, /* 60 */
{ SMIAPP_REG_U16_SCALER_N_MIN, "scaler_n_min" },
{ SMIAPP_REG_U16_SCALER_N_MAX, "scaler_n_max" },
{ SMIAPP_REG_U16_SPATIAL_SAMPLING_CAPABILITY, "spatial_sampling_capability" },
{ SMIAPP_REG_U8_DIGITAL_CROP_CAPABILITY, "digital_crop_capability" },
{ SMIAPP_REG_U16_COMPRESSION_CAPABILITY, "compression_capability" }, /* 65 */
{ SMIAPP_REG_U8_FIFO_SUPPORT_CAPABILITY, "fifo_support_capability" },
{ SMIAPP_REG_U8_DPHY_CTRL_CAPABILITY, "dphy_ctrl_capability" },
{ SMIAPP_REG_U8_CSI_LANE_MODE_CAPABILITY, "csi_lane_mode_capability" },
{ SMIAPP_REG_U8_CSI_SIGNALLING_MODE_CAPABILITY, "csi_signalling_mode_capability" },
{ SMIAPP_REG_U8_FAST_STANDBY_CAPABILITY, "fast_standby_capability" }, /* 70 */
{ SMIAPP_REG_U8_CCI_ADDRESS_CONTROL_CAPABILITY, "cci_address_control_capability" },
{ SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_1_LANE_MODE_MBPS, "max_per_lane_bitrate_1_lane_mode_mbps" },
{ SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_2_LANE_MODE_MBPS, "max_per_lane_bitrate_2_lane_mode_mbps" },
{ SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_3_LANE_MODE_MBPS, "max_per_lane_bitrate_3_lane_mode_mbps" },
{ SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_4_LANE_MODE_MBPS, "max_per_lane_bitrate_4_lane_mode_mbps" }, /* 75 */
{ SMIAPP_REG_U8_TEMP_SENSOR_CAPABILITY, "temp_sensor_capability" },
{ SMIAPP_REG_U16_MIN_FRAME_LENGTH_LINES_BIN, "min_frame_length_lines_bin" },
{ SMIAPP_REG_U16_MAX_FRAME_LENGTH_LINES_BIN, "max_frame_length_lines_bin" },
{ SMIAPP_REG_U16_MIN_LINE_LENGTH_PCK_BIN, "min_line_length_pck_bin" },
{ SMIAPP_REG_U16_MAX_LINE_LENGTH_PCK_BIN, "max_line_length_pck_bin" }, /* 80 */
{ SMIAPP_REG_U16_MIN_LINE_BLANKING_PCK_BIN, "min_line_blanking_pck_bin" },
{ SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MIN_BIN, "fine_integration_time_min_bin" },
{ SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MAX_MARGIN_BIN, "fine_integration_time_max_margin_bin" },
{ SMIAPP_REG_U8_BINNING_CAPABILITY, "binning_capability" },
{ SMIAPP_REG_U8_BINNING_WEIGHTING_CAPABILITY, "binning_weighting_capability" }, /* 85 */
{ SMIAPP_REG_U8_DATA_TRANSFER_IF_CAPABILITY, "data_transfer_if_capability" },
{ SMIAPP_REG_U8_SHADING_CORRECTION_CAPABILITY, "shading_correction_capability" },
{ SMIAPP_REG_U8_GREEN_IMBALANCE_CAPABILITY, "green_imbalance_capability" },
{ SMIAPP_REG_U8_BLACK_LEVEL_CAPABILITY, "black_level_capability" },
{ SMIAPP_REG_U8_MODULE_SPECIFIC_CORRECTION_CAPABILITY, "module_specific_correction_capability" }, /* 90 */
{ SMIAPP_REG_U16_DEFECT_CORRECTION_CAPABILITY, "defect_correction_capability" },
{ SMIAPP_REG_U16_DEFECT_CORRECTION_CAPABILITY_2, "defect_correction_capability_2" },
{ SMIAPP_REG_U8_EDOF_CAPABILITY, "edof_capability" },
{ SMIAPP_REG_U8_COLOUR_FEEDBACK_CAPABILITY, "colour_feedback_capability" },
{ SMIAPP_REG_U8_ESTIMATION_MODE_CAPABILITY, "estimation_mode_capability" }, /* 95 */
{ SMIAPP_REG_U8_ESTIMATION_ZONE_CAPABILITY, "estimation_zone_capability" },
{ SMIAPP_REG_U16_CAPABILITY_TRDY_MIN, "capability_trdy_min" },
{ SMIAPP_REG_U8_FLASH_MODE_CAPABILITY, "flash_mode_capability" },
{ SMIAPP_REG_U8_ACTUATOR_CAPABILITY, "actuator_capability" },
{ SMIAPP_REG_U8_BRACKETING_LUT_CAPABILITY_1, "bracketing_lut_capability_1" }, /* 100 */
{ SMIAPP_REG_U8_BRACKETING_LUT_CAPABILITY_2, "bracketing_lut_capability_2" },
{ SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_STEP, "analogue_gain_code_step" },
{ 0, NULL },
};
drivers/media/i2c/smiapp/smiapp-limits.h deleted 100644 → 0
View file @ ca296a11
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* drivers/media/i2c/smiapp/smiapp-limits.h
*
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*/
#define SMIAPP_LIMIT_ANALOGUE_GAIN_CAPABILITY 0
#define SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN 1
#define SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX 2
#define SMIAPP_LIMIT_THS_ZERO_MIN 3
#define SMIAPP_LIMIT_TCLK_TRAIL_MIN 4
#define SMIAPP_LIMIT_INTEGRATION_TIME_CAPABILITY 5
#define SMIAPP_LIMIT_COARSE_INTEGRATION_TIME_MIN 6
#define SMIAPP_LIMIT_COARSE_INTEGRATION_TIME_MAX_MARGIN 7
#define SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MIN 8
#define SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MAX_MARGIN 9
#define SMIAPP_LIMIT_DIGITAL_GAIN_CAPABILITY 10
#define SMIAPP_LIMIT_DIGITAL_GAIN_MIN 11
#define SMIAPP_LIMIT_DIGITAL_GAIN_MAX 12
#define SMIAPP_LIMIT_MIN_EXT_CLK_FREQ_HZ 13
#define SMIAPP_LIMIT_MAX_EXT_CLK_FREQ_HZ 14
#define SMIAPP_LIMIT_MIN_PRE_PLL_CLK_DIV 15
#define SMIAPP_LIMIT_MAX_PRE_PLL_CLK_DIV 16
#define SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ 17
#define SMIAPP_LIMIT_MAX_PLL_IP_FREQ_HZ 18
#define SMIAPP_LIMIT_MIN_PLL_MULTIPLIER 19
#define SMIAPP_LIMIT_MAX_PLL_MULTIPLIER 20
#define SMIAPP_LIMIT_MIN_PLL_OP_FREQ_HZ 21
#define SMIAPP_LIMIT_MAX_PLL_OP_FREQ_HZ 22
#define SMIAPP_LIMIT_MIN_VT_SYS_CLK_DIV 23
#define SMIAPP_LIMIT_MAX_VT_SYS_CLK_DIV 24
#define SMIAPP_LIMIT_MIN_VT_SYS_CLK_FREQ_HZ 25
#define SMIAPP_LIMIT_MAX_VT_SYS_CLK_FREQ_HZ 26
#define SMIAPP_LIMIT_MIN_VT_PIX_CLK_FREQ_HZ 27
#define SMIAPP_LIMIT_MAX_VT_PIX_CLK_FREQ_HZ 28
#define SMIAPP_LIMIT_MIN_VT_PIX_CLK_DIV 29
#define SMIAPP_LIMIT_MAX_VT_PIX_CLK_DIV 30
#define SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES 31
#define SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES 32
#define SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK 33
#define SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK 34
#define SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK 35
#define SMIAPP_LIMIT_MIN_FRAME_BLANKING_LINES 36
#define SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_STEP_SIZE 37
#define SMIAPP_LIMIT_MIN_OP_SYS_CLK_DIV 38
#define SMIAPP_LIMIT_MAX_OP_SYS_CLK_DIV 39
#define SMIAPP_LIMIT_MIN_OP_SYS_CLK_FREQ_HZ 40
#define SMIAPP_LIMIT_MAX_OP_SYS_CLK_FREQ_HZ 41
#define SMIAPP_LIMIT_MIN_OP_PIX_CLK_DIV 42
#define SMIAPP_LIMIT_MAX_OP_PIX_CLK_DIV 43
#define SMIAPP_LIMIT_MIN_OP_PIX_CLK_FREQ_HZ 44
#define SMIAPP_LIMIT_MAX_OP_PIX_CLK_FREQ_HZ 45
#define SMIAPP_LIMIT_X_ADDR_MIN 46
#define SMIAPP_LIMIT_Y_ADDR_MIN 47
#define SMIAPP_LIMIT_X_ADDR_MAX 48
#define SMIAPP_LIMIT_Y_ADDR_MAX 49
#define SMIAPP_LIMIT_MIN_X_OUTPUT_SIZE 50
#define SMIAPP_LIMIT_MIN_Y_OUTPUT_SIZE 51
#define SMIAPP_LIMIT_MAX_X_OUTPUT_SIZE 52
#define SMIAPP_LIMIT_MAX_Y_OUTPUT_SIZE 53
#define SMIAPP_LIMIT_MIN_EVEN_INC 54
#define SMIAPP_LIMIT_MAX_EVEN_INC 55
#define SMIAPP_LIMIT_MIN_ODD_INC 56
#define SMIAPP_LIMIT_MAX_ODD_INC 57
#define SMIAPP_LIMIT_SCALING_CAPABILITY 58
#define SMIAPP_LIMIT_SCALER_M_MIN 59
#define SMIAPP_LIMIT_SCALER_M_MAX 60
#define SMIAPP_LIMIT_SCALER_N_MIN 61
#define SMIAPP_LIMIT_SCALER_N_MAX 62
#define SMIAPP_LIMIT_SPATIAL_SAMPLING_CAPABILITY 63
#define SMIAPP_LIMIT_DIGITAL_CROP_CAPABILITY 64
#define SMIAPP_LIMIT_COMPRESSION_CAPABILITY 65
#define SMIAPP_LIMIT_FIFO_SUPPORT_CAPABILITY 66
#define SMIAPP_LIMIT_DPHY_CTRL_CAPABILITY 67
#define SMIAPP_LIMIT_CSI_LANE_MODE_CAPABILITY 68
#define SMIAPP_LIMIT_CSI_SIGNALLING_MODE_CAPABILITY 69
#define SMIAPP_LIMIT_FAST_STANDBY_CAPABILITY 70
#define SMIAPP_LIMIT_CCI_ADDRESS_CONTROL_CAPABILITY 71
#define SMIAPP_LIMIT_MAX_PER_LANE_BITRATE_1_LANE_MODE_MBPS 72
#define SMIAPP_LIMIT_MAX_PER_LANE_BITRATE_2_LANE_MODE_MBPS 73
#define SMIAPP_LIMIT_MAX_PER_LANE_BITRATE_3_LANE_MODE_MBPS 74
#define SMIAPP_LIMIT_MAX_PER_LANE_BITRATE_4_LANE_MODE_MBPS 75
#define SMIAPP_LIMIT_TEMP_SENSOR_CAPABILITY 76
#define SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN 77
#define SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES_BIN 78
#define SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN 79
#define SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK_BIN 80
#define SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN 81
#define SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MIN_BIN 82
#define SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MAX_MARGIN_BIN 83
#define SMIAPP_LIMIT_BINNING_CAPABILITY 84
#define SMIAPP_LIMIT_BINNING_WEIGHTING_CAPABILITY 85
#define SMIAPP_LIMIT_DATA_TRANSFER_IF_CAPABILITY 86
#define SMIAPP_LIMIT_SHADING_CORRECTION_CAPABILITY 87
#define SMIAPP_LIMIT_GREEN_IMBALANCE_CAPABILITY 88
#define SMIAPP_LIMIT_BLACK_LEVEL_CAPABILITY 89
#define SMIAPP_LIMIT_MODULE_SPECIFIC_CORRECTION_CAPABILITY 90
#define SMIAPP_LIMIT_DEFECT_CORRECTION_CAPABILITY 91
#define SMIAPP_LIMIT_DEFECT_CORRECTION_CAPABILITY_2 92
#define SMIAPP_LIMIT_EDOF_CAPABILITY 93
#define SMIAPP_LIMIT_COLOUR_FEEDBACK_CAPABILITY 94
#define SMIAPP_LIMIT_ESTIMATION_MODE_CAPABILITY 95
#define SMIAPP_LIMIT_ESTIMATION_ZONE_CAPABILITY 96
#define SMIAPP_LIMIT_CAPABILITY_TRDY_MIN 97
#define SMIAPP_LIMIT_FLASH_MODE_CAPABILITY 98
#define SMIAPP_LIMIT_ACTUATOR_CAPABILITY 99
#define SMIAPP_LIMIT_BRACKETING_LUT_CAPABILITY_1 100
#define SMIAPP_LIMIT_BRACKETING_LUT_CAPABILITY_2 101
#define SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_STEP 102
#define SMIAPP_LIMIT_LAST 103
drivers/media/i2c/smiapp/smiapp-quirk.c
View file @ 3e158e1f
...@@ -10,6 +10,8 @@ ...@@ -10,6 +10,8 @@
#include <linux/delay.h> #include <linux/delay.h>
#include "ccs-limits.h"
#include "smiapp.h" #include "smiapp.h"
static int smiapp_write_8(struct smiapp_sensor *sensor, u16 reg, u8 val) static int smiapp_write_8(struct smiapp_sensor *sensor, u16 reg, u8 val)
...@@ -36,17 +38,6 @@ static int smiapp_write_8s(struct smiapp_sensor *sensor, ...@@ -36,17 +38,6 @@ static int smiapp_write_8s(struct smiapp_sensor *sensor,
return 0; return 0;
} }
void smiapp_replace_limit(struct smiapp_sensor *sensor,
u32 limit, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
dev_dbg(&client->dev, "quirk: 0x%8.8x \"%s\" = %d, 0x%x\n",
smiapp_reg_limits[limit].addr,
smiapp_reg_limits[limit].what, val, val);
sensor->limits[limit] = val;
}
static int jt8ew9_limits(struct smiapp_sensor *sensor) static int jt8ew9_limits(struct smiapp_sensor *sensor)
{ {
if (sensor->minfo.revision_number_major < 0x03) if (sensor->minfo.revision_number_major < 0x03)
...@@ -54,9 +45,8 @@ static int jt8ew9_limits(struct smiapp_sensor *sensor) ...@@ -54,9 +45,8 @@ static int jt8ew9_limits(struct smiapp_sensor *sensor)
/* Below 24 gain doesn't have effect at all, */ /* Below 24 gain doesn't have effect at all, */
/* but ~59 is needed for full dynamic range */ /* but ~59 is needed for full dynamic range */
smiapp_replace_limit(sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN, 59); ccs_replace_limit(sensor, CCS_L_ANALOG_GAIN_CODE_MIN, 0, 59);
smiapp_replace_limit( ccs_replace_limit(sensor, CCS_L_ANALOG_GAIN_CODE_MAX, 0, 6000);
sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX, 6000);
return 0; return 0;
} }
...@@ -126,9 +116,8 @@ const struct smiapp_quirk smiapp_imx125es_quirk = { ...@@ -126,9 +116,8 @@ const struct smiapp_quirk smiapp_imx125es_quirk = {
static int jt8ev1_limits(struct smiapp_sensor *sensor) static int jt8ev1_limits(struct smiapp_sensor *sensor)
{ {
smiapp_replace_limit(sensor, SMIAPP_LIMIT_X_ADDR_MAX, 4271); ccs_replace_limit(sensor, CCS_L_X_ADDR_MAX, 0, 4271);
smiapp_replace_limit(sensor, ccs_replace_limit(sensor, CCS_L_MIN_LINE_BLANKING_PCK_BIN, 0, 184);
SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN, 184);
return 0; return 0;
} }
...@@ -221,7 +210,7 @@ const struct smiapp_quirk smiapp_jt8ev1_quirk = { ...@@ -221,7 +210,7 @@ const struct smiapp_quirk smiapp_jt8ev1_quirk = {
static int tcm8500md_limits(struct smiapp_sensor *sensor) static int tcm8500md_limits(struct smiapp_sensor *sensor)
{ {
smiapp_replace_limit(sensor, SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ, 2700000); ccs_replace_limit(sensor, CCS_L_MIN_PLL_IP_CLK_FREQ_MHZ, 0, 2700000);
return 0; return 0;
} }
......
drivers/media/i2c/smiapp/smiapp-quirk.h
View file @ 3e158e1f
...@@ -55,9 +55,6 @@ struct smiapp_reg_8 { ...@@ -55,9 +55,6 @@ struct smiapp_reg_8 {
u8 val; u8 val;
}; };
void smiapp_replace_limit(struct smiapp_sensor *sensor,
u32 limit, u32 val);
#define SMIAPP_MK_QUIRK_REG_8(_reg, _val) \ #define SMIAPP_MK_QUIRK_REG_8(_reg, _val) \
{ \ { \
.reg = (u16)_reg, \ .reg = (u16)_reg, \
......
drivers/media/i2c/smiapp/smiapp.h
View file @ 3e158e1f
...@@ -84,8 +84,6 @@ struct smiapp_hwconfig { ...@@ -84,8 +84,6 @@ struct smiapp_hwconfig {
struct smiapp_flash_strobe_parms *strobe_setup; struct smiapp_flash_strobe_parms *strobe_setup;
}; };
#include "smiapp-limits.h"
struct smiapp_quirk; struct smiapp_quirk;
#define SMIAPP_MODULE_IDENT_FLAG_REV_LE (1 << 0) #define SMIAPP_MODULE_IDENT_FLAG_REV_LE (1 << 0)
...@@ -167,13 +165,6 @@ struct smiapp_module_info { ...@@ -167,13 +165,6 @@ struct smiapp_module_info {
.flags = 0, \ .flags = 0, \
.name = _name, } .name = _name, }
struct smiapp_reg_limits {
u32 addr;
char *what;
};
extern struct smiapp_reg_limits smiapp_reg_limits[];
struct smiapp_csi_data_format { struct smiapp_csi_data_format {
u32 code; u32 code;
u8 width; u8 width;
...@@ -227,7 +218,6 @@ struct smiapp_sensor { ...@@ -227,7 +218,6 @@ struct smiapp_sensor {
struct regulator *vana; struct regulator *vana;
struct clk *ext_clk; struct clk *ext_clk;
struct gpio_desc *xshutdown; struct gpio_desc *xshutdown;
u32 limits[SMIAPP_LIMIT_LAST];
void *ccs_limits; void *ccs_limits;
u8 nbinning_subtypes; u8 nbinning_subtypes;
struct smiapp_binning_subtype binning_subtypes[SMIAPP_BINNING_SUBTYPES]; struct smiapp_binning_subtype binning_subtypes[SMIAPP_BINNING_SUBTYPES];
......
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