Commit 3e3bf207 authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Pierre Ossman

sdhci: Add quirk for controllers that need small delays for PIO

Small udelay is needed to make eSDHC work in PIO mode. Without
the delay reading causes endless interrupt storm, and writing
corrupts data. The first guess would be that we must wait for
some bit in some register, but I didn't find any reliable bits
that change before and after the delay.
Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: default avatarPierre Ossman <drzeus@drzeus.cx>
parent 8114634c
...@@ -336,6 +336,9 @@ static void sdhci_transfer_pio(struct sdhci_host *host) ...@@ -336,6 +336,9 @@ static void sdhci_transfer_pio(struct sdhci_host *host)
mask = ~0; mask = ~0;
while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY)
udelay(100);
if (host->data->flags & MMC_DATA_READ) if (host->data->flags & MMC_DATA_READ)
sdhci_read_block_pio(host); sdhci_read_block_pio(host);
else else
......
...@@ -220,6 +220,8 @@ struct sdhci_host { ...@@ -220,6 +220,8 @@ struct sdhci_host {
#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16) #define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16)
/* Controller has nonstandard clock management */ /* Controller has nonstandard clock management */
#define SDHCI_QUIRK_NONSTANDARD_CLOCK (1<<17) #define SDHCI_QUIRK_NONSTANDARD_CLOCK (1<<17)
/* Controller does not like fast PIO transfers */
#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18)
int irq; /* Device IRQ */ int irq; /* Device IRQ */
void __iomem * ioaddr; /* Mapped address */ void __iomem * ioaddr; /* Mapped address */
......
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