Commit 3e490042 authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Mika Kuoppala

drm/i915/gtt: Make I915_PDPES_PER_PDP inline function

The macro takes a vm pointer at some sites, and dev_priv on others
We were saved as the internal macro never deferences the pointer
given.

As the number of pdpes depend on vm configuration, make it
as a inline function that accepts vm pointer.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wsilon.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1488295691-9404-1-git-send-email-mika.kuoppala@intel.com
parent 05425249
...@@ -528,7 +528,7 @@ static void gen8_initialize_pd(struct i915_address_space *vm, ...@@ -528,7 +528,7 @@ static void gen8_initialize_pd(struct i915_address_space *vm,
static int __pdp_init(struct i915_address_space *vm, static int __pdp_init(struct i915_address_space *vm,
struct i915_page_directory_pointer *pdp) struct i915_page_directory_pointer *pdp)
{ {
const unsigned int pdpes = I915_PDPES_PER_PDP(vm->i915); const unsigned int pdpes = i915_pdpes_per_pdp(vm);
unsigned int i; unsigned int i;
pdp->page_directory = kmalloc_array(pdpes, sizeof(*pdp->page_directory), pdp->page_directory = kmalloc_array(pdpes, sizeof(*pdp->page_directory),
...@@ -852,7 +852,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt, ...@@ -852,7 +852,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
gen8_pte_t *vaddr; gen8_pte_t *vaddr;
bool ret; bool ret;
GEM_BUG_ON(idx->pdpe >= I915_PDPES_PER_PDP(vm)); GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->base));
pd = pdp->page_directory[idx->pdpe]; pd = pdp->page_directory[idx->pdpe];
vaddr = kmap_atomic_px(pd->page_table[idx->pde]); vaddr = kmap_atomic_px(pd->page_table[idx->pde]);
do { do {
...@@ -883,7 +883,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt, ...@@ -883,7 +883,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
break; break;
} }
GEM_BUG_ON(idx->pdpe >= I915_PDPES_PER_PDP(vm)); GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->base));
pd = pdp->page_directory[idx->pdpe]; pd = pdp->page_directory[idx->pdpe];
} }
...@@ -1036,9 +1036,10 @@ static void gen8_free_scratch(struct i915_address_space *vm) ...@@ -1036,9 +1036,10 @@ static void gen8_free_scratch(struct i915_address_space *vm)
static void gen8_ppgtt_cleanup_3lvl(struct i915_address_space *vm, static void gen8_ppgtt_cleanup_3lvl(struct i915_address_space *vm,
struct i915_page_directory_pointer *pdp) struct i915_page_directory_pointer *pdp)
{ {
const unsigned int pdpes = i915_pdpes_per_pdp(vm);
int i; int i;
for (i = 0; i < I915_PDPES_PER_PDP(vm->i915); i++) { for (i = 0; i < pdpes; i++) {
if (pdp->page_directory[i] == vm->scratch_pd) if (pdp->page_directory[i] == vm->scratch_pd)
continue; continue;
...@@ -1127,7 +1128,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm, ...@@ -1127,7 +1128,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm,
gen8_initialize_pd(vm, pd); gen8_initialize_pd(vm, pd);
gen8_ppgtt_set_pdpe(vm, pdp, pd, pdpe); gen8_ppgtt_set_pdpe(vm, pdp, pd, pdpe);
pdp->used_pdpes++; pdp->used_pdpes++;
GEM_BUG_ON(pdp->used_pdpes > I915_PDPES_PER_PDP(vm)); GEM_BUG_ON(pdp->used_pdpes > i915_pdpes_per_pdp(vm));
mark_tlbs_dirty(i915_vm_to_ppgtt(vm)); mark_tlbs_dirty(i915_vm_to_ppgtt(vm));
} }
...@@ -1201,6 +1202,7 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt, ...@@ -1201,6 +1202,7 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
gen8_pte_t scratch_pte, gen8_pte_t scratch_pte,
struct seq_file *m) struct seq_file *m)
{ {
struct i915_address_space *vm = &ppgtt->base;
struct i915_page_directory *pd; struct i915_page_directory *pd;
u32 pdpe; u32 pdpe;
......
...@@ -125,9 +125,6 @@ typedef u64 gen8_ppgtt_pml4e_t; ...@@ -125,9 +125,6 @@ typedef u64 gen8_ppgtt_pml4e_t;
#define GEN8_LEGACY_PDPES 4 #define GEN8_LEGACY_PDPES 4
#define GEN8_PTES I915_PTES(sizeof(gen8_pte_t)) #define GEN8_PTES I915_PTES(sizeof(gen8_pte_t))
#define I915_PDPES_PER_PDP(dev_priv) (USES_FULL_48BIT_PPGTT(dev_priv) ?\
GEN8_PML4ES_PER_PML4 : GEN8_LEGACY_PDPES)
#define PPAT_UNCACHED_INDEX (_PAGE_PWT | _PAGE_PCD) #define PPAT_UNCACHED_INDEX (_PAGE_PWT | _PAGE_PCD)
#define PPAT_CACHED_PDE_INDEX 0 /* WB LLC */ #define PPAT_CACHED_PDE_INDEX 0 /* WB LLC */
#define PPAT_CACHED_INDEX _PAGE_PAT /* WB LLCeLLC */ #define PPAT_CACHED_INDEX _PAGE_PAT /* WB LLCeLLC */
...@@ -332,6 +329,12 @@ struct i915_address_space { ...@@ -332,6 +329,12 @@ struct i915_address_space {
#define i915_is_ggtt(V) (!(V)->file) #define i915_is_ggtt(V) (!(V)->file)
static inline bool
i915_vm_is_48bit(const struct i915_address_space *vm)
{
return (vm->total - 1) >> 32;
}
/* The Graphics Translation Table is the way in which GEN hardware translates a /* The Graphics Translation Table is the way in which GEN hardware translates a
* Graphics Virtual Address into a Physical Address. In addition to the normal * Graphics Virtual Address into a Physical Address. In addition to the normal
* collateral associated with any va->pa translations GEN hardware also has a * collateral associated with any va->pa translations GEN hardware also has a
...@@ -457,6 +460,15 @@ static inline u32 gen6_pde_index(u32 addr) ...@@ -457,6 +460,15 @@ static inline u32 gen6_pde_index(u32 addr)
return i915_pde_index(addr, GEN6_PDE_SHIFT); return i915_pde_index(addr, GEN6_PDE_SHIFT);
} }
static inline unsigned int
i915_pdpes_per_pdp(const struct i915_address_space *vm)
{
if (i915_vm_is_48bit(vm))
return GEN8_PML4ES_PER_PML4;
return GEN8_LEGACY_PDPES;
}
/* Equivalent to the gen6 version, For each pde iterates over every pde /* Equivalent to the gen6 version, For each pde iterates over every pde
* between from start until start + length. On gen8+ it simply iterates * between from start until start + length. On gen8+ it simply iterates
* over every page directory entry in a page directory. * over every page directory entry in a page directory.
...@@ -471,7 +483,7 @@ static inline u32 gen6_pde_index(u32 addr) ...@@ -471,7 +483,7 @@ static inline u32 gen6_pde_index(u32 addr)
#define gen8_for_each_pdpe(pd, pdp, start, length, iter) \ #define gen8_for_each_pdpe(pd, pdp, start, length, iter) \
for (iter = gen8_pdpe_index(start); \ for (iter = gen8_pdpe_index(start); \
length > 0 && iter < I915_PDPES_PER_PDP(dev) && \ length > 0 && iter < i915_pdpes_per_pdp(vm) && \
(pd = (pdp)->page_directory[iter], true); \ (pd = (pdp)->page_directory[iter], true); \
({ u64 temp = ALIGN(start+1, 1 << GEN8_PDPE_SHIFT); \ ({ u64 temp = ALIGN(start+1, 1 << GEN8_PDPE_SHIFT); \
temp = min(temp - start, length); \ temp = min(temp - start, length); \
...@@ -523,12 +535,6 @@ i915_vm_to_ggtt(struct i915_address_space *vm) ...@@ -523,12 +535,6 @@ i915_vm_to_ggtt(struct i915_address_space *vm)
return container_of(vm, struct i915_ggtt, base); return container_of(vm, struct i915_ggtt, base);
} }
static inline bool
i915_vm_is_48bit(const struct i915_address_space *vm)
{
return (vm->total - 1) >> 32;
}
int i915_gem_init_aliasing_ppgtt(struct drm_i915_private *i915); int i915_gem_init_aliasing_ppgtt(struct drm_i915_private *i915);
void i915_gem_fini_aliasing_ppgtt(struct drm_i915_private *i915); void i915_gem_fini_aliasing_ppgtt(struct drm_i915_private *i915);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment