Commit 3e6fdeb2 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by David S. Miller

net: dsa: lantiq_gswip: Let GSWIP automatically set the xMII clock

The xMII interface clock depends on the PHY interface (MII, RMII, RGMII)
as well as the current link speed. Explicitly configure the GSWIP to
automatically select the appropriate xMII interface clock.

This fixes an issue seen by some users where ports using an external
RMII or RGMII PHY were deaf (no RX or TX traffic could be seen). Most
likely this is due to an "invalid" xMII clock being selected either by
the bootloader or hardware-defaults.

Fixes: 14fceff4 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200")
Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3ed14d8d
...@@ -799,10 +799,15 @@ static int gswip_setup(struct dsa_switch *ds) ...@@ -799,10 +799,15 @@ static int gswip_setup(struct dsa_switch *ds)
/* Configure the MDIO Clock 2.5 MHz */ /* Configure the MDIO Clock 2.5 MHz */
gswip_mdio_mask(priv, 0xff, 0x09, GSWIP_MDIO_MDC_CFG1); gswip_mdio_mask(priv, 0xff, 0x09, GSWIP_MDIO_MDC_CFG1);
/* Disable the xMII link */ for (i = 0; i < priv->hw_info->max_ports; i++) {
for (i = 0; i < priv->hw_info->max_ports; i++) /* Disable the xMII link */
gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_EN, 0, i); gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_EN, 0, i);
/* Automatically select the xMII interface clock */
gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_RATE_MASK,
GSWIP_MII_CFG_RATE_AUTO, i);
}
/* enable special tag insertion on cpu port */ /* enable special tag insertion on cpu port */
gswip_switch_mask(priv, 0, GSWIP_FDMA_PCTRL_STEN, gswip_switch_mask(priv, 0, GSWIP_FDMA_PCTRL_STEN,
GSWIP_FDMA_PCTRLp(cpu_port)); GSWIP_FDMA_PCTRLp(cpu_port));
......
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