Commit 3f2f6895 authored by Wolfram Sang's avatar Wolfram Sang Committed by Daniel Lezcano

thermal/drivers/rcar_gen3_thermal: Remove R-Car H3 ES1.* handling

R-Car H3 ES1.* was only available to an internal development group and
needed a lot of quirks and workarounds. These become a maintenance
burden now, so our development group decided to remove upstream support
and disable booting for this SoC. Public users only have ES2 onwards.
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20230307163041.3815-7-wsa+renesas@sang-engineering.comSigned-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent 10debf8c
...@@ -14,7 +14,6 @@ ...@@ -14,7 +14,6 @@
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#include <linux/sys_soc.h>
#include <linux/thermal.h> #include <linux/thermal.h>
#include "thermal_hwmon.h" #include "thermal_hwmon.h"
...@@ -27,7 +26,6 @@ ...@@ -27,7 +26,6 @@
#define REG_GEN3_IRQTEMP1 0x14 #define REG_GEN3_IRQTEMP1 0x14
#define REG_GEN3_IRQTEMP2 0x18 #define REG_GEN3_IRQTEMP2 0x18
#define REG_GEN3_IRQTEMP3 0x1C #define REG_GEN3_IRQTEMP3 0x1C
#define REG_GEN3_CTSR 0x20
#define REG_GEN3_THCTR 0x20 #define REG_GEN3_THCTR 0x20
#define REG_GEN3_TEMP 0x28 #define REG_GEN3_TEMP 0x28
#define REG_GEN3_THCODE1 0x50 #define REG_GEN3_THCODE1 0x50
...@@ -46,14 +44,6 @@ ...@@ -46,14 +44,6 @@
#define IRQ_TEMPD2 BIT(4) #define IRQ_TEMPD2 BIT(4)
#define IRQ_TEMPD3 BIT(5) #define IRQ_TEMPD3 BIT(5)
/* CTSR bits */
#define CTSR_PONM BIT(8)
#define CTSR_AOUT BIT(7)
#define CTSR_THBGR BIT(5)
#define CTSR_VMEN BIT(4)
#define CTSR_VMST BIT(1)
#define CTSR_THSST BIT(0)
/* THCTR bits */ /* THCTR bits */
#define THCTR_PONM BIT(6) #define THCTR_PONM BIT(6)
#define THCTR_THSST BIT(0) #define THCTR_THSST BIT(0)
...@@ -88,8 +78,6 @@ struct rcar_gen3_thermal_priv { ...@@ -88,8 +78,6 @@ struct rcar_gen3_thermal_priv {
struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM]; struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
struct thermal_zone_device_ops ops; struct thermal_zone_device_ops ops;
unsigned int num_tscs; unsigned int num_tscs;
void (*thermal_init)(struct rcar_gen3_thermal_priv *priv,
struct rcar_gen3_thermal_tsc *tsc);
int ptat[3]; int ptat[3];
}; };
...@@ -248,11 +236,6 @@ static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data) ...@@ -248,11 +236,6 @@ static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static const struct soc_device_attribute r8a7795es1[] = {
{ .soc_id = "r8a7795", .revision = "ES1.*" },
{ /* sentinel */ }
};
static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv) static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
{ {
unsigned int i; unsigned int i;
...@@ -311,34 +294,6 @@ static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv) ...@@ -311,34 +294,6 @@ static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
return true; return true;
} }
static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_priv *priv,
struct rcar_gen3_thermal_tsc *tsc)
{
rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
usleep_range(1000, 2000);
rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
if (priv->ops.set_trips)
rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
IRQ_TEMPD1 | IRQ_TEMP2);
rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
usleep_range(100, 200);
rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
CTSR_VMST | CTSR_THSST);
usleep_range(1000, 2000);
}
static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv, static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv,
struct rcar_gen3_thermal_tsc *tsc) struct rcar_gen3_thermal_tsc *tsc)
{ {
...@@ -474,9 +429,6 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev) ...@@ -474,9 +429,6 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
return -ENOMEM; return -ENOMEM;
priv->ops = rcar_gen3_tz_of_ops; priv->ops = rcar_gen3_tz_of_ops;
priv->thermal_init = rcar_gen3_thermal_init;
if (soc_device_match(r8a7795es1))
priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
platform_set_drvdata(pdev, priv); platform_set_drvdata(pdev, priv);
...@@ -516,7 +468,7 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev) ...@@ -516,7 +468,7 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
for (i = 0; i < priv->num_tscs; i++) { for (i = 0; i < priv->num_tscs; i++) {
struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
priv->thermal_init(priv, tsc); rcar_gen3_thermal_init(priv, tsc);
rcar_gen3_thermal_calc_coefs(priv, tsc, *ths_tj_1); rcar_gen3_thermal_calc_coefs(priv, tsc, *ths_tj_1);
zone = devm_thermal_of_zone_register(dev, i, tsc, &priv->ops); zone = devm_thermal_of_zone_register(dev, i, tsc, &priv->ops);
...@@ -563,7 +515,7 @@ static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev) ...@@ -563,7 +515,7 @@ static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
for (i = 0; i < priv->num_tscs; i++) { for (i = 0; i < priv->num_tscs; i++) {
struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
priv->thermal_init(priv, tsc); rcar_gen3_thermal_init(priv, tsc);
} }
return 0; return 0;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment