Commit 3fb17dab authored by David S. Miller's avatar David S. Miller

Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/jkirsher/net-2.6

parents e0985f27 310e5ca8
...@@ -124,6 +124,7 @@ static s32 e1000_set_phy_type(struct e1000_hw *hw) ...@@ -124,6 +124,7 @@ static s32 e1000_set_phy_type(struct e1000_hw *hw)
case M88E1000_I_PHY_ID: case M88E1000_I_PHY_ID:
case M88E1011_I_PHY_ID: case M88E1011_I_PHY_ID:
case M88E1111_I_PHY_ID: case M88E1111_I_PHY_ID:
case M88E1118_E_PHY_ID:
hw->phy_type = e1000_phy_m88; hw->phy_type = e1000_phy_m88;
break; break;
case IGP01E1000_I_PHY_ID: case IGP01E1000_I_PHY_ID:
...@@ -3222,7 +3223,8 @@ static s32 e1000_detect_gig_phy(struct e1000_hw *hw) ...@@ -3222,7 +3223,8 @@ static s32 e1000_detect_gig_phy(struct e1000_hw *hw)
break; break;
case e1000_ce4100: case e1000_ce4100:
if ((hw->phy_id == RTL8211B_PHY_ID) || if ((hw->phy_id == RTL8211B_PHY_ID) ||
(hw->phy_id == RTL8201N_PHY_ID)) (hw->phy_id == RTL8201N_PHY_ID) ||
(hw->phy_id == M88E1118_E_PHY_ID))
match = true; match = true;
break; break;
case e1000_82541: case e1000_82541:
......
...@@ -2917,6 +2917,7 @@ struct e1000_host_command_info { ...@@ -2917,6 +2917,7 @@ struct e1000_host_command_info {
#define M88E1000_14_PHY_ID M88E1000_E_PHY_ID #define M88E1000_14_PHY_ID M88E1000_E_PHY_ID
#define M88E1011_I_REV_4 0x04 #define M88E1011_I_REV_4 0x04
#define M88E1111_I_PHY_ID 0x01410CC0 #define M88E1111_I_PHY_ID 0x01410CC0
#define M88E1118_E_PHY_ID 0x01410E40
#define L1LXT971A_PHY_ID 0x001378E0 #define L1LXT971A_PHY_ID 0x001378E0
#define RTL8211B_PHY_ID 0x001CC910 #define RTL8211B_PHY_ID 0x001CC910
......
...@@ -4309,7 +4309,6 @@ static void e1000_watchdog_task(struct work_struct *work) ...@@ -4309,7 +4309,6 @@ static void e1000_watchdog_task(struct work_struct *work)
* to get done, so reset controller to flush Tx. * to get done, so reset controller to flush Tx.
* (Do the reset outside of interrupt context). * (Do the reset outside of interrupt context).
*/ */
adapter->tx_timeout_count++;
schedule_work(&adapter->reset_task); schedule_work(&adapter->reset_task);
/* return immediately since reset is imminent */ /* return immediately since reset is imminent */
return; return;
......
...@@ -1370,6 +1370,9 @@ s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw) ...@@ -1370,6 +1370,9 @@ s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw)
hw_dbg(hw, " New MAC Addr =%pM\n", hw->mac.addr); hw_dbg(hw, " New MAC Addr =%pM\n", hw->mac.addr);
hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
/* clear VMDq pool/queue selection for RAR 0 */
hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL);
} }
hw->addr_ctrl.overflow_promisc = 0; hw->addr_ctrl.overflow_promisc = 0;
......
...@@ -165,7 +165,7 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, ...@@ -165,7 +165,7 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
unsigned int thisoff = 0; unsigned int thisoff = 0;
unsigned int thislen = 0; unsigned int thislen = 0;
u32 fcbuff, fcdmarw, fcfltrw; u32 fcbuff, fcdmarw, fcfltrw;
dma_addr_t addr; dma_addr_t addr = 0;
if (!netdev || !sgl) if (!netdev || !sgl)
return 0; return 0;
......
...@@ -52,7 +52,7 @@ char ixgbe_driver_name[] = "ixgbe"; ...@@ -52,7 +52,7 @@ char ixgbe_driver_name[] = "ixgbe";
static const char ixgbe_driver_string[] = static const char ixgbe_driver_string[] =
"Intel(R) 10 Gigabit PCI Express Network Driver"; "Intel(R) 10 Gigabit PCI Express Network Driver";
#define DRV_VERSION "3.0.12-k2" #define DRV_VERSION "3.2.9-k2"
const char ixgbe_driver_version[] = DRV_VERSION; const char ixgbe_driver_version[] = DRV_VERSION;
static char ixgbe_copyright[] = "Copyright (c) 1999-2010 Intel Corporation."; static char ixgbe_copyright[] = "Copyright (c) 1999-2010 Intel Corporation.";
...@@ -3176,10 +3176,17 @@ static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter) ...@@ -3176,10 +3176,17 @@ static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
u32 mhadd, hlreg0; u32 mhadd, hlreg0;
/* Decide whether to use packet split mode or not */ /* Decide whether to use packet split mode or not */
/* Do not use packet split if we're in SR-IOV Mode */ /* On by default */
if (!adapter->num_vfs)
adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
/* Do not use packet split if we're in SR-IOV Mode */
if (adapter->num_vfs)
adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
/* Disable packet split due to 82599 erratum #45 */
if (hw->mac.type == ixgbe_mac_82599EB)
adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
/* Set the RX buffer length according to the mode */ /* Set the RX buffer length according to the mode */
if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
rx_buf_len = IXGBE_RX_HDR_SIZE; rx_buf_len = IXGBE_RX_HDR_SIZE;
...@@ -4863,16 +4870,13 @@ static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter) ...@@ -4863,16 +4870,13 @@ static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter)
{ {
int q_idx, num_q_vectors; int q_idx, num_q_vectors;
struct ixgbe_q_vector *q_vector; struct ixgbe_q_vector *q_vector;
int napi_vectors;
int (*poll)(struct napi_struct *, int); int (*poll)(struct napi_struct *, int);
if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
napi_vectors = adapter->num_rx_queues;
poll = &ixgbe_clean_rxtx_many; poll = &ixgbe_clean_rxtx_many;
} else { } else {
num_q_vectors = 1; num_q_vectors = 1;
napi_vectors = 1;
poll = &ixgbe_poll; poll = &ixgbe_poll;
} }
......
...@@ -110,12 +110,10 @@ static int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid, ...@@ -110,12 +110,10 @@ static int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid,
return adapter->hw.mac.ops.set_vfta(&adapter->hw, vid, vf, (bool)add); return adapter->hw.mac.ops.set_vfta(&adapter->hw, vid, vf, (bool)add);
} }
static void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe) static void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe)
{ {
u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf));
vmolr |= (IXGBE_VMOLR_ROMPE | vmolr |= (IXGBE_VMOLR_ROMPE |
IXGBE_VMOLR_ROPE |
IXGBE_VMOLR_BAM); IXGBE_VMOLR_BAM);
if (aupe) if (aupe)
vmolr |= IXGBE_VMOLR_AUPE; vmolr |= IXGBE_VMOLR_AUPE;
......
...@@ -133,17 +133,17 @@ static s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) ...@@ -133,17 +133,17 @@ static s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
} }
ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST)); IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | reset_bit));
IXGBE_WRITE_FLUSH(hw); IXGBE_WRITE_FLUSH(hw);
/* Poll for reset bit to self-clear indicating reset is complete */ /* Poll for reset bit to self-clear indicating reset is complete */
for (i = 0; i < 10; i++) { for (i = 0; i < 10; i++) {
udelay(1); udelay(1);
ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
if (!(ctrl & IXGBE_CTRL_RST)) if (!(ctrl & reset_bit))
break; break;
} }
if (ctrl & IXGBE_CTRL_RST) { if (ctrl & reset_bit) {
status = IXGBE_ERR_RESET_FAILED; status = IXGBE_ERR_RESET_FAILED;
hw_dbg(hw, "Reset polling failed to complete.\n"); hw_dbg(hw, "Reset polling failed to complete.\n");
} }
......
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