Commit 40105c0b authored by Michael Chan's avatar Michael Chan Committed by David S. Miller

bnx2: Reorganize timeout constants.

Move all related timeout constants to the same location.  BNX2
prefix is also added to make them more consistent.
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: default avatarBenjamin Li <benli@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d8026d93
...@@ -1656,7 +1656,7 @@ bnx2_setup_serdes_phy(struct bnx2 *bp, u8 port) ...@@ -1656,7 +1656,7 @@ bnx2_setup_serdes_phy(struct bnx2 *bp, u8 port)
* exchanging base pages plus 3 next pages and * exchanging base pages plus 3 next pages and
* normally completes in about 120 msec. * normally completes in about 120 msec.
*/ */
bp->current_interval = SERDES_AN_TIMEOUT; bp->current_interval = BNX2_SERDES_AN_TIMEOUT;
bp->serdes_an_pending = 1; bp->serdes_an_pending = 1;
mod_timer(&bp->timer, jiffies + bp->current_interval); mod_timer(&bp->timer, jiffies + bp->current_interval);
} else { } else {
...@@ -2278,7 +2278,7 @@ bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int ack, int silent) ...@@ -2278,7 +2278,7 @@ bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int ack, int silent)
return 0; return 0;
/* wait for an acknowledgement. */ /* wait for an acknowledgement. */
for (i = 0; i < (FW_ACK_TIME_OUT_MS / 10); i++) { for (i = 0; i < (BNX2_FW_ACK_TIME_OUT_MS / 10); i++) {
msleep(10); msleep(10);
val = bnx2_shmem_rd(bp, BNX2_FW_MB); val = bnx2_shmem_rd(bp, BNX2_FW_MB);
...@@ -5705,7 +5705,7 @@ bnx2_5708_serdes_timer(struct bnx2 *bp) ...@@ -5705,7 +5705,7 @@ bnx2_5708_serdes_timer(struct bnx2 *bp)
bnx2_read_phy(bp, bp->mii_bmcr, &bmcr); bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
if (bmcr & BMCR_ANENABLE) { if (bmcr & BMCR_ANENABLE) {
bnx2_enable_forced_2g5(bp); bnx2_enable_forced_2g5(bp);
bp->current_interval = SERDES_FORCED_TIMEOUT; bp->current_interval = BNX2_SERDES_FORCED_TIMEOUT;
} else { } else {
bnx2_disable_forced_2g5(bp); bnx2_disable_forced_2g5(bp);
bp->serdes_an_pending = 2; bp->serdes_an_pending = 2;
...@@ -6522,7 +6522,7 @@ bnx2_nway_reset(struct net_device *dev) ...@@ -6522,7 +6522,7 @@ bnx2_nway_reset(struct net_device *dev)
spin_lock_bh(&bp->phy_lock); spin_lock_bh(&bp->phy_lock);
bp->current_interval = SERDES_AN_TIMEOUT; bp->current_interval = BNX2_SERDES_AN_TIMEOUT;
bp->serdes_an_pending = 1; bp->serdes_an_pending = 1;
mod_timer(&bp->timer, jiffies + bp->current_interval); mod_timer(&bp->timer, jiffies + bp->current_interval);
} }
......
...@@ -6679,8 +6679,6 @@ struct bnx2_napi { ...@@ -6679,8 +6679,6 @@ struct bnx2_napi {
struct bnx2_tx_ring_info tx_ring; struct bnx2_tx_ring_info tx_ring;
}; };
#define BNX2_TIMER_INTERVAL HZ
struct bnx2 { struct bnx2 {
/* Fields used in the tx and intr/napi performance paths are grouped */ /* Fields used in the tx and intr/napi performance paths are grouped */
/* together in the beginning of the structure. */ /* together in the beginning of the structure. */
...@@ -6728,7 +6726,11 @@ struct bnx2 { ...@@ -6728,7 +6726,11 @@ struct bnx2 {
/* End of fields used in the performance code paths. */ /* End of fields used in the performance code paths. */
int current_interval; unsigned int current_interval;
#define BNX2_TIMER_INTERVAL HZ
#define BNX2_SERDES_AN_TIMEOUT (HZ / 3)
#define BNX2_SERDES_FORCED_TIMEOUT (HZ / 10)
struct timer_list timer; struct timer_list timer;
struct work_struct reset_task; struct work_struct reset_task;
...@@ -6860,8 +6862,6 @@ struct bnx2 { ...@@ -6860,8 +6862,6 @@ struct bnx2 {
#define PHY_LOOPBACK 2 #define PHY_LOOPBACK 2
u8 serdes_an_pending; u8 serdes_an_pending;
#define SERDES_AN_TIMEOUT (HZ / 3)
#define SERDES_FORCED_TIMEOUT (HZ / 10)
u8 mac_addr[8]; u8 mac_addr[8];
...@@ -6959,14 +6959,14 @@ struct fw_info { ...@@ -6959,14 +6959,14 @@ struct fw_info {
/* This value (in milliseconds) determines the frequency of the driver /* This value (in milliseconds) determines the frequency of the driver
* issuing the PULSE message code. The firmware monitors this periodic * issuing the PULSE message code. The firmware monitors this periodic
* pulse to determine when to switch to an OS-absent mode. */ * pulse to determine when to switch to an OS-absent mode. */
#define DRV_PULSE_PERIOD_MS 250 #define BNX2_DRV_PULSE_PERIOD_MS 250
/* This value (in milliseconds) determines how long the driver should /* This value (in milliseconds) determines how long the driver should
* wait for an acknowledgement from the firmware before timing out. Once * wait for an acknowledgement from the firmware before timing out. Once
* the firmware has timed out, the driver will assume there is no firmware * the firmware has timed out, the driver will assume there is no firmware
* running and there won't be any firmware-driver synchronization during a * running and there won't be any firmware-driver synchronization during a
* driver reset. */ * driver reset. */
#define FW_ACK_TIME_OUT_MS 1000 #define BNX2_FW_ACK_TIME_OUT_MS 1000
#define BNX2_DRV_RESET_SIGNATURE 0x00000000 #define BNX2_DRV_RESET_SIGNATURE 0x00000000
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment