Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
linux
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
Kirill Smelkov
linux
Commits
403e1c5b
Commit
403e1c5b
authored
May 30, 2012
by
Ingo Molnar
Browse files
Options
Browse Files
Download
Plain Diff
Merge branch 'x86/mce' into x86/urgent
Merge in these fixlets. Signed-off-by:
Ingo Molnar
<
mingo@kernel.org
>
parents
fa83523f
80f03361
Changes
3
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
5 additions
and
5 deletions
+5
-5
arch/x86/include/asm/bitops.h
arch/x86/include/asm/bitops.h
+2
-0
arch/x86/kernel/cpu/mcheck/mce.c
arch/x86/kernel/cpu/mcheck/mce.c
+3
-3
drivers/edac/mce_amd.h
drivers/edac/mce_amd.h
+0
-2
No files found.
arch/x86/include/asm/bitops.h
View file @
403e1c5b
...
@@ -15,6 +15,8 @@
...
@@ -15,6 +15,8 @@
#include <linux/compiler.h>
#include <linux/compiler.h>
#include <asm/alternative.h>
#include <asm/alternative.h>
#define BIT_64(n) (U64_C(1) << (n))
/*
/*
* These have to be done with inline assembly: that way the bit-setting
* These have to be done with inline assembly: that way the bit-setting
* is guaranteed to be atomic. All bit operations return 0 if the bit
* is guaranteed to be atomic. All bit operations return 0 if the bit
...
...
arch/x86/kernel/cpu/mcheck/mce.c
View file @
403e1c5b
...
@@ -1458,9 +1458,9 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
...
@@ -1458,9 +1458,9 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
rdmsrl
(
msrs
[
i
],
val
);
rdmsrl
(
msrs
[
i
],
val
);
/* CntP bit set? */
/* CntP bit set? */
if
(
val
&
BIT
(
62
))
{
if
(
val
&
BIT
_64
(
62
))
{
val
&=
~
BIT
(
62
);
val
&=
~
BIT_64
(
62
);
wrmsrl
(
msrs
[
i
],
val
);
wrmsrl
(
msrs
[
i
],
val
);
}
}
}
}
...
...
drivers/edac/mce_amd.h
View file @
403e1c5b
...
@@ -5,8 +5,6 @@
...
@@ -5,8 +5,6 @@
#include <asm/mce.h>
#include <asm/mce.h>
#define BIT_64(n) (U64_C(1) << (n))
#define EC(x) ((x) & 0xffff)
#define EC(x) ((x) & 0xffff)
#define XEC(x, mask) (((x) >> 16) & mask)
#define XEC(x, mask) (((x) >> 16) & mask)
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment