Commit 4334aec0 authored by Rob Herring's avatar Rob Herring

dt-bindings: display: Drop unneeded quotes

Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Reviewed-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: default avatarMiguel Ojeda <ojeda@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #display/msm
Link: https://lore.kernel.org/r/20230320233823.2919475-1-robh@kernel.orgSigned-off-by: default avatarRob Herring <robh@kernel.org>
parent 14aed8ea
......@@ -10,7 +10,7 @@ maintainers:
- Robin van der Gracht <robin@protonic.nl>
allOf:
- $ref: "/schemas/input/matrix-keymap.yaml#"
- $ref: /schemas/input/matrix-keymap.yaml#
properties:
compatible:
......
......@@ -2,8 +2,8 @@
# Copyright 2019 BayLibre, SAS
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
......
......@@ -2,8 +2,8 @@
# Copyright 2019 BayLibre, SAS
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson Display Controller
......
......@@ -2,8 +2,8 @@
# Copyright 2019 Analogix Semiconductor, Inc.
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analogix ANX7625 SlimPort (4K Mobile HD Transmitter)
......
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Cadence MHDP8546 bridge
......
......@@ -18,7 +18,7 @@ properties:
maxItems: 1
edid-emulation:
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
description:
The EDID emulation entry to use
Value Resolution Description
......
......@@ -23,7 +23,7 @@ properties:
i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins
clock-names:
const: "ref"
const: ref
clocks:
maxItems: 1
......
......@@ -26,7 +26,7 @@ description:
properties:
$nodename:
const: "aux-bus"
const: aux-bus
panel:
$ref: panel/panel-common.yaml#
......
......@@ -2,8 +2,8 @@
# Copyright 2019 NXP
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: iMX8MQ Display Controller Subsystem (DCSS)
......
......@@ -50,7 +50,7 @@ properties:
- const: hdmi
mediatek,syscon-hdmi:
$ref: '/schemas/types.yaml#/definitions/phandle-array'
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to system configuration registers
......
......@@ -74,7 +74,7 @@ properties:
syscon-sfpb:
description: A phandle to mmss_sfpb syscon node (only for DSIv2).
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
qcom,dual-dsi-mode:
type: boolean
......@@ -105,14 +105,14 @@ properties:
type: object
ports:
$ref: "/schemas/graph.yaml#/properties/ports"
$ref: /schemas/graph.yaml#/properties/ports
description: |
Contains DSI controller input and output ports as children, each
containing one endpoint subnode.
properties:
port@0:
$ref: "/schemas/graph.yaml#/$defs/port-base"
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: |
Input endpoints of the controller.
......@@ -128,7 +128,7 @@ properties:
enum: [ 0, 1, 2, 3 ]
port@1:
$ref: "/schemas/graph.yaml#/$defs/port-base"
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: |
Output endpoints of the controller.
......
......@@ -58,7 +58,7 @@ properties:
maximum: 31
qcom,phy-drive-ldo-level:
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
description:
The PHY LDO has an amplitude tuning feature to adjust the LDO output
for the HSTX drive. Use supported levels (mV) to offset the drive level
......
......@@ -3,8 +3,8 @@
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/msm/gmu.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/msm/gmu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: GMU attached to certain Adreno GPUs
......
......@@ -2,8 +2,8 @@
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/msm/gpu.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/msm/gpu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Adreno or Snapdragon GPUs
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/msm/mdp4.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/msm/mdp4.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Adreno/Snapdragon MDP4 display controller
......
......@@ -37,7 +37,7 @@ properties:
backlight:
description: Backlight used by the panel
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
required:
- compatible
......
......@@ -76,7 +76,7 @@ properties:
unevaluatedProperties: false
renesas,cmms:
$ref: "/schemas/types.yaml#/definitions/phandle-array"
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
maxItems: 1
description:
......@@ -84,7 +84,7 @@ properties:
available DU channel.
renesas,vsps:
$ref: "/schemas/types.yaml#/definitions/phandle-array"
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
items:
- description: phandle to VSP instance that serves the DU channel
......
......@@ -38,7 +38,7 @@ properties:
description: The number of cells in a MIPI calibration specifier.
Should be 1. The single cell specifies a bitmask of the pads that
need to be calibrated for a given device.
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
const: 1
additionalProperties: false
......
......@@ -69,12 +69,12 @@ properties:
# Tegra186 and later
nvidia,interface:
description: index of the SOR interface
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
nvidia,ddc-i2c-bus:
description: phandle of an I2C controller used for DDC EDID
probing
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
nvidia,hpd-gpio:
description: specifies a GPIO used for hotplug detection
......@@ -82,23 +82,23 @@ properties:
nvidia,edid:
description: supplies a binary EDID blob
$ref: "/schemas/types.yaml#/definitions/uint8-array"
$ref: /schemas/types.yaml#/definitions/uint8-array
nvidia,panel:
description: phandle of a display panel, required for eDP
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
nvidia,xbar-cfg:
description: 5 cells containing the crossbar configuration.
Each lane of the SOR, identified by the cell's index, is
mapped via the crossbar to the pad specified by the cell's
value.
$ref: "/schemas/types.yaml#/definitions/uint32-array"
$ref: /schemas/types.yaml#/definitions/uint32-array
# optional when driving an eDP output
nvidia,dpaux:
description: phandle to a DispayPort AUX interface
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
allOf:
- if:
......
......@@ -60,13 +60,13 @@ properties:
nvidia,outputs:
description: A list of phandles of outputs that this display
controller can drive.
$ref: "/schemas/types.yaml#/definitions/phandle-array"
$ref: /schemas/types.yaml#/definitions/phandle-array
nvidia,head:
description: The number of the display controller head. This
is used to setup the various types of output to receive
video data from the given head.
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
additionalProperties: false
......
......@@ -29,7 +29,7 @@ properties:
- const: dsi
allOf:
- $ref: "/schemas/reset/reset.yaml"
- $ref: /schemas/reset/reset.yaml
additionalProperties: false
......
......@@ -59,12 +59,12 @@ properties:
description: Should contain a phandle and a specifier specifying
which pads are used by this DSI output and need to be
calibrated. See nvidia,tegra114-mipi.yaml for details.
$ref: "/schemas/types.yaml#/definitions/phandle-array"
$ref: /schemas/types.yaml#/definitions/phandle-array
nvidia,ddc-i2c-bus:
description: phandle of an I2C controller used for DDC EDID
probing
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
nvidia,hpd-gpio:
description: specifies a GPIO used for hotplug detection
......@@ -72,19 +72,19 @@ properties:
nvidia,edid:
description: supplies a binary EDID blob
$ref: "/schemas/types.yaml#/definitions/uint8-array"
$ref: /schemas/types.yaml#/definitions/uint8-array
nvidia,panel:
description: phandle of a display panel
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
nvidia,ganged-mode:
description: contains a phandle to a second DSI controller to
gang up with in order to support up to 8 data lanes
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
allOf:
- $ref: "../dsi-controller.yaml#"
- $ref: ../dsi-controller.yaml#
- if:
properties:
compatible:
......
......@@ -68,7 +68,7 @@ properties:
nvidia,ddc-i2c-bus:
description: phandle of an I2C controller used for DDC EDID
probing
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
nvidia,hpd-gpio:
description: specifies a GPIO used for hotplug detection
......@@ -76,11 +76,11 @@ properties:
nvidia,edid:
description: supplies a binary EDID blob
$ref: "/schemas/types.yaml#/definitions/uint8-array"
$ref: /schemas/types.yaml#/definitions/uint8-array
nvidia,panel:
description: phandle of a display panel
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
"#sound-dai-cells":
const: 0
......
......@@ -2,8 +2,8 @@
# Copyright 2019 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments AM65x Display Subsystem
......@@ -88,7 +88,7 @@ properties:
The DSS DPI output port node from video port 2
ti,am65x-oldi-io-ctrl:
$ref: "/schemas/types.yaml#/definitions/phandle"
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle to syscon device node mapping OLDI IO_CTRL registers.
The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
......
......@@ -2,8 +2,8 @@
# Copyright 2019 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments J721E Display Subsystem
......
......@@ -2,8 +2,8 @@
# Copyright 2019 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K2G Display Subsystem
......
......@@ -2,8 +2,8 @@
# Copyright 2019 Bootlin
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xylon LogiCVC display controller
......@@ -89,25 +89,25 @@ properties:
description: Display output colorspace (C_DISPLAY_COLOR_SPACE).
xylon,display-depth:
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
description: Display output depth (C_PIXEL_DATA_WIDTH).
xylon,row-stride:
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
description: Fixed number of pixels in a framebuffer row (C_ROW_STRIDE).
xylon,dithering:
$ref: "/schemas/types.yaml#/definitions/flag"
$ref: /schemas/types.yaml#/definitions/flag
description: Dithering module is enabled (C_XCOLOR)
xylon,background-layer:
$ref: "/schemas/types.yaml#/definitions/flag"
$ref: /schemas/types.yaml#/definitions/flag
description: |
The last layer is used to display a black background (C_USE_BACKGROUND).
The layer must still be registered.
xylon,layers-configurable:
$ref: "/schemas/types.yaml#/definitions/flag"
$ref: /schemas/types.yaml#/definitions/flag
description: |
Configuration of layers' size, position and offset is enabled
(C_USE_SIZE_POSITION).
......@@ -131,7 +131,7 @@ properties:
maxItems: 1
xylon,layer-depth:
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
description: Layer depth (C_LAYER_X_DATA_WIDTH).
xylon,layer-colorspace:
......@@ -151,19 +151,19 @@ properties:
description: Alpha mode for the layer (C_LAYER_X_ALPHA_MODE).
xylon,layer-base-offset:
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Offset in number of lines (C_LAYER_X_OFFSET) starting from the
video RAM base (C_VMEM_BASEADDR), only for version 3.
xylon,layer-buffer-offset:
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Offset in number of lines (C_BUFFER_*_OFFSET) starting from the
layer base offset for the second buffer used in double-buffering.
xylon,layer-primary:
$ref: "/schemas/types.yaml#/definitions/flag"
$ref: /schemas/types.yaml#/definitions/flag
description: |
Layer should be registered as a primary plane (exactly one is
required).
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment