Commit 437c78f9 authored by Alex Elder's avatar Alex Elder Committed by David S. Miller

net: ipa: avoid 64-bit modulus

It is possible for a 32 bit x86 build to use a 64 bit DMA address.

There are two remaining spots where the IPA driver does a modulo
operation to check alignment of a DMA address, and under certain
conditions this can lead to a build error on i386 (at least).

The alignment checks we're doing are for power-of-2 values, and this
means the lower 32 bits of the DMA address can be used.  This ensures
both operands to the modulo operator are 32 bits wide.
Reported-by: default avatarRandy Dunlap <rdunlap@infradead.org>
Signed-off-by: default avatarAlex Elder <elder@linaro.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ed97143e
......@@ -1436,15 +1436,18 @@ static void gsi_evt_ring_rx_update(struct gsi_evt_ring *evt_ring, u32 index)
/* Initialize a ring, including allocating DMA memory for its entries */
static int gsi_ring_alloc(struct gsi *gsi, struct gsi_ring *ring, u32 count)
{
size_t size = count * GSI_RING_ELEMENT_SIZE;
u32 size = count * GSI_RING_ELEMENT_SIZE;
struct device *dev = gsi->dev;
dma_addr_t addr;
/* Hardware requires a 2^n ring size, with alignment equal to size */
/* Hardware requires a 2^n ring size, with alignment equal to size.
* The size is a power of 2, so we can check alignment using just
* the bottom 32 bits for a DMA address of any size.
*/
ring->virt = dma_alloc_coherent(dev, size, &addr, GFP_KERNEL);
if (ring->virt && addr % size) {
if (ring->virt && lower_32_bits(addr) % size) {
dma_free_coherent(dev, size, ring->virt, addr);
dev_err(dev, "unable to alloc 0x%zx-aligned ring buffer\n",
dev_err(dev, "unable to alloc 0x%x-aligned ring buffer\n",
size);
return -EINVAL; /* Not a good error value, but distinct */
} else if (!ring->virt) {
......
......@@ -658,10 +658,13 @@ int ipa_table_init(struct ipa *ipa)
return -ENOMEM;
/* We put the "zero rule" at the base of our table area. The IPA
* hardware requires rules to be aligned on a 128-byte boundary.
* Make sure the allocation satisfies this constraint.
* hardware requires route and filter table rules to be aligned
* on a 128-byte boundary. As long as the alignment constraint
* is a power of 2, we can check alignment using just the bottom
* 32 bits for a DMA address of any size.
*/
if (addr % IPA_TABLE_ALIGN) {
BUILD_BUG_ON(!is_power_of_2(IPA_TABLE_ALIGN));
if (lower_32_bits(addr) % IPA_TABLE_ALIGN) {
dev_err(dev, "table address %pad not %u-byte aligned\n",
&addr, IPA_TABLE_ALIGN);
dma_free_coherent(dev, size, virt, addr);
......
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