Commit 43926a3c authored by Nikita Travkin's avatar Nikita Travkin Committed by Bjorn Andersson

arm64: dts: qcom: sc7180: Don't enable lpass clocks by default

lpass clocks are usually blocked from HLOS by the firmware and
instead are managed by the ADSP. Mark them as reserved and explicitly
enable in the CrOS boards that have special, cooperative firmware.

The IDP board gets lpass clocks disabled as it doesn't make use of sound
anyway and might use Qualcomm firmware that blocks those clocks. [1]

[1] https://lore.kernel.org/all/ZBJhmDd3zK%2FAiwBD@google.com/Signed-off-by: default avatarNikita Travkin <nikita@trvn.ru>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230515093744.289045-2-nikita@trvn.ru
parent a541667c
...@@ -788,6 +788,10 @@ alc5682: codec@1a { ...@@ -788,6 +788,10 @@ alc5682: codec@1a {
}; };
}; };
&lpasscc {
status = "okay";
};
&lpass_cpu { &lpass_cpu {
status = "okay"; status = "okay";
...@@ -813,6 +817,10 @@ dai-link@5 { ...@@ -813,6 +817,10 @@ dai-link@5 {
}; };
}; };
&lpass_hm {
status = "okay";
};
&mdp { &mdp {
status = "okay"; status = "okay";
}; };
......
...@@ -3627,6 +3627,8 @@ lpasscc: clock-controller@62d00000 { ...@@ -3627,6 +3627,8 @@ lpasscc: clock-controller@62d00000 {
power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>; power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
#clock-cells = <1>; #clock-cells = <1>;
#power-domain-cells = <1>; #power-domain-cells = <1>;
status = "reserved"; /* Controlled by ADSP */
}; };
lpass_cpu: lpass@62d87000 { lpass_cpu: lpass@62d87000 {
...@@ -3675,6 +3677,8 @@ lpass_hm: clock-controller@63000000 { ...@@ -3675,6 +3677,8 @@ lpass_hm: clock-controller@63000000 {
#clock-cells = <1>; #clock-cells = <1>;
#power-domain-cells = <1>; #power-domain-cells = <1>;
status = "reserved"; /* Controlled by ADSP */
}; };
}; };
......
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