Commit 43c032fe authored by Jiri Olsa's avatar Jiri Olsa Committed by Ingo Molnar

perf/x86: Add hardware events translations for Intel cpus

Add support for Intel processors to display 'events' sysfs
directory (/sys/devices/cpu/events/) with hw event translations:

  # ls  /sys/devices/cpu/events/
  branch-instructions
  branch-misses
  bus-cycles
  cache-misses
  cache-references
  cpu-cycles
  instructions
  ref-cycles
  stalled-cycles-backend
  stalled-cycles-frontend
Suggested-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: default avatarJiri Olsa <jolsa@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1349873598-12583-4-git-send-email-jolsa@redhat.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 8300daa2
...@@ -1392,6 +1392,46 @@ static struct attribute_group x86_pmu_events_group = { ...@@ -1392,6 +1392,46 @@ static struct attribute_group x86_pmu_events_group = {
.attrs = events_attr, .attrs = events_attr,
}; };
ssize_t x86_event_sysfs_show(char *page, u64 config)
{
u64 event = (config & ARCH_PERFMON_EVENTSEL_EVENT);
u64 umask = (config & ARCH_PERFMON_EVENTSEL_UMASK) >> 8;
u64 cmask = (config & ARCH_PERFMON_EVENTSEL_CMASK) >> 24;
bool edge = (config & ARCH_PERFMON_EVENTSEL_EDGE);
bool pc = (config & ARCH_PERFMON_EVENTSEL_PIN_CONTROL);
bool any = (config & ARCH_PERFMON_EVENTSEL_ANY);
bool inv = (config & ARCH_PERFMON_EVENTSEL_INV);
ssize_t ret;
/*
* We have whole page size to spend and just little data
* to write, so we can safely use sprintf.
*/
ret = sprintf(page, "event=0x%02llx", event);
if (umask)
ret += sprintf(page + ret, ",umask=0x%02llx", umask);
if (edge)
ret += sprintf(page + ret, ",edge");
if (pc)
ret += sprintf(page + ret, ",pc");
if (any)
ret += sprintf(page + ret, ",any");
if (inv)
ret += sprintf(page + ret, ",inv");
if (cmask)
ret += sprintf(page + ret, ",cmask=0x%02llx", cmask);
ret += sprintf(page + ret, "\n");
return ret;
}
static int __init init_hw_perf_events(void) static int __init init_hw_perf_events(void)
{ {
struct x86_pmu_quirk *quirk; struct x86_pmu_quirk *quirk;
......
...@@ -538,6 +538,8 @@ static inline void set_linear_ip(struct pt_regs *regs, unsigned long ip) ...@@ -538,6 +538,8 @@ static inline void set_linear_ip(struct pt_regs *regs, unsigned long ip)
regs->ip = ip; regs->ip = ip;
} }
ssize_t x86_event_sysfs_show(char *page, u64 config);
#ifdef CONFIG_CPU_SUP_AMD #ifdef CONFIG_CPU_SUP_AMD
int amd_pmu_init(void); int amd_pmu_init(void);
......
...@@ -1628,6 +1628,7 @@ static __initconst const struct x86_pmu core_pmu = { ...@@ -1628,6 +1628,7 @@ static __initconst const struct x86_pmu core_pmu = {
.event_constraints = intel_core_event_constraints, .event_constraints = intel_core_event_constraints,
.guest_get_msrs = core_guest_get_msrs, .guest_get_msrs = core_guest_get_msrs,
.format_attrs = intel_arch_formats_attr, .format_attrs = intel_arch_formats_attr,
.events_sysfs_show = x86_event_sysfs_show,
}; };
struct intel_shared_regs *allocate_shared_regs(int cpu) struct intel_shared_regs *allocate_shared_regs(int cpu)
...@@ -1766,6 +1767,7 @@ static __initconst const struct x86_pmu intel_pmu = { ...@@ -1766,6 +1767,7 @@ static __initconst const struct x86_pmu intel_pmu = {
.pebs_aliases = intel_pebs_aliases_core2, .pebs_aliases = intel_pebs_aliases_core2,
.format_attrs = intel_arch3_formats_attr, .format_attrs = intel_arch3_formats_attr,
.events_sysfs_show = x86_event_sysfs_show,
.cpu_prepare = intel_pmu_cpu_prepare, .cpu_prepare = intel_pmu_cpu_prepare,
.cpu_starting = intel_pmu_cpu_starting, .cpu_starting = intel_pmu_cpu_starting,
......
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