Commit 443473ed authored by Ben Collins's avatar Ben Collins

video1394.c:

  [IEEE1394]
  Patch from Damien Douxchamps to fix video1394 when image size is less than
  page size.
parent 3cb2872a
...@@ -21,6 +21,9 @@ ...@@ -21,6 +21,9 @@
/* jds -- add private data to file to keep track of iso contexts associated /* jds -- add private data to file to keep track of iso contexts associated
with each open -- so release won't kill all iso transfers */ with each open -- so release won't kill all iso transfers */
/* Damien Douxchamps: Fix failure when the number of DMA pages per frame is
one */
#include <linux/config.h> #include <linux/config.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/list.h> #include <linux/list.h>
...@@ -398,7 +401,9 @@ static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags) ...@@ -398,7 +401,9 @@ static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg, ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1); 1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
/* the second descriptor will read PAGE_SIZE-4 bytes */ /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
if (d->nb_cmd > 2) {
/* The second descriptor will read PAGE_SIZE-4 bytes */
ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
DMA_CTL_BRANCH | (PAGE_SIZE-4)); DMA_CTL_BRANCH | (PAGE_SIZE-4));
ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) - ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
...@@ -406,7 +411,7 @@ static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags) ...@@ -406,7 +411,7 @@ static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg, ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1); 2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
for (i=2;i<d->nb_cmd-1;i++) { for (i = 2; i < d->nb_cmd - 1; i++) {
ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
DMA_CTL_BRANCH | PAGE_SIZE); DMA_CTL_BRANCH | PAGE_SIZE);
ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
...@@ -418,12 +423,20 @@ static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags) ...@@ -418,12 +423,20 @@ static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
(i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1); (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
} }
/* the last descriptor will generate an interrupt */ /* The last descriptor will generate an interrupt */
ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size); DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
(buf+(i-1)*PAGE_SIZE) - (buf+(i-1)*PAGE_SIZE) -
(unsigned long)d->dma.kvirt)); (unsigned long)d->dma.kvirt));
} else {
/* Only one DMA page is used. Read d->left_size immediately and */
/* generate an interrupt as this is also the last page. */
ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
(buf + 4) - (unsigned long)d->dma.kvirt));
}
} }
static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags) static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
......
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