Merge tp1.ruhr-uni-bochum.de:/scratch/kai/kernel/v2.5/linux-2.5.make-sam

into tp1.ruhr-uni-bochum.de:/scratch/kai/kernel/v2.5/linux-2.5.make

Documentation/kbuild/00-INDEX

 00-INDEX
     	- this file: info on the kernel build process
-bug-list.txt
-	- known bugs in kbuild programs
 commands.txt
 	- overview of kbuild commands
 kconfig-language.txt
 	- specification of Config Language, the language in Kconfig files
+random.txt
+	- description of generic config targets
 makefiles.txt
 	- developer information for linux kernel makefiles

Documentation/kbuild/bug-list.txt

-Bug List
-21 January 1999
-Michael Elizabeth Chastain, <mailto:mec@shout.net>
-
-- If a variable has a value of "m" in the previous .config file,
-  and a type of bool in the Config script, then all the interpreters
-  get confused.  This happens frequently when someone changes a
-  tristate option to a bool option and people in the field have
-  .config files with a value of 'm'.  For example: CONFIG_PSMOUSE.
-
-- CONFIG_MODVERSIONS has incorrect dependencies.  If you have a
-  problem building the kernel, and you have CONFIG_MODVERSIONS turned
-  on, do a 'make dep' followed by 'make clean' before you try anything
-  else.
-
-- 'make dep' uses multistage dependencies, so the .hdepend file contains
-  'touch' commands.  As a result, building a kernel often touches files
-  in include/linux/*.h.  This messes up CVS and other systems which like
-  to rely on file dates.
-
-- 'make dep' fails for C files which include other C files, such as
-  drivers/cdrom/sbpcd2.c.

Documentation/kbuild/makefiles.txt

 Linux Kernel Makefiles
-2000-September-14
-Michael Elizabeth Chastain, <mec@shout.net>
-
-
-
-=== Table of Contents
 
 This document describes the Linux kernel Makefiles.
 
-  1  Overview
-  2  Who does what
-  3  Makefile language
-  4  Variables passed down from the top
-  5  The structure of an arch Makefile
-     5.1  Architecture-specific variables
-     5.2  Vmlinux build variables
-     5.3  Post-vmlinux goals
-     5.4  Mandatory arch-specific goals
-  6  The structure of a subdirectory Makefile
-     6.1  Comments
-     6.2  Goal definitions
-     6.3  Adapter section
-     6.4  Rules.make section
-     6.5  Special rules
-  7  Rules.make variables
-     7.1  Subdirectories
-     7.2  Object file goals
-     7.3  Library file goals
-     7.4  Loadable module goals
-     7.5  Multi-part modules
-     7.6  Compilation flags
-     7.7  Miscellaneous variables
-  8  New-style variables
-     8.1  New variables
-     8.2  Converting to old-style
-  9  Credits
+=== Table of Contents
 
+	=== 1 Overview
+	=== 2 Who does what
+	=== 3 The kbuild Makefiles
+	   --- 3.1 Goal definitions
+	   --- 3.2 Built-in object goals - obj-y
+	   --- 3.3 Loadable module goals - obj-m
+	   --- 3.4 Objects which export symbols - export-objs
+	   --- 3.5 Library file goals - L_TARGET
+	   --- 3.6 Descending down in directories
+	   --- 3.7 Compilation flags
+	   --- 3.8 Command line dependency
+	   --- 3.9 Dependency tracking
+	   --- 3.10 Special Rules
+
+	=== 4 Host Program support
+	   --- 4.1 Simple Host Program
+	   --- 4.2 Composite Host Programs
+	   --- 4.3 Defining shared libraries  
+	   --- 4.4 Using C++ for host programs
+	   --- 4.5 Controlling compiler options for host programs
+	   --- 4.6 When host programs are actually built
+
+	=== 5 Kbuild clean infrastructure
+
+	=== 6 Architecture Makefiles
+	   --- 6.1 Set variables to tweak the build to the architecture
+	   --- 6.2 Add prerequisites to prepare:
+	   --- 6.3 List directories to visit when descending
+	   --- 6.4 Architecture specific boot images
+	   --- 6.5 Building non-kbuild targets
+	   --- 6.6 Commands useful for building a boot image
+	   --- 6.7 Custom kbuild commands
+
+	=== 7 Kbuild Variables
+	=== 8 Makefile language
+	=== 9 Credits
+	=== 10 TODO
 
 === 1 Overview
 
 The Makefiles have five parts:
 
-    Makefile: the top Makefile.
-    .config: the kernel configuration file.
-    arch/*/Makefile: the arch Makefiles.
-    Subdirectory Makefiles: there are about 300 of these.
-    Rules.make: the common rules for all subdirectory Makefiles.
+	Makefile		the top Makefile.
+	.config			the kernel configuration file.
+	arch/$(ARCH)/Makefile	the arch Makefile.
+	scripts/Makefile.*	common rules etc. for all kbuild Makefiles.
+	kbuild Makefiles	there are about 500 of these.
 
-The top Makefile reads the .config file, which comes from the
-kernel configuration process.
+The top Makefile reads the .config file, which comes from the kernel
+configuration process.
 
 The top Makefile is responsible for building two major products: vmlinux
-(the resident kernel image) and modules (any module files).  It builds
-these goals by recursively descending into the subdirectories of the
-kernel source tree.  The list of subdirectories which are visited depends
-upon the kernel configuration.
-
-The top Makefile textually includes an arch Makefile with the name
-arch/$(ARCH)/Makefile.  The arch Makefile supplies architecture-specific
-information to the top Makefile.
+(the resident kernel image) and modules (any module files).
+It builds these goals by recursively descending into the subdirectories of
+the kernel source tree.
+The list of subdirectories which are visited depends upon the kernel
+configuration. The top Makefile textually includes an arch Makefile
+with the name arch/$(ARCH)/Makefile. The arch Makefile supplies
+architecture-specific information to the top Makefile.
 
-Each subdirectory has a Makefile which carries out the commands passed
-down from above.  The subdirectory Makefile uses information from the
-.config file to construct various file lists, and then it textually
-includes the common rules in Rules.make.
-
-Rules.make defines rules which are common to all the subdirectory
-Makefiles.  It has a public interface in the form of certain variable
-lists.  It then declares rules based on those lists.
+Each subdirectory has a kbuild Makefile which carries out the commands
+passed down from above. The kbuild Makefile uses information from the
+.config file to construct various file lists used by kbuild to build 
+any built-in or modular targets.
 
+scripts/Makefile.* contains all the definitions/rules etc. that
+are used to build the kernel based on the kbuild makefiles.
 
 
 === 2 Who does what
@@ -76,19 +78,19 @@ lists.  It then declares rules based on those lists.
 People have four different relationships with the kernel Makefiles.
 
 *Users* are people who build kernels.  These people type commands such as
-"make menuconfig" or "make bzImage".  They usually do not read or edit
+"make menuconfig" or "make".  They usually do not read or edit
 any kernel Makefiles (or any other source files).
 
 *Normal developers* are people who work on features such as device
 drivers, file systems, and network protocols.  These people need to
-maintain the subdirectory Makefiles for the subsystem that they are
+maintain the kbuild Makefiles for the subsystem that they are
 working on.  In order to do this effectively, they need some overall
 knowledge about the kernel Makefiles, plus detailed knowledge about the
-public interface for Rules.make.
+public interface for kbuild.
 
 *Arch developers* are people who work on an entire architecture, such
-as sparc or ia64.  Arch developers need to know about the arch Makefiles
-as well as subdirectory Makefiles.
+as sparc or ia64.  Arch developers need to know about the arch Makefile
+as well as kbuild Makefiles.
 
 *Kbuild developers* are people who work on the kernel build system itself.
 These people need to know about all aspects of the kernel Makefiles.
@@ -96,883 +98,895 @@ These people need to know about all aspects of the kernel Makefiles.
 This document is aimed towards normal developers and arch developers.
 
 
+=== 3 The kbuild Makefiles
 
-=== 3 Makefile language
-
-The kernel Makefiles are designed to run with GNU Make.  The Makefiles
-use only the documented features of GNU Make, but they do use many
-GNU extensions.
-
-GNU Make supports elementary list-processing functions.  The kernel
-Makefiles use a novel style of list building and manipulation with few
-"if" statements.
-
-GNU Make has two assignment operators, ":=" and "=".  ":=" performs
-immediate evaluation of the right-hand side and stores an actual string
-into the left-hand side.  "=" is like a formula definition; it stores the
-right-hand side in an unevaluated form and then evaluates this form each
-time the left-hand side is used.
-
-There are some cases where "=" is appropriate.  Usually, though, ":="
-is the right choice.
-
-All of the examples in this document were drawn from actual kernel
-sources.  The examples have been reformatted (white space changed, lines
-split), but are otherwise exactly the same.
-
-
-
-=== 4 Variables passed down from the top
-
-The top Makefile exports the following variables:
-
-    VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
-
-	These variables define the current kernel version.  A few arch
-	Makefiles actually use these values directly; they should use
-	$(KERNELRELEASE) instead.
-
-	$(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
-	three-part version number, such as "2", "4", and "0".  These three
-	values are always numeric.
-
-	$(EXTRAVERSION) defines an even tinier sublevel for pre-patches
-	or additional patches.	It is usually some non-numeric string
-	such as "-pre4", and is often blank.
-
-    KERNELRELEASE
-
-	$(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
-	for constructing installation directory names or showing in
-	version strings.  Some arch Makefiles use it for this purpose.
+Most Makefiles within the kernel are kbuild Makefiles that use the
+kbuild infrastructure. This chapter introduce the syntax used in the
+kbuild makefiles.
 
-    ARCH
+Section 3.1 "Goal definitions" is a quick intro, further chapters provide
+more details, with real examples.
 
-	This variable defines the target architecture, such as "i386",
-	"arm", or "sparc".   Many subdirectory Makefiles test $(ARCH)
-	to determine which files to compile.
+--- 3.1 Goal definitions
 
-	By default, the top Makefile sets $(ARCH) to be the same as the
-	host system system architecture.  For a cross build, a user may
-	override the value of $(ARCH) on the command line:
-
-	    make ARCH=m68k ...
-
-    TOPDIR, HPATH
-	
-	$(TOPDIR) is the path to the top of the kernel source tree.
-	Subdirectory Makefiles need this so that they can include
-	$(TOPDIR)/Rules.make.
+	Goal definitions are the main part (heart) of the kbuild Makefile.
+	These lines define the files to be built, any special compilation
+	options, and any subdirectories to be entered recursively.
 
-	$(HPATH) is equal to $(TOPDIR)/include.  A few arch Makefiles
-	need to use this to do special things using include files.
-
-    SUBDIRS
-
-	$(SUBDIRS) is a list of directories which the top Makefile
-	enters in order to build either vmlinux or modules.  The actual
-	directories in $(SUBDIRS) depend on the kernel configuration.
-	The top Makefile defines this variable, and the arch Makefile
-	extends it.
-
-    HEAD, CORE_FILES, NETWORKS, DRIVERS, LIBS
-    LINKFLAGS
-
-	$(HEAD), $(CORE_FILES), $(NETWORKS), $(DRIVERS), and $(LIBS)
-	specify lists of object files and libraries to be linked into
-	vmlinux.
-	
-	The files in $(HEAD) are linked first in vmlinux.
+	The most simple kbuild makefile contains one line:
 
-	$(LINKFLAGS) specifies the flags to build vmlinux.
+	Example:
+		obj-y += foo.o
 
-	The top Makefile and the arch Makefile jointly define these
-	variables.  The top Makefile defines $(CORE_FILES), $(NETWORKS),
-	$(DRIVERS), and $(LIBS).  The arch Makefile defines $(HEAD)
-	and $(LINKFLAGS), and extends $(CORE_FILES) and $(LIBS).
+	This tell kbuild that there is one object in that directory named
+	foo.o. foo.o will be build from foo.c or foo.S.
 
-	Note: there are more variables here than necessary.  $(NETWORKS),
-	$(DRIVERS), and even $(LIBS) could be subsumed into $(CORE_FILES).
+	If foo.o shall be built as a module, the variable obj-m is used.
+	Therefore the following pattern is often used:
 
-    CPP, CC, AS, LD, AR, NM, STRIP, OBJCOPY, OBJDUMP
-    CPPFLAGS, CFLAGS, CFLAGS_KERNEL, MODFLAGS, AFLAGS, LDFLAGS
-    PERL
-    GENKSYMS
+	Example:
+		obj-$(CONFIG_FOO) += foo.o
 
-	These variables specify the commands and flags that Rules.make
-	uses to build goal files from source files.
+	$(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
+	If CONFIG_FOO is neither y nor m, then the file will not be compiled
+	nor linked.
 
-	$(CFLAGS_KERNEL) contains extra C compiler flags used to compile
-	resident kernel code.
+--- 3.2 Built-in object goals - obj-y
 
-	$(MODFLAGS) contains extra C compiler flags used to compile code
-	for loadable kernel modules.  In the future, this flag may be
-	renamed to the more regular name $(CFLAGS_MODULE).
+	The kbuild Makefile specifies object files for vmlinux
+	in the lists $(obj-y).  These lists depend on the kernel
+	configuration.
 
-	$(AFLAGS) contains assembler flags.
+	Kbuild compiles all the $(obj-y) files.  It then calls
+	"$(LD) -r" to merge these files into one built-in.o file.
+	built-in.o is later linked into vmlinux by the parent Makefile.
 
-	$(GENKSYMS) contains the command used to generate kernel symbol
-	signatures when CONFIG_MODVERSIONS is enabled.	The genksyms
-	command comes from the module-init-tools package.
+	The order of files in $(obj-y) is significant.  Duplicates in
+	the lists are allowed: the first instance will be linked into
+	built-in.o and succeeding instances will be ignored.
 
-    CROSS_COMPILE
+	Link order is significant, because certain functions
+	(module_init() / __initcall) will be called during boot in the
+	order they appear. So keep in mind that changing the link
+	order may e.g.  change the order in which your SCSI
+	controllers are detected, and thus you disks are renumbered.
 
-	This variable is a prefix path for other variables such as $(CC),
-	$(AS), and $(LD).  The arch Makefiles sometimes use and set this
-	variable explicitly.  Subdirectory Makefiles don't need to worry
-	about it.
+	Example:
+		#drivers/isdn/i4l/Makefile
+		# Makefile for the kernel ISDN subsystem and device drivers.
+		# Each configuration option enables a list of files.
+		obj-$(CONFIG_ISDN)             += isdn.o
+		obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
 
-	The user may override $(CROSS_COMPILE) on the command line if
-	desired.
+--- 3.3 Loadable module goals - obj-m
 
-    HOSTCC, HOSTCFLAGS
+	$(obj-m) specify object files which are built as loadable
+	kernel modules.
 
-	These variables define the C compiler and C compiler flags to
-	be used for compiling host side programs.  These are separate
-	variables because the target architecture can be different from
-	the host architecture.
+	A module may be built from one source file or several source
+	files. In the case of one source file, the kbuild makefile
+	simply adds the file to $(obj-m).
 
-	If your Makefile compiles and runs a program that is executed
-	during the course of building the kernel, then it should use
-	$(HOSTCC) and $(HOSTCFLAGS).
+	Example:
+		#drivers/isdn/i4l/Makefile
+		obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
 
-	For example, the subdirectory drivers/pci has a helper program
-	named gen-devlist.c.  This program reads a list of PCI ID's and
-	generates C code in the output files classlist.h and devlist.h.
+	Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
 
-	Suppose that a user has an i386 computer and wants to build a
-	kernel for an ia64 machine.  Then the user would use an ia64
-	cross-compiler for most of the compilation, but would use a
-	native i386 host compiler to compile drivers/pci/gen-devlist.c.
+	If a kernel module is built from several source files, you specify
+	that you want to build a module in the same way as above.
 
-	For another example, kbuild helper programs such as
-	scripts/mkdep.c and scripts/lxdialog/*.c are compiled with
-	$(HOSTCC) rather than $(CC).
+	Kbuild needs to know which the parts that you want to build your
+	module from, so you have to tell it by setting an
+	$(<module_name>-objs) variable.
 
-    ROOT_DEV, SVGA_MODE, RAMDISK
+	Example:
+		#drivers/isdn/i4l/Makefile
+		obj-$(CONFIG_ISDN) += isdn.o
+		isdn-objs := isdn_net_lib.o isdn_v110.o isdn_common.o
 
-	End users edit these variables to specify certain information
-	about the configuration of their kernel.  These variables
-	are ancient!  They are also specific to the i386 architecture.
-	They really should be replaced with CONFIG_* options.
+	In this example, the module name will be isdn.o. Kbuild will
+	compile the objects listed in $(isdn-objs) and then run
+	"$(LD) -r" on the list of these files to generate isdn.o.
 
-    MAKEBOOT
+	Kbuild recognises objects used for composite objects by the suffix
+	-objs, and the suffix -y. This allows the Makefiles to use
+	the value of a CONFIG_ symbol to determine if an object is part
+	of a composite object.
 
-	This variable is defined and used only inside the main arch
-	Makefiles.  The top Makefile should not export it.
+	Example:
+		#fs/ext2/Makefile
+	        obj-$(CONFIG_EXT2_FS)        += ext2.o
+	 	ext2-y                       := balloc.o bitmap.o
+	        ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o
+	
+	In this example xattr.o is only part of the composite object
+	ext2.o, if $(CONFIG_EXT2_FS_XATTR) evaluates to 'y'.
 
-    INSTALL_PATH
+	Note: Of course, when you are building objects into the kernel,
+	the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
+	kbuild will build an ext2.o file for you out of the individual
+	parts and then link this into built-in.o, as you would expect.
 
-	This variable defines a place for the arch Makefiles to install
-	the resident kernel image and System.map file.
+--- 3.4 Objects which export symbols - export-objs
 
-    INSTALL_MOD_PATH, MODLIB
+	When using loadable modules, not every global symbol in the
+	kernel / other modules is automatically available, only those
+	explicitly exported are available for your module.
 
-	$(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
-	installation.  This variable is not defined in the Makefile but
-	may be passed in by the user if desired.
+	To make a symbol available for use in modules, to "export" it,
+	use the EXPORT_SYMBOL(<symbol>) directive in your source. In
+	addition, you need to list all object files which export symbols
+	(i.e. their source contains an EXPORT_SYMBOL() directive) in the
+	Makefile variable $(export-objs).
 
-	$(MODLIB) specifies the directory for module installation.
-	The top Makefile defines $(MODLIB) to
-	$(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE).  The user may
-	override this value on the command line if desired.
+	Example:
+		#drivers/isdn/i4l/Makefile
+		# Objects that export symbols.
+		export-objs     := isdn_common.o
 
-    CONFIG_SHELL
+	since isdn_common.c contains
 
-	This variable is private between Makefile and Rules.make.
-	Arch makefiles and subdirectory Makefiles should never use this.
+	    EXPORT_SYMBOL(register_isdn);
 
-    MODVERFILE
+	which makes the function register_isdn available to
+	low-level ISDN drivers.
+	There exist a EXPORT_SYMBOL_GPL() variant with similar functionality,
+	but more restrictive with what may use that symbol. The requirement
+	to list the .o file in export-objs is the same.
 
-	An internal variable.  This doesn't need to be exported, as it
-	is never used outside of the top Makefile.
+--- 3.5 Library file goals - L_TARGET
 
-    MAKE, MAKEFILES
+	Instead of building a built-in.o file, you may also
+	build an archive which again contains objects listed in $(obj-y).
+	This is normally not necessary and only used in lib/ and 
+	arch/$(ARCH)/lib directories.
+	Only the name lib.a is allowed.
 
-	Some variables internal to GNU Make.
+	Example:
+		#arch/i386/lib/Makefile
+		L_TARGET := lib.a
+		obj-y    := checksum.o delay.o
 
-	$(MAKEFILES) in particular is used to force the arch Makefiles
-	and subdirectory Makefiles to read $(TOPDIR)/.config without
-	including it explicitly.  (This was an implementational hack
-	and could be fixed).
+	This will create a library lib.a based on checksum.o and delay.o.
 
+--- 3.6 Descending down in directories
 
+	A Makefile is only responsible for building objects in its own
+	directory. Files in subdirectories should be taken care of by
+	Makefiles in these subdirs. The build system will automatically
+	invoke make recursively in subdirectories, provided you let it know of
+	them.
 
-=== 5 The structure of an arch Makefile
+	To do so obj-y and obj-m are used.
+	ext2 lives in a separate directory, and the Makefile present in fs/
+	tells kbuild to descend down using the following assignment.
 
+	Example:
+		#fs/Makefile
+		obj-$(CONfIG_EXT2_FS) += ext2/
 
+	If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
+	the corresponding obj- variable will be set, and kbuild will descend
+	down in the ext2 directory.
+	Kbuild only uses this information to decide that it needs to visit
+	the directory, it is the Makefile in the subdirectory that
+	specifies what is modules and what is built-in.
 
---- 5.1 Architecture-specific variables
+	It is good practice to use a CONFIG_ variable when assigning directory
+	names. This allows kbuild to totally skip the directory if the
+	corresponding CONFIG_ option is neither 'y' nor 'm'.
 
-The top Makefile includes one arch Makefile file, arch/$(ARCH)/Makefile.
-This section describes the functions of the arch Makefile.
+--- 3.7 Compilation flags
 
-An arch Makefile extends some of the top Makefile's variables with
-architecture-specific values.
+    EXTRA_CFLAGS, EXTRA_AFLAGS, EXTRA_LDFLAGS, EXTRA_ARFLAGS
 
-    SUBDIRS
+	All the EXTRA_ variables apply only to the kbuild makefile
+	where they are assigned. The EXTRA_ variables apply to all
+	commands executed in the kbuild makefile.
 
-	The top Makefile defines $(SUBDIRS).  The arch Makefile extends
-	$(SUBDIRS) with a list of architecture-specific directories.
+	$(EXTRA_CFLAGS) specifies options for compiling C files with
+	$(CC).
 
 	Example:
-
-		# arch/alpha/Makefile
-
-		SUBDIRS := $(SUBDIRS) arch/alpha/kernel arch/alpha/mm \
-		           arch/alpha/lib arch/alpha/math-emu
-
-	This list may depend on the configuration:
-
-		# arch/arm/Makefile
-
-		ifeq ($(CONFIG_ARCH_ACORN),y)
-		SUBDIRS         += drivers/acorn
-		...
+		# drivers/sound/emu10k1/Makefile
+		EXTRA_CFLAGS += -I$(obj)
+		ifdef DEBUG
+		    EXTRA_CFLAGS += -DEMU10K1_DEBUG
 		endif
 
-    CPP, CC, AS, LD, AR, NM, STRIP, OBJCOPY, OBJDUMP
-    CPPFLAGS, CFLAGS, CFLAGS_KERNEL, MODFLAGS, AFLAGS, LDFLAGS
-
-	The top Makefile defines these variables, and the arch Makefile
-	extends them.
 
-	Many arch Makefiles dynamically run the target C compiler to
-	probe supported options:
-
-		# arch/i386/Makefile
-
-		# prevent gcc from keeping the stack 16 byte aligned
-		CFLAGS += $(shell if $(CC) -mpreferred-stack-boundary=2 \
-			  -S -o /dev/null -xc /dev/null >/dev/null 2>&1; \
-			  then echo "-mpreferred-stack-boundary=2"; fi)
-
-	And, of course, $(CFLAGS) can depend on the configuration:
-
-		# arch/i386/Makefile
-
-		ifdef CONFIG_M386
-		CFLAGS += -march=i386
-		endif
+	This variable is necessary because the top Makefile owns the
+	variable $(CFLAGS) and uses it for compilation flags for the
+	entire tree.
 
-		ifdef CONFIG_M486
-		CFLAGS += -march=i486
-		endif
+	$(EXTRA_AFLAGS) is a similar string for per-directory options
+	when compiling assembly language source.
 
-		ifdef CONFIG_M586
-		CFLAGS += -march=i586
-		endif
+	Example:
+		#arch/x86_64/kernel/Makefile
+		EXTRA_AFLAGS := -traditional
 
-	Some arch Makefiles redefine the compilation commands in order
-	to add architecture-specific flags:
 
-		# arch/s390/Makefile
+	$(EXTRA_LDFLAGS) and $(EXTRA_ARFLAGS) are similar strings for
+	per-directory options to $(LD) and $(AR).
 
-		LD=$(CROSS_COMPILE)ld -m elf_s390
-		OBJCOPY=$(CROSS_COMPILE)objcopy -O binary -R .note -R .comment -S
+	Example:
+		#arch/m68k/fpsp040/Makefile
+		EXTRA_LDFLAGS := -x
 
+    CFLAGS_$@, AFLAGS_$@
 
+	CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
+	kbuild makefile.
 
---- 5.2 Vmlinux build variables
+	$(CFLAGS_$@) specifies per-file options for $(CC).  The $@
+	part has a literal value which specifies the file that it is for.
 
-An arch Makefile cooperates with the top Makefile to define variables
-which specify how to build the vmlinux file.  Note that there is no
-corresponding arch-specific section for modules; the module-building
-machinery is all architecture-independent.
+	Example:
+		# drivers/scsi/Makefile
+		CFLAGS_aha152x.o =   -DAHA152X_STAT -DAUTOCONF
+		CFLAGS_gdth.o    = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
+				     -DGDTH_STATISTICS
+		CFLAGS_seagate.o =   -DARBITRATE -DPARITY -DSEAGATE_USE_ASM
 
-    HEAD, CORE_FILES, LIBS
-    LINKFLAGS
+	These three lines specify compilation flags for aha152x.o,
+	gdth.o, and seagate.o
 
-	The top Makefile defines the architecture-independent core of
-	thse variables, and the arch Makefile extends them.  Note that the
-	arch Makefile defines (not just extends) $(HEAD) and $(LINKFLAGS).
+	$(AFLAGS_$@) is a similar feature for source files in assembly
+	languages.
 
 	Example:
+		# arch/arm/kernel/Makefile
+		AFLAGS_head-armv.o := -DTEXTADDR=$(TEXTADDR) -traditional
+		AFLAGS_head-armo.o := -DTEXTADDR=$(TEXTADDR) -traditional
 
-		# arch/m68k/Makefile
+--- 3.9 Dependency tracking
 
-		ifndef CONFIG_SUN3
-		LINKFLAGS = -T $(TOPDIR)/arch/m68k/vmlinux.lds
-		else
-		LINKFLAGS = -T $(TOPDIR)/arch/m68k/vmlinux-sun3.lds -N
-		endif
+	Kbuild track dependencies on the following:
+	1) All prerequisite files (both *.c and *.h)
+	2) CONFIG_ options used in all prerequisite files
+	3) Command-line used to compile target
 
-		...
+	Thus, if you change an option to $(CC) all affected files will
+	be re-compiled.
 
-		ifndef CONFIG_SUN3
-		HEAD := arch/m68k/kernel/head.o
-		else
-		HEAD := arch/m68k/kernel/sun3-head.o
-		endif
+--- 3.10 Special Rules
 
-		SUBDIRS += arch/m68k/kernel arch/m68k/mm arch/m68k/lib
-		CORE_FILES := arch/m68k/kernel/kernel.o arch/m68k/mm/mm.o $(CORE_FILES)
-		LIBS += arch/m68k/lib/lib.a
+	Special rules are used when the kbuild infrastructure does
+	not provide the required support. A typical example is
+	header files generated during the build process.
+	Another example is the architecture specific Makefiles which
+	needs special rules to prepare boot images etc.
 
+	Special rules are written as normal Make rules.
+	Kbuild is not executing in the directory where the Makefile is
+	located, so all special rules shall provide a relative
+	path to prerequisite files and target files.
 
+	Two variables are used when defining special rules:
 
---- 5.3 Post-vmlinux goals
+    $(src)
+	$(src) is a relative path which points to the directory
+	where the Makefile is located. Always use $(src) when
+	referring to files located in the src tree.
 
-An arch Makefile specifies goals that take the vmlinux file, compress
-it, wrap it in bootstrapping code, and copy the resulting files somewhere.
-This includes various kinds of installation commands.
+    $(obj)
+	$(obj) is a relative path which points to the directory
+	where the target is saved. Always use $(obj) when
+	referring to generated files.
 
-These post-vmlinux goals are not standardized across different
-architectures.  Here is a list of these goals and the architectures
-that support each of them (as of kernel version 2.4.0-test6-pre5):
+	Example:
+		#drivers/scsi/Makefile
+		$(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
+			$(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
 
-    balo		mips
-    bootimage		alpha
-    bootpfile		alpha, ia64
-    bzImage		i386, m68k
-    bzdisk		i386
-    bzlilo		i386
-    compressed		i386, m68k, mips, mips64, sh
-    dasdfmt		s390
-    Image		arm
-    image		s390
-    install		arm, i386
-    lilo		m68k
-    msb			alpha, ia64
-    my-special-boot	alpha, ia64
-    orionboot		mips
-    rawboot		alpha
-    silo		s390
-    srmboot		alpha
-    tftpboot.img	sparc, sparc64
-    vmlinux.64		mips64
-    vmlinux.aout	sparc64
-    zImage		arm, i386, m68k, mips, mips64, ppc, sh
-    zImage.initrd	ppc
-    zdisk		i386, mips, mips64, sh
-    zinstall		arm
-    zlilo		i386
-    znetboot.initrd	ppc
+	This is a special rule, following the normal syntax
+	required by make.
+	The target file depends on two prerequisite files. References
+	to the target file are prefixed with $(obj), references
+	to prerequisites are referenced with $(src) (because they are not
+	generated files).
 
 
+=== 4 Host Program support
 
---- 5.4 Mandatory arch-specific goals
+Kbuild supports building executables on the host for use during the
+compilation stage.
+Two steps are required in order to use a host executable.
 
-An arch Makefile must define the following arch-specific goals.
-These goals provide arch-specific actions for the corresponding goals
-in the top Makefile:
+The first step is to tell kbuild that a host program exists. This is
+done utilising the variable host-prog.
 
-    archclean		clean
-    archdep		dep
-    archmrproper	mrproper
+The second step is to add an explicit dependency to the executable.
+This can be done in two ways. Either add the dependency in a rule, 
+or utilise the variable build-targets.
+Both possibilities are described in the following.
 
+--- 4.1 Simple Host Program
 
+	In some cases there is a need to compile and run a program on the
+	computer where the build is running.
+	The following line tells kbuild that the program bin2hex shall be
+	built on the build host.
 
-=== 6 The structure of a subdirectory Makefile
+	Example:
+		host-progs := bin2hex
 
-A subdirectory Makefile has four sections.
+	Kbuild assumes in the above example that bin2hex is made from a single
+	c-source file named bin2hex.c located in the same directory as
+	the Makefile.
+  
+--- 4.2 Composite Host Programs
 
+	Host programs can be made up based on composite objects.
+	The syntax used to define composite objetcs for host programs is
+	similar to the syntax used for kernel objects.
+	$(<executeable>-objs) list all objects used to link the final
+	executable.
 
+	Example:
+		#scripts/lxdialog/Makefile
+		host-progs    := lxdialog  
+		lxdialog-objs := checklist.o lxdialog.o
+
+	Objects with extension .o are compiled from the corresponding .c
+	files. In the above example checklist.c is compiled to checklist.o
+	and lxdialog.c is compiled to lxdialog.o.
+	Finally the two .o files are linked to the executable, lxdialog.
+	Note: The syntax <executable>-y is not permitted for host-programs.
+
+--- 4.3 Defining shared libraries  
+  
+	Objects with extension .so are considered shared libraries, and
+	will be compiled as position independent objects.
+	Kbuild provides support for shared libraries, but the usage
+	shall be restricted.
+	In the following example the libkconfig.so shared library is used
+	to link the executable conf.
 
---- 6.1 Comments
+	Example:
+		#scripts/kconfig/Makefile
+		host-progs      := conf
+		conf-objs       := conf.o libkconfig.so
+		libkconfig-objs := expr.o type.o
+  
+	Shared libraries always require a corresponding -objs line, and
+	in the example above the shared library libkconfig is composed by
+	the two objects expr.o and type.o.
+	expr.o and type.o will be built as position independent code and
+	linked as a shared library libkconfig.so. C++ is not supported for
+	shared libraries.
+
+--- 4.4 Using C++ for host programs
+
+	kbuild offers support for host programs written in C++. This was
+	introduced solely to support kconfig, and is not recommended
+	for general use.
 
-The first section is a comment header. Historically, many anonymous
-people have edited kernel Makefiles without leaving any change
-histories in the header; comments from them would have been valuable.
+	Example:
+		#scripts/kconfig/Makefile
+		host-progs    := qconf
+		qconf-cxxobjs := qconf.o
 
+	In the example above the executable is composed of the C++ file
+	qconf.cc - identified by $(qconf-cxxobjs).
+	
+	If qconf is composed by a mixture of .c and .cc files, then an
+	additional line can be used to identify this.
 
+	Example:
+		#scripts/kconfig/Makefile
+		host-progs    := qconf
+		qconf-cxxobjs := qconf.o
+		qconf-objs    := check.o
+	
+--- 4.5 Controlling compiler options for host programs
 
---- 6.2 Goal definitions
+	When compiling host programs, it is possible to set specific flags.
+	The programs will always be compiled utilising $(HOSTCC) passed
+	the options specified in $(HOSTCFLAGS).
+	To set flags that will take effect for all host programs created
+	in that Makefile use the variable HOST_EXTRACFLAGS.
 
-The second section is a bunch of definitions that are the heart of the
-subdirectory Makefile.  These lines define the files to be built, any
-special compilation options, and any subdirectories to be recursively
-entered.  The declarations in these lines depend heavily on the kernel
-configuration variables (CONFIG_* symbols).
+	Example:
+		#scripts/lxdialog/Makefile
+		HOST_EXTRACFLAGS += -I/usr/include/ncurses
+  
+	To set specific flags for a single file the following construction
+	is used:
 
-The second section looks like this:
+	Example:
+		#arch/ppc64/boot/Makefile
+		HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
+  
+	It is also possible to specify additional options to the linker.
+  
+	Example:
+		#scripts/kconfig/Makefile
+		HOSTLOADLIBES_qconf := -L$(QTDIR)/lib
 
-	# drivers/block/Makefile
-	obj-$(CONFIG_MAC_FLOPPY)	+= swim3.o
-	obj-$(CONFIG_BLK_DEV_FD)	+= floppy.o
-	obj-$(CONFIG_AMIGA_FLOPPY)	+= amiflop.o
-	obj-$(CONFIG_ATARI_FLOPPY)	+= ataflop.o
+	When linking qconf it will be passed the extra option "-L$(QTDIR)/lib".
+ 
+--- 4.6 When host programs are actually built
 
+	Kbuild will only build host-programs when they are referenced
+	as a prerequisite.
+	This is possible in two ways:
 
---- 6.4 Rules.make section
+	(1) List the prerequisite explicitly in a special rule.
 
-The third section is the single line:
+	Example:
+		#drivers/pci/Makefile
+		host-progs := gen-devlist
+		$(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
+			( cd $(obj); ./gen-devlist ) < $<
 
-	include $(TOPDIR)/Rules.make
+	The target $(obj)/devlist.h will not be built before 
+	$(obj)/gen-devlist is updated. Note that references to
+	the host programs in special rules must be prefixed with $(obj).
 
+	(2) Use $(build-targets)
+	When there is no suitable special rule, and the host program
+	shall be built when a makefile is entered, the $(build-targets)
+	variable shall be used.
 
+	Example:
+		#scripts/lxdialog/Makefile
+		host-progs    := lxdialog
+		build-targets := $(host-progs)
 
---- 6.5 Special rules
+	This will tell kbuild to build lxdialog even if not referenced in
+	any rule.
 
-The fourth section contains any special Makefile rules needed that are
-not available through the common rules in Rules.make.
+=== 5 Kbuild clean infrastructure
 
+"make clean" deletes most generated files in the src tree where the kernel
+is compiled. This includes generated files such as host programs.
+Kbuild knows targets listed in $(host-progs) and $(EXTRA_TARGETS) and
+they are all deleted during "make clean".
+Files matching the patterns "*.[oas]", "*.ko", plus some additional files
+generated by kbuild are deleted all over the kernel src tree when
+"make clean" is executed.
 
+Additional files can be specified by means of $(clean-files).
 
-=== 7 Rules.make variables
+	Example:
+		#drivers/pci/Makefile
+		clean-files := devlist.h classlist.h
 
-The public interface of Rules.make consists of the following variables:
+When executing "make clean", the two files "devlist.h classlist.h" will
+be deleted. Kbuild knows that files specified by $(clean-files) are
+located in the same directory as the makefile.
 
+Usually kbuild descends down in subdirectories due to "obj-* := dir/",
+but in the architecture makefiles where the kbuild infrastructure
+is not sufficent this sometimes needs to be explicit.
 
+	Example:
+		#arch/i386/boot/Makefile
+		subdir- := compressed/
 
---- 7.1 Subdirectories
+The above assignment instructs kbuild to descend down in the
+directory compressed/ when "make clean" is executed.
 
-A Makefile is only responsible for building objects in its own
-directory. Files in subdirectories should be taken care of by
-Makefiles in the these subdirs. The build system will automatically
-invoke make recursively in subdirectories, provided you let it know of
-them.
+To support the clean infrastructure in the Makefiles that builds the
+final bootimage there is an optional target named archclean:
 
-To do so, use the subdir-{y,m,n,} variables:
+	Example:
+		#arch/i386/Makefile
+		archclean:
+			$(Q)$(MAKE) $(clean)=arch/i386/boot
+
+When "make clean" is executed, make will descend down in arch/i386/boot,
+and clean as usual. The Makefile located in arch/i386/boot/ may use
+the subdir- trick to descend further down.
+
+Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
+included in the top level makefile, and the kbuild infrastructure
+is not operational at that point.
+
+Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
+be visited during "make clean".
+
+=== 6 Architecture Makefiles
+
+The top level Makefile sets up the environment and does the preparation,
+before starting to descend down in the individual directories.
+The top level makefile contains the generic part, whereas the
+arch/$(ARCH)/Makefile contains what is required to set-up kbuild
+to the said architecture.
+To do so arch/$(ARCH)/Makefile sets a number of variables, and defines
+a few targets.
+
+When kbuild executes the following steps are followed (roughly):
+1) Configuration of the kernel => produced .config
+2) Store kernel version in include/linux/version.h
+3) Symlink include/asm to include/asm-$(ARCH)
+4) Updating all other prerequisites to the target prepare:
+   - Additional prerequisites are specified in arch/$(ARCH)/Makefile
+5) Recursively descend down in all directories listed in
+   init-* core* drivers-* net-* libs-* and build all targets.
+   - The value of the above variables are extended in arch/$(ARCH)/Makefile.
+6) All object files are then linked and the resulting file vmlinux is 
+   located at the root of the src tree.
+   The very first objects linked are listed in head-y, assigned by
+   arch/$(ARCH)/Makefile.
+7) Finally the architecture specific part does any required post processing
+   and builds the final bootimage.
+   - This includes building boot records
+   - Preparing initrd images and the like
+
+
+--- 6.1 Set variables to tweak the build to the architecture
+
+    LDFLAGS		Generic $(LD) options
+
+	Flags used for all invocations of the linker.
+	Often specifying the emulation is sufficient.
 
-	subdir-$(CONFIG_ISDN)                   += i4l
-	subdir-$(CONFIG_ISDN_CAPI)              += capi
+	Example:
+		#arch/s390/Makefile
+		LDFLAGS         := -m elf_s390
+	Note: EXTRA_LDFLAGS and LDFLAGS_$@ can be used to further customise
+	the flags used. See chapter 7.
+	
+    LDFLAGS_MODULE	Options for $(LD) when linking modules
 
-When building the actual kernel, i.e. vmlinux ("make
-{vmlinux,bzImage,...}"), make will recursively descend into
-directories listed in $(subdir-y).
+	LDFLAGS_MODULE is used to set specific flags for $(LD) when
+	linking the .ko files used for modules.
+	Default is "-r", for relocatable output.
 
-When building modules ("make modules"), make will recursively descend
-into directories listed in $(subdir-m).
+    LDFLAGS_vmlinux	Options for $(LD) when linking vmlinux
 
-When building the dependencies ("make dep") make needs to visit every
-subdir, so it'll descend into every directory listed in 
-$(subdir-y), $(subdir-m), $(subdir-n), $(subdir-).
+	LDFLAGS_vmlinux is used to specify additional flags to pass to
+	the linker when linking the final vmlinux.
+	LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
 
-You may encounter the case where a config option may be set to "y", but
-you still want to possibly build modules in that subdirectory.
+	Example:
+		#arch/i386/Makefile
+		LDFLAGS_vmlinux := -e stext
 
-For example, drivers/isdn/capi/Makefile has
+    LDFLAGS_BLOB	Options for $(LD) when linking the initramfs blob
 
-	obj-$(CONFIG_ISDN_CAPI)                 += kernelcapi.o capiutil.o
-	obj-$(CONFIG_ISDN_CAPI_CAPI20)          += capi.o
+	The image used for initramfs is made during the build process.
+	LDFLAGS_BLOB is used to specify additional flags to be used when
+	creating the initramfs_data.o file.
+	Example:
+		#arch/i386/Makefile
+		LDFLAGS_BLOB := --format binary --oformat elf32-i386
 
-where it's possible that CONFIG_ISDN_CAPI=y, but
-CONFIG_ISDN_CAPI_CAPI20=m.
+    OBJCOPYFLAGS	objcopy flags
 
-This is expressed by the following construct in the parent Makefile
-drivers/isdn/Makefile:
+	When $(call if_changed,objcopy) is used to translate a .o file,
+	then the flags specified in OBJCOPYFLAGS will be used.
+	$(call if_changed,objcopy) is often used to generate raw binaries on
+	vmlinux.
 
-	mod-subdirs                             := i4l hisax capi eicon
-	subdir-$(CONFIG_ISDN_CAPI)              += capi
+	Example:
+		#arch/s390/Makefile
+		OBJCOPYFLAGS := -O binary
 
-Having a subdir ("capi") listed in the variable $(mod-subdirs) will
-make the build system enter the specified subdirectory during "make
-modules" also, even though the subdir ("capi") is listed only in
-$(subdir-y), not $(subdir-m).
+		#arch/s390/boot/Makefile
+		$(obj)/image: vmlinux FORCE
+			$(call if_changed,objcopy)
 
+	In this example the binary $(obj)/image is a binary version of
+	vmlinux. The usage of $(call if_changed,xxx) will be described later.
 
---- 7.2 Object file goals
+    AFLAGS		$(AS) assembler flags
 
-    O_TARGET, obj-y
+	Default value - see top level Makefile
+	Append or modify as required per architecture.
 
-	The subdirectory Makefile specifies object files for vmlinux
-	in the lists $(obj-y).  These lists depend on the kernel
-	configuration.
+	Example:
+		#arch/sparc64/Makefile
+		AFLAGS += -m64 -mcpu=ultrasparc
 
-	Rules.make compiles all the $(obj-y) files.  It then calls
-	"$(LD) -r" to merge these files into one .o file with the name
-	$(O_TARGET).  This $(O_TARGET) is later linked into vmlinux by 
-	a parent Makefile.
+    CFLAGS		$(CC) compiler flags
 
-	The order of files in $(obj-y) is significant.  Duplicates in
-	the lists are allowed: the first instance will be linked into
-	$(O_TARGET) and succeeding instances will be ignored.
+	Default value - see top level Makefile
+	Append or modify as required per architecture.
 
-	Link order is significant, because certain functions
-	(module_init() / __initcall) will be called during boot in the
-	order they appear. So keep in mind that changing the link
-	order may e.g.  change the order in which your SCSI
-	controllers are detected, and thus you disks are renumbered.
+	Often the CFLAGS variable depends on the configuration.
 
 	Example:
+		#arch/i386/Makefile
+		cflags-$(CONFIG_M386) += -march=i386
+		CFLAGS += $(cflags-y)
 
-	    # Makefile for the kernel ISDN subsystem and device drivers.
+	Many arch Makefiles dynamically run the target C compiler to
+	probe supported options:
 
-	    # The target object and module list name.
+		#arch/i386/Makefile
+		check_gcc = $(shell if $(CC) $(1) -S -o /dev/null -xc \
+		            /dev/null\ > /dev/null 2>&1; then echo "$(1)"; \
+		            else echo "$(2)"; fi)
+		cflags-$(CONFIG_MCYRIXIII) += $(call check_gcc,\
+		                                     -march=c3,-march=i486)
 
-	    O_TARGET        := vmlinux-obj.o
+		CFLAGS += $(cflags-y)
 
-	    # Each configuration option enables a list of files.
+	The above examples both utilise the trick that a config option expands
+	to 'y' when selected.
 
-	    obj-$(CONFIG_ISDN)                      += isdn.o
-	    obj-$(CONFIG_ISDN_PPP_BSDCOMP)          += isdn_bsdcomp.o
+    CFLAGS_KERNEL	$(CC) options specific for built-in
 
-	    # The global Rules.make.
+	$(CFLAGS_KERNEL) contains extra C compiler flags used to compile
+	resident kernel code.
 
-	    include $(TOPDIR)/Rules.make
+    CFLAGS_MODULE	$(CC) options specific for modules
 
---- 7.3 Library file goals
+	$(CFLAGS_MODULE) contains extra C compiler flags used to compile code
+	for loadable kernel modules.
 
-    L_TARGET
+ 
+--- 6.2 Add prerequisites to prepare:
 
-        Instead of building an O_TARGET object file, you may also
-	build an archive which again contains objects listed in
-	$(obj-y). This is normally not necessary and only used in
-	the lib, arch/$(ARCH)/lib directories.
+	The prepare: rule is used to list prerequisites that needs to be
+	built before starting to descend down in the subdirectories.
+	This is usual header files containing assembler constants.
 
+		Example:
+		#arch/s390/Makefile
+		prepare: include/asm-$(ARCH)/offsets.h
 
---- 7.4 Loadable module goals
+	In this example the file include/asm-$(ARCH)/offsets.h will
+	be built before descending down in the subdirectories.
+	See also chapter XXX-TODO that describe how kbuild supports
+	generating offset header files.
 
-    obj-m
 
-	$(obj-m) specify object files which are built as loadable
-	kernel modules.
+--- 6.3 List directories to visit when descending
 
-	A module may be built from one source file or several source
-	files. In the case of one source file, the subdirectory
-	Makefile simply adds the file to $(obj-m)
+	An arch Makefile cooperates with the top Makefile to define variables
+	which specify how to build the vmlinux file.  Note that there is no
+	corresponding arch-specific section for modules; the module-building
+	machinery is all architecture-independent.
 
-	Example:
+	
+    head-y, init-y, core-y, libs-y, drivers-y, net-y
 
-	    obj-$(CONFIG_ISDN_PPP_BSDCOMP)          += isdn_bsdcomp.o
+	$(head-y) list objects to be linked first in vmlinux.
+	$(libs-y) list directories where a libs.a archive can be located.
+	The rest list directories where a built-in.o object file can be located.
 
-	If a kernel module is built from several source files, you specify
-	that you want to build a module in the same way as above.
+	$(init-y) objects will be located after $(head-y).
+	Then the rest follows in this order:
+	$(core-y), $(libs-y), $(drivers-y) and $(net-y).
 
-	However, the build system of course needs to know which the parts
-	are that you want to build your module of, so you have to tell it
-	by setting an $(<module_name>-objs) variable.
+	The top level Makefile define values for all generic directories,
+	and arch/$(ARCH)/Makefile only adds architecture specific directories.
 
 	Example:
+		#arch/sparc64/Makefile
+		core-y += arch/sparc64/kernel/
+		libs-y += arch/sparc64/prom/ arch/sparc64/lib/
+		drivers-$(CONFIG_OPROFILE)  += arch/sparc64/oprofile/
 
-	    obj-$(CONFIG_ISDN)                      += isdn.o
-
-	    isdn-objs := isdn_net.o isdn_tty.o isdn_v110.o isdn_common.o
 
-	In this example, the module name will be isdn.o. Rules.make
-	will compile the objects listed in $(isdn-objs) and then run
-	"$(LD) -r" on the list of these files to generate isdn.o
+--- 6.4 Architecture specific boot images
 
-	Note: Of course, when you are building objects into the kernel,
-	the syntax above will also work. So, if you have CONFIG_ISDN=y,
-	the build system will build an isdn.o for you out of the individual
-	parts and then link this into the $(O_TARGET), as you'd expect.
-
-
---- 7.5 Objects which export symbols
+	An arch Makefile specifies goals that take the vmlinux file, compress
+	it, wrap it in bootstrapping code, and copy the resulting files
+	somewhere. This includes various kinds of installation commands.
+	The actual goals are not standardized across architectures.
 
-    export-objs
+	It is common to locate any additional processing in a boot/
+	directory below arch/$(ARCH)/.
 
-	When using loadable modules, not every global symbol in the
-	kernel / other modules is automatically available, only those
-	explicitly exported are available for your module.
+	Kbuild does not provide any smart way to support building a
+	target specified in boot/. Therefore arch/$(ARCH)/Makefile shall
+	call make manually to build a target in boot/.
 
-	To make a symbol available for use in modules, to "export" it,
-	use the EXPORT_SYMBOL(<symbol>) directive in your source. In
-	addition, you need to list all object files which export symbols
-	(i.e. their source contains an EXPORT_SYMBOL() directive) in the
-	Makefile variable $(export-objs).
+	The recommended approach is to include shortcuts in
+	arch/$(ARCH)/Makefile, and use the full path when calling down
+	into the arch/$(ARCH)/boot/Makefile.
 
 	Example:
+		#arch/i386/Makefile
+		boot := arch/i386/boot
+		bzImage: vmlinux
+			$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
 
-	    # Objects that export symbols.
+	"$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
+	make in a subdirectory.
 
-	    export-objs     := isdn_common.o
-
-        since isdn_common.c contains
-
-	    EXPORT_SYMBOL(register_isdn);
-
-	which makes the function register_isdn available to
-	low-level ISDN drivers.
-	    
-
---- 7.6 Compilation flags
-
-    EXTRA_CFLAGS, EXTRA_AFLAGS, EXTRA_LDFLAGS, EXTRA_ARFLAGS
-
-	$(EXTRA_CFLAGS) specifies options for compiling C files with
-	$(CC).	The options in this variable apply to all $(CC) commands
-	for files in the current directory.
+	There are no rules for naming of the architecture specific targets,
+	but executing "make help" will list all relevant targets.
+	To support this $(archhelp) must be defined.
 
 	Example:
+		#arch/i386/Makefile
+		define archhelp
+		  echo  '* bzImage      - Image (arch/$(ARCH)/boot/bzImage)'
+		endef
+
+	When make is executed without arguments, the first goal encountered
+	will be built. In the top level Makefile the first goal present
+	is all:.
+	An architecture shall always per default build a bootable image.
+	In "make help" the default goal is highlighted with a '*'.
+	Add a new prerequisite to all: to select a default goal different
+	from vmlinux.
 
-		# drivers/sound/emu10k1/Makefile
-		EXTRA_CFLAGS += -I.
-		ifdef DEBUG
-		    EXTRA_CFLAGS += -DEMU10K1_DEBUG
-		endif
-
-	$(EXTRA_CFLAGS) does not apply to subdirectories of the current
-	directory.  Also, it does not apply to files compiled with
-	$(HOSTCC).
+	Example:
+		#arch/i386/Makefile
+		all: bzImage 
 
-	This variable is necessary because the top Makefile owns the
-	variable $(CFLAGS) and uses it for compilation flags for the
-	entire tree.
+	When "make" is executed without arguments, bzImage will be built.
 
-	$(EXTRA_AFLAGS) is a similar string for per-directory options
-	when compiling assembly language source.
+--- 6.5 Building non-kbuild targets
 
-	Example: at the time of writing, there were no examples of
-	$(EXTRA_AFLAGS) in the kernel corpus.
+    EXTRA_TARGETS
 
-	$(EXTRA_LDFLAGS) and $(EXTRA_ARFLAGS) are similar strings for
-	per-directory options to $(LD) and $(AR).
+	EXTRA_TARGETS specify additional targets created in current
+	directory, in addition to any targets specified by obj-*.
 
-	Example: at the time of writing, there were no examples of
-	$(EXTRA_LDFLAGS) or $(EXTRA_ARFLAGS) in the kernel corpus.
-
-    CFLAGS_$@, AFLAGS_$@
-
-	$(CFLAGS_$@) specifies per-file options for $(CC).  The $@
-	part has a literal value which specifies the file that it's for.
+	Listing all targets in EXTRA_TARGETS is required for three purposes:
+	1) Avoid that the target is linked in as part of built-in.o
+	2) Enable kbuild to check changes in command lines
+	   - When $(call if_changed,xxx) is used
+	3) kbuild knows what file to delete during "make clean"
 
 	Example:
+		#arch/i386/kernel/Makefile
+		EXTRA_TARGETS := head.o init_task.o
 
-		# drivers/scsi/Makefile
-		CFLAGS_aha152x.o =   -DAHA152X_STAT -DAUTOCONF
-		CFLAGS_gdth.o    = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
-				     -DGDTH_STATISTICS
-		CFLAGS_seagate.o =   -DARBITRATE -DPARITY -DSEAGATE_USE_ASM
-
-	These three lines specify compilation flags for aha152x.o,
-	gdth.o, and seagate.o
-
-	$(AFLAGS_$@) is a similar feature for source files in assembly
-	languages.
+	In this example EXTRA_TARGETS is used to list object files that
+	shall be built, but shall not be linked as part of built-in.o.
 
 	Example:
+		#arch/i386/boot/Makefile
+		EXTRA_TARGETS := vmlinux.bin bootsect bootsect.o
 
-		# arch/arm/kernel/Makefile
-		AFLAGS_head-armv.o := -DTEXTADDR=$(TEXTADDR) -traditional
-		AFLAGS_head-armo.o := -DTEXTADDR=$(TEXTADDR) -traditional
-
-	Rules.make has a feature where an object file depends on the
-	value of $(CFLAGS_$@) that was used to compile it.  (It also
-	depends on the values of $(CFLAGS) and $(EXTRA_CFLAGS)).  Thus,
-	if you change the value of $(CFLAGS_$@) for a file, either by
-	editing the Makefile or overriding the value some other way,
-	Rules.make will do the right thing and re-compile your source
-	file with the new options.
-
-	Note: because of a deficiency in Rules.make, assembly language
-	files do not have flag dependencies.  If you edit $(AFLAGS_$@)
-	for such a file, you will have to remove the object file in order
-	to re-build from source.
-
-    LD_RFLAG
-
-	This variable is used, but never defined.  It appears to be a
-	vestige of some abandoned experiment.
-
-
-
---- 7.7 Miscellaneous variables
-
-    IGNORE_FLAGS_OBJS
-
-	$(IGNORE_FLAGS_OBJS) is a list of object files which will not have
-	their flag dependencies automatically tracked.	This is a hackish
-	feature, used to kludge around a problem in the implementation
-	of flag dependencies.  (The problem is that flag dependencies
-	assume that a %.o file is built from a matching %.S or %.c file.
-	This is sometimes not true).
-
-    USE_STANDARD_AS_RULE
-
-	This is a transition variable.	If $(USE_STANDARD_AS_RULE)
-	is defined, then Rules.make will provide standard rules for
-	assembling %.S files into %.o files or %.s files (%.s files
-	are useful only to developers).
-
-	If $(USE_STANDARD_AS_RULE) is not defined, then Rules.make
-	will not provide these standard rules.	In this case, the
-	subdirectory Makefile must provide its own private rules for
-	assembling %.S files.
-
-	In the past, all Makefiles provided private %.S rules.	Newer
-	Makefiles should define USE_STANDARD_AS_RULE and use the standard
-	Rules.make rules.  As soon as all the Makefiles across all
-	architectures have been converted to USE_STANDARD_AS_RULE, then
-	Rules.make can drop the conditional test on USE_STANDARD_AS_RULE.
-	After that, all the other Makefiles can drop the definition of
-	USE_STANDARD_AS_RULE.
-
-
-
-=== 8 New-style variables
-
-[ This sections dates back from a time where the way to write Makefiles
-  described above was "new-style". I'm leaving it in as it describes the
-  same thing in other words, so it may be of some use ]
-
-The "new-style variables" are simpler and more powerful than the
-"old-style variables".  As a result, many subdirectory Makefiles shrank
-more than 60%.  This author hopes that, in time, all arch Makefiles and
-subdirectory Makefiles will convert to the new style.
+	In this example EXTRA_TARGETS is used to list all intermediate
+	targets, and all final targets.
+	The targets are added to EXTRA_TARGETS to enable 2) and 3) above.
+	
+--- 6.6 Commands useful for building a boot image
 
-Rules.make does not understand new-style variables.  Thus, each new-style
-Makefile has a section of boilerplate code that converts the new-style
-variables into old-style variables.  There is also some mixing, where
-people define most variables using "new style" but then fall back to
-"old style" for a few lines.
+	Kbuild provide a few macros that are useful when building a
+	boot image.
 
---- 8.1 New variables
+    if_changed
 
-    obj-y obj-m obj-n obj-
+	if_changed is the infrastructure used for the following commands.
 
-	These variables replace $(O_OBJS), $(OX_OBJS), $(M_OBJS),
-	and $(MX_OBJS).
+	Usage:
+		target: source(s) FORCE
+			$(call if_changed,ld/objcopy/gzip)
 
-	Example:
+	When the rule is evaluated it is checked to see if any files
+	needs an update, or the commandline has changed since last
+	invocation. The latter will force a rebuild if any options
+	to the executable have changed.
+	Any target that utilises if_changed must be listed in EXTRA_TARGETS,
+	otherwise the command line check will fail, and the target will
+	always be built.
+	if_changed may be used in conjunction with custom commands as
+	defined in 6.7 "Custom kbuild commands".
+	Note: It is a typical mistake to forget the FORCE prerequisite.
 
-		# drivers/block/Makefile
-		obj-$(CONFIG_MAC_FLOPPY)        += swim3.o
-		obj-$(CONFIG_BLK_DEV_FD)        += floppy.o
-		obj-$(CONFIG_AMIGA_FLOPPY)      += amiflop.o
-		obj-$(CONFIG_ATARI_FLOPPY)      += ataflop.o
+    ld
+	Link target. Often LDFLAGS_$@ is used to set specific options to ld.
+	
+    objcopy
+	Copy binary. Uses OBJCOPYFLAGS usually specified in
+	arch/$(ARCH)/Makefile.
 
-	Notice the use of $(CONFIG_...) substitutions on the left hand
-	side of an assignment operator.  This gives GNU Make the power
-	of associative indexing!  Each of these assignments replaces
-	eight lines of code in an old-style Makefile.
+    gzip
+	Compress target. Use maximum compression to compress target.
 
-	After executing all of the assignments, the subdirectory
-	Makefile has built up four lists: $(obj-y), $(obj-m), $(obj-n),
-	and $(obj-).
 
-	$(obj-y) is a list of files to include in vmlinux.
-	$(obj-m) is a list of files to build as single-file modules.
-	$(obj-n) and $(obj-) are ignored.
+--- 6.7 Custom kbuild commands
 
-	Each list may contain duplicates items; duplicates are
-	automatically removed later.  Duplicates in both $(obj-y) and
-	$(obj-m) will automatically be removed from the $(obj-m) list.
+	When kbuild is executing with KBUILD_VERBOSE=0 then only a shorthand
+	of a command is normally displayed.
+	To enable this behaviour for custom commands kbuild requires
+	two variables to be set:
+	quiet_cmd_<command>	- what shall be echoed
+	      cmd_<command>	- the command to execute
 
 	Example:
+		#
+		quiet_cmd_image = BUILD   $@
+		      cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
+		                                     $(obj)/vmlinux.bin > $@
 
-		# drivers/net/Makefile
-
-		...
-		obj-$(CONFIG_OAKNET) += oaknet.o 8390.o
-		...
-		obj-$(CONFIG_NE2K_PCI) += ne2k-pci.o 8390.o
-		...
-		obj-$(CONFIG_STNIC) += stnic.o 8390.o
-		...
-		obj-$(CONFIG_MAC8390) += daynaport.o 8390.o
-		...
-
-	In this example, four different drivers require the code in
-	8390.o.  If one or more of these four drivers are built into
-	vmlinux, then 8390.o will also be built into vmlinux, and will
-	*not* be built as a module -- even if another driver which needs
-	8390.o is built as a module.  (The modular driver is able to
-	use services of the 8390.o code in the resident vmlinux image).
-
-    export-objs
-
-	$(export-objs) is a list of all the files in the subdirectory
-	which potentially export symbols.  The canonical way to construct
-	this list is:
-
-	    grep -l EXPORT_SYMBOL *.c
+		$(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
+			$(call if_changed,image)
+			@echo 'Kernel: $@ is ready'
 
-	(but watch out for sneaky files that call EXPORT_SYMBOL from an
-	included header file!)
+	When updating the $(obj)/bzImage target the line:
 
-	This is a potential list, independent of the kernel configuration.
-	All files that export symbols go into $(export-objs).  The
-	boilerplate code then uses the $(export-objs) list to separate
-	the real file lists into $(*_OBJS) and $(*X_OBJS).
+	BUILD    arch/i386/boot/bzImage
 
-	Experience has shown that maintaining the proper X's in an
-	old-style Makefile is difficult and error-prone.  Maintaining the
-	$(export-objs) list in a new-style Makefile is simpler and easier
-	to audit.
+	will be displayed with "make KBUILD_VERBOSE=0".
+	
 
-    $(foo)-objs
+=== 7 Kbuild Variables
 
-	Some kernel modules are composed of multiple object files linked
-	together.
+The top Makefile exports the following variables:
 
-	For each multi-part kernel modul there is a list of all the
-	object files which make up that module.  For a kernel module
-	named foo.o, its object file list is foo-objs.
+    VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
 
-	Example:
+	These variables define the current kernel version.  A few arch
+	Makefiles actually use these values directly; they should use
+	$(KERNELRELEASE) instead.
 
-		# drivers/scsi/Makefile
-		list-multi	:= scsi_mod.o sr_mod.o initio.o a100u2w.o
+	$(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
+	three-part version number, such as "2", "4", and "0".  These three
+	values are always numeric.
 
-		...
+	$(EXTRAVERSION) defines an even tinier sublevel for pre-patches
+	or additional patches.	It is usually some non-numeric string
+	such as "-pre4", and is often blank.
 
-		scsi_mod-objs	:= hosts.o scsi.o scsi_ioctl.o constants.o \
-				   scsicam.o scsi_proc.o scsi_error.o \
-				   scsi_obsolete.o scsi_queue.o scsi_lib.o \
-				   scsi_merge.o scsi_dma.o scsi_scan.o \
-				   scsi_syms.o
-		sr_mod-objs	:= sr.o sr_ioctl.o sr_vendor.o
-		initio-objs	:= ini9100u.o i91uscsi.o
-		a100u2w-objs	:= inia100.o i60uscsi.o
+    KERNELRELEASE
 
-	The subdirectory Makefile puts the modules onto obj-* lists in
-	the usual configuration-dependent way:
+	$(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
+	for constructing installation directory names or showing in
+	version strings.  Some arch Makefiles use it for this purpose.
 
-		obj-$(CONFIG_SCSI)		+= scsi_mod.o
-		obj-$(CONFIG_BLK_DEV_SR)	+= sr_mod.o
-		obj-$(CONFIG_SCSI_INITIO)	+= initio.o
-		obj-$(CONFIG_SCSI_INIA100)	+= a100u2w.o
+    ARCH
 
-	Suppose that CONFIG_SCSI=y.  Then vmlinux needs to link in all
-	14 components of scsi_mod.o.
+	This variable defines the target architecture, such as "i386",
+	"arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
+	determine which files to compile.
 
-	Suppose that CONFIG_BLK_DEV_SR=m.  Then the 3 components
-	of sr_mod.o will be linked together with "$(LD) -r" to make the
-	kernel module sr_mod.o.
+	By default, the top Makefile sets $(ARCH) to be the same as the
+	host system architecture.  For a cross build, a user may
+	override the value of $(ARCH) on the command line:
 
-	Also suppose CONFIG_SCSI_INITIO=n.  Then initio.o goes onto
-	the $(obj-n) list and that's the end of it.  Its component
-	files are not compiled, and the composite file is not created.
+	    make ARCH=m68k ...
 
 
-    subdir-y subdir-m subdir-n subdir-
+    INSTALL_PATH
 
-	These variables replace $(ALL_SUB_DIRS), $(SUB_DIRS) and
-	$(MOD_SUB_DIRS).
+	This variable defines a place for the arch Makefiles to install
+	the resident kernel image and System.map file.
+	Use this for architecture specific install targets.
 
-	Example:
+    INSTALL_MOD_PATH, MODLIB
 
-		# drivers/Makefile
-		subdir-$(CONFIG_PCI)		+= pci
-		subdir-$(CONFIG_PCMCIA)		+= pcmcia
-		subdir-$(CONFIG_MTD)		+= mtd
-		subdir-$(CONFIG_SBUS)		+= sbus
+	$(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
+	installation.  This variable is not defined in the Makefile but
+	may be passed in by the user if desired.
 
-	These variables work similar to obj-*, but are used for
-	subdirectories instead of object files.
+	$(MODLIB) specifies the directory for module installation.
+	The top Makefile defines $(MODLIB) to
+	$(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE).  The user may
+	override this value on the command line if desired.
 
-	After executing all assignments, the subdirectory Makefile has
-	built up four lists: $(subdir-y), $(subdir-m), $(subdir-n),
-	and $(subdir-).
+=== 8 Makefile language
 
-	$(subdir-y) is a list of directories that should be entered
-		for making vmlinux.
-	$(subdir-m) is a list of directories that should be entered
-		for making modules.
-	$(subdir-n) and $(subdir-) are only used for collecting a list
-		of all subdirectories of this directory.
+The kernel Makefiles are designed to run with GNU Make.  The Makefiles
+use only the documented features of GNU Make, but they do use many
+GNU extensions.
 
-	Each list besides subdir-y may contain duplicates items; duplicates
-	are automatically removed later.
+GNU Make supports elementary list-processing functions.  The kernel
+Makefiles use a novel style of list building and manipulation with few
+"if" statements.
 
-    mod-subdirs
+GNU Make has two assignment operators, ":=" and "=".  ":=" performs
+immediate evaluation of the right-hand side and stores an actual string
+into the left-hand side.  "=" is like a formula definition; it stores the
+right-hand side in an unevaluated form and then evaluates this form each
+time the left-hand side is used.
 
-	$(mod-subdirs) is a list of all the subdirectories that should
-	be added to $(subdir-m), too if they appear in $(subdir-y)
+There are some cases where "=" is appropriate.  Usually, though, ":="
+is the right choice.
 
-	Example:
+=== 9 Credits
 
-		# fs/Makefile
-		mod-subdirs :=	nls
+Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
+Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
+Updates by Sam Ravnborg <sam@ravnborg.org>
 
-	This means nls should be added to (subdir-y) and $(subdir-m) if
-	CONFIG_NFS = y.
+=== 10 TODO
 
-=== 9 Credits
+- Describe how kbuild support shipped files with _shipped.
+- Generating offset header files.
+- Add more variables to section 7?
 
-Thanks to the members of the linux-kbuild mailing list for reviewing
-drafts of this document, with particular thanks to Peter Samuelson
-and Thomas Molina.

Documentation/modules.txt

@@ -9,20 +9,13 @@ modules packages aren't aware of some of the newer modular features
 that the kernel now supports.  The current required version is listed
 in the file linux/Documentation/Changes.
 
-* * * NOTE * * *
-The kernel has been changed to remove kerneld support and use
-the new kmod support.  Keep this in mind when reading this file.  Kmod
-does the exact same thing as kerneld, but doesn't require an external
-program (see Documentation/kmod.txt)
-
 In the beginning...
 -------------------
 
 Anyway, your first step is to compile the kernel, as explained in the
 file linux/README.  It generally goes like:
 
-	make config
-	make dep
+	make *config <= usually menuconfig or xconfig
 	make clean
 	make zImage or make zlilo
 
@@ -39,15 +32,16 @@ You will generally select the minimal resident set that is needed to boot:
 	plus those things that you just can't live without...
 
 The set of modules is constantly increasing, and you will be able to select
-the option "m" in "make config" for those features that the current kernel
+the option "m" in "make menuconfig" for those features that the current kernel
 can offer as loadable modules.
 
 You also have a possibility to create modules that are less dependent on
-the kernel version.  This option can be selected during "make config", by
+the kernel version.  This option can be selected during "make *config", by
 enabling CONFIG_MODVERSIONS, and is most useful on "stable" kernel versions,
-such as the kernels from the 1.2 and 2.0 series.
+such as the kernels from the 2.<even number> series.
 If you have modules that are based on sources that are not included in
 the official kernel sources, you will certainly like this option...
+See below how to compile modules outside the official kernel.
 
 Here is a sample of the available modules included in the kernel sources:
 
@@ -83,22 +77,45 @@ When you have made the kernel, you create the modules by doing:
 
 	make modules
 
-This will compile all modules and update the linux/modules directory.
-In this directory you will then find a bunch of symbolic links,
-pointing to the various object files in the kernel tree.
+This will compile all modules. A module is identified by the
+extension .ko, for kernel object.
 Now, after you have created all your modules, you should also do:
 
 	make modules_install
 
 This will copy all newly made modules into subdirectories under
 "/lib/modules/kernel_release/", where "kernel_release" is something
-like 2.0.1, or whatever the current kernel version is...
+like 2.5.54, or whatever the current kernel version is.
+Note: Installing modules may require root privileges.
 
 As soon as you have rebooted the newly made kernel, you can install
 and remove modules at will with the utilities: "insmod" and "rmmod".
 After reading the man-page for insmod, you will also know how easy
 it is to configure a module when you do "insmod" (hint: symbol=value).
 
+Installing modules in a non-standard location
+---------------------------------------------
+When the modules needs to be installed under another directory
+the INSTALL_MOD_PATH can be used to prefix "/lib/modules" as seen
+in the following example:
+
+make INSTALL_MOD_PATH=/frodo modules_install
+
+This will install the modules in the directory /frodo/lib/modules.
+/frodo can be a NFS mounted filesystem on another machine, allowing
+out-of-the-box support for installation on remote machines.
+
+
+Compiling modules outside the official kernel
+---------------------------------------------
+Often modules are developed outside the official kernel.
+To keep up with changes in the build system the most portable way
+to compile a module outside the kernel is to use the following command-line:
+
+make -C path/to/kernel/src SUBDIRS=$PWD modules
+
+This requires that a makefile exits made in accordance to
+Documentation/kbuild/makefiles.txt.
 
 Nifty features:
 ---------------

Makefile

@@ -299,12 +299,12 @@ export MODLIB
 #       normal descending-into-subdirs phase, since at that time
 #       we cannot yet know if we will need to relink vmlinux.
 #	So we descend into init/ inside the rule for vmlinux again.
-
-vmlinux-objs := $(HEAD) $(init-y) $(core-y) $(libs-y) $(drivers-y) $(net-y)
+head-y += $(HEAD)
+vmlinux-objs := $(head-y) $(init-y) $(core-y) $(libs-y) $(drivers-y) $(net-y)
 
 quiet_cmd_vmlinux__ = LD      $@
 define cmd_vmlinux__
-	$(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) $(HEAD) $(init-y) \
+	$(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) $(head-y) $(init-y) \
 	--start-group \
 	$(core-y) \
 	$(libs-y) \
@@ -444,6 +444,8 @@ targets += arch/$(ARCH)/vmlinux.lds.s
 	$(Q)$(MAKE) $(build)=$(@D) $@
 %.o: %.c scripts FORCE
 	$(Q)$(MAKE) $(build)=$(@D) $@
+%/:      scripts prepare FORCE
+	$(Q)$(MAKE) $(build)=$(@D)
 %.ko: scripts FORCE
 	$(Q)$(MAKE) $(build)=$(@D) $@
 %.lst: %.c scripts FORCE
@@ -705,14 +707,14 @@ MRPROPER_DIRS += \
 
 # clean - Delete all intermediate files
 #
-clean-dirs += $(ALL_SUBDIRS) Documentation/DocBook scripts
-
-$(addprefix _clean_,$(clean-dirs)):
+clean-dirs += $(addprefix, _clean_,$(ALL_SUBDIRS) Documentation/DocBook scripts)
+.PHONY: $(clean-dirs) clean archclean mrproper archmrproper distclean
+$(clean-dirs):
 	$(Q)$(MAKE) $(clean)=$(patsubst _clean_%,%,$@)
 
 quiet_cmd_rmclean = RM  $$(CLEAN_FILES)
 cmd_rmclean	  = rm -f $(CLEAN_FILES)
-clean: archclean $(addprefix _clean_,$(clean-dirs))
+clean: archclean $(clean-dirs)
 	$(call cmd,rmclean)
 	@find . $(RCS_FIND_IGNORE) \
 	 	\( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \

arch/alpha/Makefile

@@ -90,7 +90,7 @@ endif
 # BWX is most important, but we don't really want any emulation ever.
 CFLAGS += $(cflags-y) -Wa,-mev6
 
-HEAD := arch/alpha/kernel/head.o
+head-y := arch/alpha/kernel/head.o
 
 core-y			+= arch/alpha/kernel/ arch/alpha/mm/
 core-$(CONFIG_MATHEMU)  += arch/alpha/math-emu/
@@ -125,8 +125,6 @@ include/asm-$(ARCH)/asm_offsets.h: arch/$(ARCH)/kernel/asm-offsets.s
 archclean:
 	$(Q)$(MAKE) -f scripts/Makefile.clean obj=$(boot)
 
-archmrproper:
-
 CLEAN_FILES += include/asm-$(ARCH)/asm_offsets.h.tmp \
 	       include/asm-$(ARCH)/asm_offsets.h
 

arch/arm/Makefile

@@ -61,7 +61,7 @@ DATAADDR	:= .
 
 ifeq ($(CONFIG_CPU_26),y)
 PROCESSOR	:= armo
-HEAD		:= arch/arm/mach-arc/head.o arch/arm/kernel/init_task.o
+head-y		:= arch/arm/mach-arc/head.o arch/arm/kernel/init_task.o
 LDFLAGS_BLOB	+= --oformat elf26-littlearm
   ifeq ($(CONFIG_ROM_KERNEL),y)
     DATAADDR	 := 0x02080000
@@ -73,7 +73,7 @@ endif
 
 ifeq ($(CONFIG_CPU_32),y)
 PROCESSOR	:= armv
-HEAD		:= arch/arm/kernel/head.o arch/arm/kernel/init_task.o
+head-y		:= arch/arm/kernel/head.o arch/arm/kernel/init_task.o
 LDFLAGS_BLOB	+= --oformat elf32-littlearm
 textaddr-y	:= 0xC0008000
 endif
@@ -181,7 +181,6 @@ MRPROPER_FILES	+= \
 	include/asm-arm/mach-types.h
 
 # We use MRPROPER_FILES and CLEAN_FILES now
-archmrproper:
 archclean:
 	$(Q)$(MAKE) $(clean)=$(boot)
 

arch/i386/Makefile

@@ -3,8 +3,7 @@
 #
 # This file is included by the global makefile so that you can add your own
 # architecture-specific flags and dependencies. Remember to do have actions
-# for "archclean" and "archdep" for cleaning up and making dependencies for
-# this architecture
+# for "archclean" cleaning up for this architecture.
 #
 # This file is subject to the terms and conditions of the GNU General Public
 # License.  See the file "COPYING" in the main directory of this archive
@@ -76,7 +75,7 @@ mcore-$(CONFIG_X86_SUMMIT)  := mach-default
 # default subarch .h files
 mflags-y += -Iinclude/asm-i386/mach-default
 
-HEAD := arch/i386/kernel/head.o arch/i386/kernel/init_task.o
+head-y := arch/i386/kernel/head.o arch/i386/kernel/init_task.o
 
 libs-y 					+= arch/i386/lib/
 core-y					+= arch/i386/kernel/ \
@@ -92,8 +91,7 @@ AFLAGS += $(mflags-y)
 
 boot := arch/i386/boot
 
-.PHONY: zImage bzImage compressed zlilo bzlilo zdisk bzdisk install \
-		clean archclean archmrproper
+.PHONY: zImage bzImage compressed zlilo bzlilo zdisk bzdisk install
 
 all: bzImage
 

arch/ia64/Makefile

@@ -31,7 +31,7 @@ cflags-$(CONFIG_ITANIUM_BSTEP_SPECIFIC)	+= -mb-step
 cflags-$(CONFIG_IA64_SGI_SN)		+= -DBRINGUP
 
 CFLAGS += $(cflags-y)
-HEAD := arch/ia64/kernel/head.o arch/ia64/kernel/init_task.o
+head-y := arch/ia64/kernel/head.o arch/ia64/kernel/init_task.o
 
 libs-y				+= arch/ia64/lib/
 core-y				+= arch/ia64/kernel/ arch/ia64/mm/
@@ -51,14 +51,13 @@ drivers-$(CONFIG_IA64_SGI_SN)	+= arch/ia64/sn/fakeprom/
 makeboot =$(Q)$(MAKE) -f scripts/Makefile.build obj=arch/ia64/boot $(1)
 maketool =$(Q)$(MAKE) -f scripts/Makefile.build obj=arch/ia64/tools $(1)
 
-.PHONY: boot compressed archclean archmrproper include/asm-ia64/offsets.h
+.PHONY: boot compressed include/asm-ia64/offsets.h
 
 all compressed: vmlinux.gz
 
 vmlinux.gz: vmlinux
 	$(call makeboot,vmlinux.gz)
 
-archmrproper:
 archclean:
 	$(Q)$(MAKE) -f scripts/Makefile.clean obj=arch/ia64/boot
 

arch/m68k/Makefile

@@ -54,9 +54,9 @@ CFLAGS := $(subst -fomit-frame-pointer,,$(CFLAGS)) -g
 endif
 
 ifndef CONFIG_SUN3
-HEAD := arch/m68k/kernel/head.o
+head-y := arch/m68k/kernel/head.o
 else
-HEAD := arch/m68k/kernel/sun3-head.o
+head-y := arch/m68k/kernel/sun3-head.o
 endif 
 
 core-y				+= arch/m68k/kernel/	arch/m68k/mm/
@@ -113,5 +113,3 @@ endif
 archclean:
 	rm -f vmlinux.gz vmlinux.bz2
 	rm -f arch/m68k/kernel/m68k_defs.h arch/m68k/kernel/m68k_defs.d
-
-archmrproper:

arch/m68knommu/Makefile

@@ -84,7 +84,7 @@ CFLAGS += -DUTS_SYSNAME=\"uClinux\"
 
 LDFLAGS_BLOB	:= --format binary --oformat elf32-m68k
 
-HEAD := arch/m68knommu/platform/$(platform-y)/$(board-y)/crt0_$(model-y).o
+head-y := arch/m68knommu/platform/$(platform-y)/$(board-y)/crt0_$(model-y).o
 
 CLEAN_FILES := include/asm-$(ARCH)/asm-offsets.h.tmp \
 	       include/asm-$(ARCH)/asm-offsets.h \
@@ -98,8 +98,6 @@ libs-y	+= arch/m68knommu/lib/
 
 prepare: include/asm-$(ARCH)/asm-offsets.h
 
-archmrproper:
-
 archclean:
 	$(call descend arch/$(ARCH)/boot, subdirclean)
 

arch/mips/Makefile

@@ -256,7 +256,7 @@ endif
 
 AFLAGS_vmlinux.lds.o := -DLOADADDR=$(LOADADDR)
 
-HEAD := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
+head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
 
 SUBDIRS := arch/mips/tools
 

arch/mips64/Makefile

@@ -128,7 +128,7 @@ endif
 
 LDFLAGS_vmlinux += -Ttext $(LOADADDR)
 
-HEAD := arch/mips64/kernel/head.o arch/mips64/kernel/init_task.o
+head-y := arch/mips64/kernel/head.o arch/mips64/kernel/init_task.o
 
 SUBDIRS		:= arch/mips64/tools $(SUBDIRS)
 core-y		+= arch/mips64/kernel/ arch/mips64/mm/

arch/parisc/Makefile

@@ -56,7 +56,6 @@ head-y			:= arch/parisc/kernel/head.o
 head-$(CONFIG_PARISC64)	:= arch/parisc/kernel/head64.o
 
 CFLAGS	+= $(cflags-y)
-HEAD	:= $(head-y)
 
 core-y	+= $(addprefix arch/parisc/, kernel/pdc_cons.o kernel/process.o   \
 		mm/ kernel/ hpux/ math-emu/ kernel/init_task.o )
@@ -96,9 +95,6 @@ include/asm-parisc/offsets.h: arch/parisc/kernel/asm-offsets.s
 	@$(generate-asm-offsets.h) < $< > $@.tmp
 	@$(update-if-changed)
 
-archclean:
-archmrproper:
-
 CLEAN_FILES	+= palo.conf lifimage include/asm-parisc/offsets.h \
 		include/asm-parisc/offsets.h.tmp
 

arch/ppc/Makefile

@@ -36,15 +36,12 @@ ifdef CONFIG_MORE_COMPILE_OPTIONS
   CFLAGS += $(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g')
 endif
 
-head-y				:= head.o
-head-$(CONFIG_8xx)		:= head_8xx.o
-head-$(CONFIG_4xx)		:= head_4xx.o
-head-$(CONFIG_440)		:= head_44x.o
+head-y				:= arch/ppc/kernel/head.o
+head-$(CONFIG_8xx)		:= arch/ppc/kernel/head_8xx.o
+head-$(CONFIG_4xx)		:= arch/ppc/kernel/head_4xx.o
+head-$(CONFIG_440)		:= arch/ppc/kernel/head_44x.o
 
-HEAD := arch/ppc/kernel/$(head-y)
-ifdef CONFIG_6xx
-  HEAD += arch/ppc/kernel/idle_6xx.o
-endif
+head-$(CONFIG_6xx)		+= arch/ppc/kernel/idle_6xx.o
 
 core-y				+= arch/ppc/kernel/ arch/ppc/platforms/ \
 				   arch/ppc/mm/ arch/ppc/lib/ arch/ppc/syslib/
@@ -59,7 +56,7 @@ drivers-$(CONFIG_OCP)		+= arch/ppc/ocp/
 
 BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd pImage vmlinux.sm
 
-.PHONY: $(BOOT_TARGETS) clean archclean archmrproper
+.PHONY: $(BOOT_TARGETS)
 
 all: zImage
 
@@ -78,8 +75,6 @@ $(BOOT_TARGETS): vmlinux
 archclean:
 	$(Q)$(MAKE) $(clean)=arch/ppc/boot
 
-archmrproper:
-
 prepare: include/asm-$(ARCH)/offsets.h checkbin
 
 arch/$(ARCH)/kernel/asm-offsets.s: include/asm include/linux/version.h \

arch/ppc64/Makefile

@@ -22,7 +22,7 @@ CFLAGS		+= -msoft-float -pipe \
 		-Wno-uninitialized -mminimal-toc -mtraceback=full \
 		-finline-limit-2000 -mcpu=power4
 
-HEAD := arch/ppc64/kernel/head.o
+head-y := arch/ppc64/kernel/head.o
 
 libs-y				+= arch/ppc64/lib/
 core-y				+= arch/ppc64/kernel/

arch/s390/Makefile

@@ -20,7 +20,7 @@ LDFLAGS_BLOB	:= --format binary --oformat elf32-s390
 
 CFLAGS += -pipe -fno-strength-reduce
 
-HEAD := arch/$(ARCH)/kernel/head.o arch/$(ARCH)/kernel/init_task.o
+head-y := arch/$(ARCH)/kernel/head.o arch/$(ARCH)/kernel/init_task.o
 
 core-y		+= arch/$(ARCH)/mm/ arch/$(ARCH)/kernel/
 libs-y		+= arch/$(ARCH)/lib/
@@ -38,7 +38,6 @@ listing image: vmlinux
 install: vmlinux
 	$(call makeboot, $@)
 
-archmrproper:
 archclean:
 	$(Q)$(MAKE) -f scripts/Makefile.clean obj=arch/$(ARCH)/boot
 

arch/s390x/Makefile

@@ -21,7 +21,7 @@ LDFLAGS_BLOB	:= --format binary --oformat elf64-s390
 
 CFLAGS += -pipe -fno-strength-reduce
 
-HEAD := arch/$(ARCH)/kernel/head.o arch/$(ARCH)/kernel/init_task.o
+head-y := arch/$(ARCH)/kernel/head.o arch/$(ARCH)/kernel/init_task.o
 
 core-y		+= arch/$(ARCH)/mm/ arch/$(ARCH)/kernel/
 libs-y		+= arch/$(ARCH)/lib/
@@ -38,7 +38,6 @@ listing image: vmlinux
 install: vmlinux
 	$(call makeboot, $@)
 
-archmrproper:
 archclean:
 	$(Q)$(MAKE) -f scripts/Makefile.clean obj=arch/$(ARCH)/boot
 

arch/sh/Makefile

@@ -53,7 +53,7 @@ endif
 #
 CFLAGS		+= -pipe
 
-HEAD := arch/sh/kernel/head.o arch/sh/kernel/init_task.o
+head-y := arch/sh/kernel/head.o arch/sh/kernel/init_task.o
 
 LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
 
@@ -81,5 +81,3 @@ archclean:
 	$(MAKE) -C arch/$(ARCH)/stboards clean
 #	$(MAKE) -C arch/$(ARCH)/tools clean
 
-archmrproper:
-

arch/sparc/Makefile

@@ -37,7 +37,8 @@ endif
 #  Actual linking is done with "make image".
 LDFLAGS_vmlinux = -r
 
-HEAD := arch/sparc/kernel/head.o arch/sparc/kernel/init_task.o
+head-y := arch/sparc/kernel/head.o arch/sparc/kernel/init_task.o
+HEAD := $(head-y)
 
 core-y += arch/sparc/kernel/ arch/sparc/mm/ arch/sparc/math-emu/
 libs-y += arch/sparc/prom/ arch/sparc/lib/
@@ -61,8 +62,6 @@ image tftpboot.img: vmlinux
 archclean:
 	$(Q)$(MAKE) -f scripts/Makefile.clean obj=arch/$(ARCH)/boot
 
-archmrproper:
-
 prepare: include/asm-$(ARCH)/asm_offsets.h
 
 arch/$(ARCH)/kernel/asm-offsets.s: include/asm include/linux/version.h \

arch/sparc64/Makefile

@@ -61,7 +61,7 @@ ifeq ($(CONFIG_MCOUNT),y)
   CFLAGS := $(CFLAGS) -pg
 endif
 
-HEAD := arch/sparc64/kernel/head.o arch/sparc64/kernel/init_task.o
+head-y := arch/sparc64/kernel/head.o arch/sparc64/kernel/init_task.o
 
 core-y				+= arch/sparc64/kernel/ arch/sparc64/mm/
 core-$(CONFIG_SOLARIS_EMUL)	+= arch/sparc64/solaris/
@@ -74,10 +74,6 @@ drivers-$(CONFIG_OPROFILE)	+= arch/sparc64/oprofile/
 tftpboot.img vmlinux.aout:
 	$(Q)$(MAKE) $(build)=arch/sparc64/boot arch/sparc64/boot/$@
 
-archclean:
-
-archmrproper:
-
 define archhelp
   echo  '* vmlinux       - Standard sparc64 kernel'
   echo  '  vmlinux.aout  - a.out kernel for sparc64'

arch/v850/Makefile

@@ -31,7 +31,7 @@ LDFLAGS_BLOB := -b binary --oformat elf32-little
 OBJCOPY_FLAGS_BLOB := -I binary -O elf32-little -B v850e
 
 
-HEAD := $(arch_dir)/kernel/head.o $(arch_dir)/kernel/init_task.o
+head-y := $(arch_dir)/kernel/head.o $(arch_dir)/kernel/init_task.o
 core-y += $(arch_dir)/kernel/
 libs-y += $(arch_dir)/lib/
 

arch/x86_64/Makefile

@@ -48,7 +48,7 @@ CFLAGS += -fno-reorder-blocks
 CFLAGS += -finline-limit=2000
 #CFLAGS += -g
 
-HEAD := arch/x86_64/kernel/head.o arch/x86_64/kernel/head64.o arch/x86_64/kernel/init_task.o
+head-y := arch/x86_64/kernel/head.o arch/x86_64/kernel/head64.o arch/x86_64/kernel/init_task.o
 
 libs-y 					+= arch/x86_64/lib/
 core-y					+= arch/x86_64/kernel/ arch/x86_64/mm/

scripts/Makefile.build

@@ -211,7 +211,7 @@ ifdef O_TARGET
 quiet_cmd_link_o_target = LD      $@
 # If the list of objects to link is empty, just create an empty O_TARGET
 cmd_link_o_target = $(if $(strip $(obj-y)),\
-		      $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -r -o $@ $(filter $(obj-y), $^),\
+		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
 		      rm -f $@; $(AR) rcs $@)
 
 $(O_TARGET): $(obj-y) FORCE
@@ -236,11 +236,20 @@ endif
 #
 # Rule to link composite objects
 #
+#  Composite objects are specified in kbuild makefile as follows:
+#    <composite-object>-objs := <list of .o files>
+#  or
+#    <composite-object>-y    := <list of .o files>
+link_multi_deps =                     \
+$(filter $(addprefix $(obj)/,         \
+$($(subst $(obj)/,,$(@:.o=-objs)))    \
+$($(subst $(obj)/,,$(@:.o=-y)))), $^)
+ 
 quiet_cmd_link_multi-y = LD      $@
-cmd_link_multi-y = $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -r -o $@ $(filter $(addprefix $(obj)/,$($(subst $(obj)/,,$(@:.o=-objs))) $($(subst $(obj)/,,$(@:.o=-y)))),$^)
+cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
 
 quiet_cmd_link_multi-m = LD [M]  $@
-cmd_link_multi-m = $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) $(LDFLAGS_MODULE) -o $@ $(filter $(addprefix $(obj)/,$($(subst $(obj)/,,$(@:.o=-objs))) $($(subst $(obj)/,,$(@:.o=-y)))),$^)
+cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
 
 # We would rather have a list of rules like
 # 	foo.o: $(foo-objs)
@@ -264,7 +273,7 @@ targets += $(multi-used-y) $(multi-used-m)
 ifndef CONFIG_MODVERSIONS
 
 quiet_cmd_link_module = LD [M]  $@
-cmd_link_module = $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) $(LDFLAGS_MODULE) -o $@ $< init/vermagic.o
+cmd_link_module = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $< init/vermagic.o
 
 # Don't rebuilt vermagic.o unless we actually are in the init/ dir
 ifneq ($(obj),init)

scripts/Makefile.lib

@@ -128,6 +128,7 @@ hostc_flags    = -Wp,-MD,$(depfile) $(HOSTCFLAGS) $(HOST_EXTRACFLAGS)\
 		 $(HOSTCFLAGS_$(*F).o)
 hostcxx_flags  = -Wp,-MD,$(depfile) $(HOSTCXXFLAGS) $(HOST_EXTRACXXFLAGS)\
 		 $(HOSTCXXFLAGS_$(*F).o)
+ld_flags       = $(LDFLAGS) $(EXTRA_LDFLAGS)
 
 # Finds the multi-part object the current object will be linked into
 modname-multi = $(sort $(foreach m,$(multi-used),\