Commit 44e645fa authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo

ARM: dts: imx7s-warp: Add Wifi support

Warp7 has a BCM43430 Wifi chip connected to the USDHC1 port.

Add support for it.
Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 9a3bb943
...@@ -54,6 +54,18 @@ memory { ...@@ -54,6 +54,18 @@ memory {
reg = <0x80000000 0x20000000>; reg = <0x80000000 0x20000000>;
}; };
reg_brcm: regulator-brcm {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_brcm_reg>;
regulator-name = "brcm_reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <200000>;
};
sound { sound {
compatible = "simple-audio-card"; compatible = "simple-audio-card";
simple-audio-card,name = "imx7-sgtl5000"; simple-audio-card,name = "imx7-sgtl5000";
...@@ -221,6 +233,17 @@ &usbotg1 { ...@@ -221,6 +233,17 @@ &usbotg1 {
status = "okay"; status = "okay";
}; };
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
bus-width = <4>;
keep-power-in-suspend;
no-1-8-v;
non-removable;
vmmc-supply = <&reg_brcm>;
status = "okay";
};
&usdhc3 { &usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-0 = <&pinctrl_usdhc3>;
...@@ -235,6 +258,12 @@ &usdhc3 { ...@@ -235,6 +258,12 @@ &usdhc3 {
}; };
&iomuxc { &iomuxc {
pinctrl_brcm_reg: brcmreggrp {
fsl,pins = <
MX7D_PAD_SD2_WP__GPIO5_IO10 0x14 /* WL_REG_ON */
>;
};
pinctrl_i2c1: i2c1grp { pinctrl_i2c1: i2c1grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
...@@ -266,6 +295,18 @@ MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79 ...@@ -266,6 +295,18 @@ MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
>; >;
}; };
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX7D_PAD_SD1_CMD__SD1_CMD 0x59
MX7D_PAD_SD1_CLK__SD1_CLK 0x19
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* WL_HOST_WAKE */
>;
};
pinctrl_usdhc3: usdhc3grp { pinctrl_usdhc3: usdhc3grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
......
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