Commit 4641c771 authored by Axel Lin's avatar Axel Lin Committed by Mark Brown

ASoC: cs42l56: Fix new value argument in snd_soc_update_bits calls

The new value argument needs proper shift to match the mask bit fields.
Signed-off-by: default avatarAxel Lin <axel.lin@ingics.com>
Tested-by: default avatarBrian Austin <brian.austin@cirrus.com>
Acked-by: default avatarBrian Austin <brian.austin@cirrus.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 3bb40619
...@@ -763,14 +763,14 @@ static int cs42l56_set_sysclk(struct snd_soc_dai *codec_dai, ...@@ -763,14 +763,14 @@ static int cs42l56_set_sysclk(struct snd_soc_dai *codec_dai,
case CS42L56_MCLK_11P2896MHZ: case CS42L56_MCLK_11P2896MHZ:
case CS42L56_MCLK_12MHZ: case CS42L56_MCLK_12MHZ:
case CS42L56_MCLK_12P288MHZ: case CS42L56_MCLK_12P288MHZ:
cs42l56->mclk_div2 = 1; cs42l56->mclk_div2 = CS42L56_MCLK_DIV2;
cs42l56->mclk_prediv = 0; cs42l56->mclk_prediv = 0;
break; break;
case CS42L56_MCLK_22P5792MHZ: case CS42L56_MCLK_22P5792MHZ:
case CS42L56_MCLK_24MHZ: case CS42L56_MCLK_24MHZ:
case CS42L56_MCLK_24P576MHZ: case CS42L56_MCLK_24P576MHZ:
cs42l56->mclk_div2 = 1; cs42l56->mclk_div2 = CS42L56_MCLK_DIV2;
cs42l56->mclk_prediv = 1; cs42l56->mclk_prediv = CS42L56_MCLK_PREDIV;
break; break;
default: default:
return -EINVAL; return -EINVAL;
...@@ -844,57 +844,49 @@ static int cs42l56_digital_mute(struct snd_soc_dai *dai, int mute) ...@@ -844,57 +844,49 @@ static int cs42l56_digital_mute(struct snd_soc_dai *dai, int mute)
/* Hit the DSP Mixer first */ /* Hit the DSP Mixer first */
snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL, snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL,
CS42L56_ADCAMIX_MUTE_MASK | CS42L56_ADCAMIX_MUTE_MASK |
CS42L56_ADCBMIX_MUTE_MASK | CS42L56_ADCBMIX_MUTE_MASK |
CS42L56_PCMAMIX_MUTE_MASK | CS42L56_PCMAMIX_MUTE_MASK |
CS42L56_PCMBMIX_MUTE_MASK | CS42L56_PCMBMIX_MUTE_MASK |
CS42L56_MSTB_MUTE_MASK | CS42L56_MSTB_MUTE_MASK |
CS42L56_MSTA_MUTE_MASK, CS42L56_MSTA_MUTE_MASK,
CS42L56_MUTE); CS42L56_MUTE_ALL);
/* Mute ADC's */ /* Mute ADC's */
snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL, snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL,
CS42L56_ADCA_MUTE_MASK | CS42L56_ADCA_MUTE_MASK |
CS42L56_ADCB_MUTE_MASK, CS42L56_ADCB_MUTE_MASK,
CS42L56_MUTE); CS42L56_MUTE_ALL);
/* HP And LO */ /* HP And LO */
snd_soc_update_bits(codec, CS42L56_HPA_VOLUME, snd_soc_update_bits(codec, CS42L56_HPA_VOLUME,
CS42L56_HP_MUTE_MASK, CS42L56_HP_MUTE_MASK, CS42L56_MUTE_ALL);
CS42L56_MUTE);
snd_soc_update_bits(codec, CS42L56_HPB_VOLUME, snd_soc_update_bits(codec, CS42L56_HPB_VOLUME,
CS42L56_HP_MUTE_MASK, CS42L56_HP_MUTE_MASK, CS42L56_MUTE_ALL);
CS42L56_MUTE);
snd_soc_update_bits(codec, CS42L56_LOA_VOLUME, snd_soc_update_bits(codec, CS42L56_LOA_VOLUME,
CS42L56_LO_MUTE_MASK, CS42L56_LO_MUTE_MASK, CS42L56_MUTE_ALL);
CS42L56_MUTE);
snd_soc_update_bits(codec, CS42L56_LOB_VOLUME, snd_soc_update_bits(codec, CS42L56_LOB_VOLUME,
CS42L56_LO_MUTE_MASK, CS42L56_LO_MUTE_MASK, CS42L56_MUTE_ALL);
CS42L56_MUTE);
} else { } else {
snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL, snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL,
CS42L56_ADCAMIX_MUTE_MASK | CS42L56_ADCAMIX_MUTE_MASK |
CS42L56_ADCBMIX_MUTE_MASK | CS42L56_ADCBMIX_MUTE_MASK |
CS42L56_PCMAMIX_MUTE_MASK | CS42L56_PCMAMIX_MUTE_MASK |
CS42L56_PCMBMIX_MUTE_MASK | CS42L56_PCMBMIX_MUTE_MASK |
CS42L56_MSTB_MUTE_MASK | CS42L56_MSTB_MUTE_MASK |
CS42L56_MSTA_MUTE_MASK, CS42L56_MSTA_MUTE_MASK,
CS42L56_UNMUTE); CS42L56_UNMUTE);
snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL, snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL,
CS42L56_ADCA_MUTE_MASK | CS42L56_ADCA_MUTE_MASK |
CS42L56_ADCB_MUTE_MASK, CS42L56_ADCB_MUTE_MASK,
CS42L56_UNMUTE); CS42L56_UNMUTE);
snd_soc_update_bits(codec, CS42L56_HPA_VOLUME, snd_soc_update_bits(codec, CS42L56_HPA_VOLUME,
CS42L56_HP_MUTE_MASK, CS42L56_HP_MUTE_MASK, CS42L56_UNMUTE);
CS42L56_UNMUTE);
snd_soc_update_bits(codec, CS42L56_HPB_VOLUME, snd_soc_update_bits(codec, CS42L56_HPB_VOLUME,
CS42L56_HP_MUTE_MASK, CS42L56_HP_MUTE_MASK, CS42L56_UNMUTE);
CS42L56_UNMUTE);
snd_soc_update_bits(codec, CS42L56_LOA_VOLUME, snd_soc_update_bits(codec, CS42L56_LOA_VOLUME,
CS42L56_LO_MUTE_MASK, CS42L56_LO_MUTE_MASK, CS42L56_UNMUTE);
CS42L56_UNMUTE);
snd_soc_update_bits(codec, CS42L56_LOB_VOLUME, snd_soc_update_bits(codec, CS42L56_LOB_VOLUME,
CS42L56_LO_MUTE_MASK, CS42L56_LO_MUTE_MASK, CS42L56_UNMUTE);
CS42L56_UNMUTE);
} }
return 0; return 0;
} }
......
...@@ -80,19 +80,21 @@ ...@@ -80,19 +80,21 @@
#define CS42L56_PDN_HPB_MASK 0xc0 #define CS42L56_PDN_HPB_MASK 0xc0
/* serial port and clk masks */ /* serial port and clk masks */
#define CS42L56_MASTER_MODE 1 #define CS42L56_MASTER_MODE 0x40
#define CS42L56_SLAVE_MODE 0 #define CS42L56_SLAVE_MODE 0
#define CS42L56_MS_MODE_MASK 0x40 #define CS42L56_MS_MODE_MASK 0x40
#define CS42L56_SCLK_INV 1 #define CS42L56_SCLK_INV 0x20
#define CS42L56_SCLK_INV_MASK 0x20 #define CS42L56_SCLK_INV_MASK 0x20
#define CS42L56_SCLK_MCLK_MASK 0x18 #define CS42L56_SCLK_MCLK_MASK 0x18
#define CS42L56_MCLK_PREDIV 0x04
#define CS42L56_MCLK_PREDIV_MASK 0x04 #define CS42L56_MCLK_PREDIV_MASK 0x04
#define CS42L56_MCLK_DIV2 0x02
#define CS42L56_MCLK_DIV2_MASK 0x02 #define CS42L56_MCLK_DIV2_MASK 0x02
#define CS42L56_MCLK_DIS_MASK 0x01 #define CS42L56_MCLK_DIS_MASK 0x01
#define CS42L56_CLK_AUTO_MASK 0x20 #define CS42L56_CLK_AUTO_MASK 0x20
#define CS42L56_CLK_RATIO_MASK 0x1f #define CS42L56_CLK_RATIO_MASK 0x1f
#define CS42L56_DIG_FMT_I2S 0 #define CS42L56_DIG_FMT_I2S 0
#define CS42L56_DIG_FMT_LEFT_J 1 #define CS42L56_DIG_FMT_LEFT_J 0x08
#define CS42L56_DIG_FMT_MASK 0x08 #define CS42L56_DIG_FMT_MASK 0x08
/* Class H and misc ctl masks */ /* Class H and misc ctl masks */
...@@ -116,7 +118,7 @@ ...@@ -116,7 +118,7 @@
#define CS42L56_DEEMPH_MASK 0x40 #define CS42L56_DEEMPH_MASK 0x40
#define CS42L56_PLYBCK_GANG_MASK 0x10 #define CS42L56_PLYBCK_GANG_MASK 0x10
#define CS42L56_PCM_INV_MASK 0x0c #define CS42L56_PCM_INV_MASK 0x0c
#define CS42L56_MUTE 1 #define CS42L56_MUTE_ALL 0xff
#define CS42L56_UNMUTE 0 #define CS42L56_UNMUTE 0
#define CS42L56_ADCAMIX_MUTE_MASK 0x40 #define CS42L56_ADCAMIX_MUTE_MASK 0x40
#define CS42L56_ADCBMIX_MUTE_MASK 0x80 #define CS42L56_ADCBMIX_MUTE_MASK 0x80
......
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