Commit 467f54b2 authored by Gregory CLEMENT's avatar Gregory CLEMENT Committed by Jason Cooper

ARM: dts: mvebu: introduce internal-regs node

Introduce a 'internal-regs' subnode, under which all devices are
moved. This is not really needed for now, but will be for the
mvebu-mbus driver. This generates a lot of code movement since it's
indenting by one more tab all the devices.  So it was a good
opportunity to fix all the bad indentation.
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 82a68267
......@@ -30,6 +30,7 @@ memory {
};
soc {
internal-regs {
serial@12000 {
clock-frequency = <200000000>;
status = "okay";
......@@ -112,4 +113,5 @@ pcie@2,0 {
};
};
};
};
};
......@@ -25,6 +25,7 @@ memory {
};
soc {
internal-regs {
serial@12000 {
clock-frequency = <200000000>;
status = "okay";
......@@ -135,4 +136,5 @@ pcie@2,0 {
};
};
};
};
};
......@@ -28,6 +28,7 @@ memory {
};
soc {
internal-regs {
serial@12000 {
clock-frequency = <200000000>;
status = "okay";
......@@ -72,7 +73,6 @@ usb@50000 {
usb@51000 {
status = "okay";
};
};
gpio-keys {
compatible = "gpio-keys";
......@@ -84,4 +84,6 @@ button@1 {
gpios = <&gpio0 6 1>;
};
};
};
};
};
};
......@@ -28,7 +28,6 @@ cpu@0 {
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -36,6 +35,12 @@ soc {
interrupt-parent = <&mpic>;
ranges = <0 0xd0000000 0x100000>;
internal-regs {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
mpic: interrupt-controller@20000 {
compatible = "marvell,mpic";
#interrupt-cells = <1>;
......@@ -45,8 +50,7 @@ mpic: interrupt-controller@20000 {
coherency-fabric@20200 {
compatible = "marvell,coherency-fabric";
reg = <0x20200 0xb0>,
<0x21810 0x1c>;
reg = <0x20200 0xb0>, <0x21810 0x1c>;
};
serial@12000 {
......@@ -68,8 +72,7 @@ serial@12100 {
timer@20300 {
compatible = "marvell,armada-370-xp-timer";
reg = <0x20300 0x30>,
<0x21040 0x30>;
reg = <0x20300 0x30>, <0x21040 0x30>;
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
clocks = <&coreclk 2>;
};
......@@ -223,5 +226,5 @@ devbus-cs3@10420 {
status = "disabled";
};
};
};
};
};
......@@ -28,12 +28,7 @@ aliases {
};
soc {
mpic: interrupt-controller@20000 {
reg = <0x20a00 0x1d0>,
<0x21870 0x58>;
};
internal-regs {
system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x100>;
......@@ -46,6 +41,10 @@ L2: l2-cache {
wt-override;
};
mpic: interrupt-controller@20000 {
reg = <0x20a00 0x1d0>, <0x21870 0x58>;
};
pinctrl {
compatible = "marvell,mv88f6710-pinctrl";
reg = <0x18000 0x38>;
......@@ -220,4 +219,5 @@ pcie@2,0 {
};
};
};
};
};
......@@ -30,6 +30,7 @@ memory {
};
soc {
internal-regs {
serial@12000 {
clock-frequency = <250000000>;
status = "okay";
......@@ -155,4 +156,5 @@ pcie@10,0 {
};
};
};
};
};
......@@ -37,6 +37,7 @@ memory {
};
soc {
internal-regs {
serial@12000 {
clock-frequency = <250000000>;
status = "okay";
......@@ -160,4 +161,5 @@ pcie@10,0 {
};
};
};
};
};
......@@ -44,6 +44,7 @@ cpu@1 {
};
soc {
internal-regs {
pinctrl {
compatible = "marvell,mv78230-pinctrl";
reg = <0x18000 0x38>;
......@@ -87,8 +88,8 @@ pcie-controller {
status = "disabled";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x00 0xff>;
......@@ -181,4 +182,5 @@ pcie@9,0 {
};
};
};
};
};
......@@ -45,6 +45,7 @@ cpu@1 {
};
soc {
internal-regs {
pinctrl {
compatible = "marvell,mv78260-pinctrl";
reg = <0x18000 0x38>;
......@@ -219,4 +220,5 @@ pcie@10,0 {
};
};
};
};
};
......@@ -60,6 +60,7 @@ cpu@3 {
};
soc {
internal-regs {
pinctrl {
compatible = "marvell,mv78460-pinctrl";
reg = <0x18000 0x38>;
......@@ -300,4 +301,5 @@ pcie@10,0 {
};
};
};
};
};
......@@ -27,6 +27,7 @@ memory {
};
soc {
internal-regs {
serial@12000 {
clock-frequency = <250000000>;
status = "okay";
......@@ -178,4 +179,5 @@ pcie@1,0 {
};
};
};
};
};
......@@ -22,8 +22,8 @@ / {
model = "Marvell Armada XP family SoC";
compatible = "marvell,armadaxp", "marvell,armada-370-xp";
soc {
internal-regs {
L2: l2-cache {
compatible = "marvell,aurora-system-cache";
reg = <0x08000 0x1000>;
......@@ -32,14 +32,12 @@ L2: l2-cache {
};
mpic: interrupt-controller@20000 {
reg = <0x20a00 0x2d0>,
<0x21070 0x58>;
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
};
armada-370-xp-pmsu@22000 {
compatible = "marvell,armada-370-xp-pmsu";
reg = <0x22100 0x430>,
<0x20800 0x20>;
reg = <0x22100 0x430>, <0x20800 0x20>;
};
serial@12200 {
......@@ -159,4 +157,5 @@ thermal@182b0 {
status = "okay";
};
};
};
};
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