Commit 4755bfbd authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher

drm/amdgpu: Change golden settings for GFX v9.4.3

Change the settings applicable for A0. GRBM_MCM_ADDR setting will be
applied by firmware.
Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarAsad Kamal <asad.kamal@amd.com>
Acked-by: default avatarMangesh Gadre <Mangesh.Gadre@amd.com>
Tested-by: default avatarMangesh Gadre <Mangesh.Gadre@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8c45b319
...@@ -195,14 +195,11 @@ static void gfx_v9_4_3_init_golden_registers(struct amdgpu_device *adev) ...@@ -195,14 +195,11 @@ static void gfx_v9_4_3_init_golden_registers(struct amdgpu_device *adev)
num_xcc = NUM_XCC(adev->gfx.xcc_mask); num_xcc = NUM_XCC(adev->gfx.xcc_mask);
for (i = 0; i < num_xcc; i++) { for (i = 0; i < num_xcc; i++) {
dev_inst = GET_INST(GC, i); dev_inst = GET_INST(GC, i);
if (dev_inst >= 2)
WREG32_SOC15(GC, dev_inst, regGRBM_MCM_ADDR, 0x4);
WREG32_SOC15(GC, dev_inst, regGB_ADDR_CONFIG,
GOLDEN_GB_ADDR_CONFIG);
/* Golden settings applied by driver for ASIC with rev_id 0 */ /* Golden settings applied by driver for ASIC with rev_id 0 */
if (adev->rev_id == 0) { if (adev->rev_id == 0) {
WREG32_SOC15(GC, dev_inst, regGB_ADDR_CONFIG,
GOLDEN_GB_ADDR_CONFIG);
WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1, WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1,
REDUCE_FIFO_DEPTH_BY_2, 2); REDUCE_FIFO_DEPTH_BY_2, 2);
} }
......
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