Commit 47e89798 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc/pseries: Fix build without CONFIG_HOTPLUG_CPU
  powerpc: Set nr_cpu_ids early and use it to free PACAs
  powerpc/pseries: Don't register global initcall
  powerpc/kexec: Fix mismatched ifdefs for PPC64/SMP.
  edac/mpc85xx: Limit setting/clearing of HID1[RFXE] to e500v1/v2 cores
  powerpc/85xx: Update dts for PCIe memory maps to match u-boot of Px020RDB
parents 884b8267 c60e65d7
/* /*
* P1020 RDB Device Tree Source * P1020 RDB Device Tree Source
* *
* Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the
...@@ -553,7 +553,7 @@ pci0: pcie@ffe09000 { ...@@ -553,7 +553,7 @@ pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>; reg = <0 0xffe09000 0 0x1000>;
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <16 2>; interrupts = <16 2>;
...@@ -580,8 +580,8 @@ pci1: pcie@ffe0a000 { ...@@ -580,8 +580,8 @@ pci1: pcie@ffe0a000 {
#address-cells = <3>; #address-cells = <3>;
reg = <0 0xffe0a000 0 0x1000>; reg = <0 0xffe0a000 0 0x1000>;
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <16 2>; interrupts = <16 2>;
...@@ -590,8 +590,8 @@ pcie@0 { ...@@ -590,8 +590,8 @@ pcie@0 {
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
device_type = "pci"; device_type = "pci";
ranges = <0x2000000 0x0 0xc0000000 ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0xc0000000 0x2000000 0x0 0x80000000
0x0 0x20000000 0x0 0x20000000
0x1000000 0x0 0x0 0x1000000 0x0 0x0
......
/* /*
* P2020 RDB Device Tree Source * P2020 RDB Device Tree Source
* *
* Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the
...@@ -537,7 +537,7 @@ pci0: pcie@ffe09000 { ...@@ -537,7 +537,7 @@ pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>; reg = <0 0xffe09000 0 0x1000>;
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <25 2>; interrupts = <25 2>;
...@@ -564,8 +564,8 @@ pci1: pcie@ffe0a000 { ...@@ -564,8 +564,8 @@ pci1: pcie@ffe0a000 {
#address-cells = <3>; #address-cells = <3>;
reg = <0 0xffe0a000 0 0x1000>; reg = <0 0xffe0a000 0 0x1000>;
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <26 2>; interrupts = <26 2>;
...@@ -574,8 +574,8 @@ pcie@0 { ...@@ -574,8 +574,8 @@ pcie@0 {
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
device_type = "pci"; device_type = "pci";
ranges = <0x2000000 0x0 0xc0000000 ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0xc0000000 0x2000000 0x0 0x80000000
0x0 0x20000000 0x0 0x20000000
0x1000000 0x0 0x0 0x1000000 0x0 0x0
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb, * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
* eth1, eth2, sdhc, crypto, global-util, pci0. * eth1, eth2, sdhc, crypto, global-util, pci0.
* *
* Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the
...@@ -342,7 +342,7 @@ pci0: pcie@ffe09000 { ...@@ -342,7 +342,7 @@ pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>; reg = <0 0xffe09000 0 0x1000>;
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <25 2>; interrupts = <25 2>;
......
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
* *
* Please note to add "-b 1" for core1's dts compiling. * Please note to add "-b 1" for core1's dts compiling.
* *
* Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the
...@@ -162,8 +162,8 @@ pci1: pcie@ffe0a000 { ...@@ -162,8 +162,8 @@ pci1: pcie@ffe0a000 {
#address-cells = <3>; #address-cells = <3>;
reg = <0 0xffe0a000 0 0x1000>; reg = <0 0xffe0a000 0 0x1000>;
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <26 2>; interrupts = <26 2>;
...@@ -172,8 +172,8 @@ pcie@0 { ...@@ -172,8 +172,8 @@ pcie@0 {
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
device_type = "pci"; device_type = "pci";
ranges = <0x2000000 0x0 0xc0000000 ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0xc0000000 0x2000000 0x0 0x80000000
0x0 0x20000000 0x0 0x20000000
0x1000000 0x0 0x0 0x1000000 0x0 0x0
......
...@@ -163,7 +163,7 @@ static void crash_kexec_prepare_cpus(int cpu) ...@@ -163,7 +163,7 @@ static void crash_kexec_prepare_cpus(int cpu)
} }
/* wait for all the CPUs to hit real mode but timeout if they don't come in */ /* wait for all the CPUs to hit real mode but timeout if they don't come in */
#ifdef CONFIG_PPC_STD_MMU_64 #if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP)
static void crash_kexec_wait_realmode(int cpu) static void crash_kexec_wait_realmode(int cpu)
{ {
unsigned int msecs; unsigned int msecs;
...@@ -188,6 +188,8 @@ static void crash_kexec_wait_realmode(int cpu) ...@@ -188,6 +188,8 @@ static void crash_kexec_wait_realmode(int cpu)
} }
mb(); mb();
} }
#else
static inline void crash_kexec_wait_realmode(int cpu) {}
#endif #endif
/* /*
...@@ -344,9 +346,7 @@ void default_machine_crash_shutdown(struct pt_regs *regs) ...@@ -344,9 +346,7 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
crash_save_cpu(regs, crashing_cpu); crash_save_cpu(regs, crashing_cpu);
crash_kexec_prepare_cpus(crashing_cpu); crash_kexec_prepare_cpus(crashing_cpu);
cpu_set(crashing_cpu, cpus_in_crash); cpu_set(crashing_cpu, cpus_in_crash);
#if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP)
crash_kexec_wait_realmode(crashing_cpu); crash_kexec_wait_realmode(crashing_cpu);
#endif
machine_kexec_mask_interrupts(); machine_kexec_mask_interrupts();
......
...@@ -203,7 +203,7 @@ void __init free_unused_pacas(void) ...@@ -203,7 +203,7 @@ void __init free_unused_pacas(void)
{ {
int new_size; int new_size;
new_size = PAGE_ALIGN(sizeof(struct paca_struct) * num_possible_cpus()); new_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
if (new_size >= paca_size) if (new_size >= paca_size)
return; return;
......
...@@ -509,6 +509,9 @@ void __init smp_setup_cpu_maps(void) ...@@ -509,6 +509,9 @@ void __init smp_setup_cpu_maps(void)
*/ */
cpu_init_thread_core_maps(nthreads); cpu_init_thread_core_maps(nthreads);
/* Now that possible cpus are set, set nr_cpu_ids for later use */
nr_cpu_ids = find_last_bit(cpumask_bits(cpu_possible_mask),NR_CPUS) + 1;
free_unused_pacas(); free_unused_pacas();
} }
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
......
...@@ -378,7 +378,7 @@ static int __init pSeries_init_panel(void) ...@@ -378,7 +378,7 @@ static int __init pSeries_init_panel(void)
return 0; return 0;
} }
arch_initcall(pSeries_init_panel); machine_arch_initcall(pseries, pSeries_init_panel);
static int pseries_set_dabr(unsigned long dabr) static int pseries_set_dabr(unsigned long dabr)
{ {
......
...@@ -112,10 +112,10 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu) ...@@ -112,10 +112,10 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
/* Fixup atomic count: it exited inside IRQ handler. */ /* Fixup atomic count: it exited inside IRQ handler. */
task_thread_info(paca[lcpu].__current)->preempt_count = 0; task_thread_info(paca[lcpu].__current)->preempt_count = 0;
#ifdef CONFIG_HOTPLUG_CPU
if (get_cpu_current_state(lcpu) == CPU_STATE_INACTIVE) if (get_cpu_current_state(lcpu) == CPU_STATE_INACTIVE)
goto out; goto out;
#endif
/* /*
* If the RTAS start-cpu token does not exist then presume the * If the RTAS start-cpu token does not exist then presume the
* cpu is already spinning. * cpu is already spinning.
...@@ -130,7 +130,9 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu) ...@@ -130,7 +130,9 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
return 0; return 0;
} }
#ifdef CONFIG_HOTPLUG_CPU
out: out:
#endif
return 1; return 1;
} }
...@@ -144,16 +146,15 @@ static void __devinit smp_xics_setup_cpu(int cpu) ...@@ -144,16 +146,15 @@ static void __devinit smp_xics_setup_cpu(int cpu)
vpa_init(cpu); vpa_init(cpu);
cpumask_clear_cpu(cpu, of_spin_mask); cpumask_clear_cpu(cpu, of_spin_mask);
#ifdef CONFIG_HOTPLUG_CPU
set_cpu_current_state(cpu, CPU_STATE_ONLINE); set_cpu_current_state(cpu, CPU_STATE_ONLINE);
set_default_offline_state(cpu); set_default_offline_state(cpu);
#endif
} }
#endif /* CONFIG_XICS */ #endif /* CONFIG_XICS */
static void __devinit smp_pSeries_kick_cpu(int nr) static void __devinit smp_pSeries_kick_cpu(int nr)
{ {
long rc;
unsigned long hcpuid;
BUG_ON(nr < 0 || nr >= NR_CPUS); BUG_ON(nr < 0 || nr >= NR_CPUS);
if (!smp_startup_cpu(nr)) if (!smp_startup_cpu(nr))
...@@ -165,16 +166,20 @@ static void __devinit smp_pSeries_kick_cpu(int nr) ...@@ -165,16 +166,20 @@ static void __devinit smp_pSeries_kick_cpu(int nr)
* the processor will continue on to secondary_start * the processor will continue on to secondary_start
*/ */
paca[nr].cpu_start = 1; paca[nr].cpu_start = 1;
#ifdef CONFIG_HOTPLUG_CPU
set_preferred_offline_state(nr, CPU_STATE_ONLINE); set_preferred_offline_state(nr, CPU_STATE_ONLINE);
if (get_cpu_current_state(nr) == CPU_STATE_INACTIVE) { if (get_cpu_current_state(nr) == CPU_STATE_INACTIVE) {
long rc;
unsigned long hcpuid;
hcpuid = get_hard_smp_processor_id(nr); hcpuid = get_hard_smp_processor_id(nr);
rc = plpar_hcall_norets(H_PROD, hcpuid); rc = plpar_hcall_norets(H_PROD, hcpuid);
if (rc != H_SUCCESS) if (rc != H_SUCCESS)
printk(KERN_ERR "Error: Prod to wake up processor %d " printk(KERN_ERR "Error: Prod to wake up processor %d "
"Ret= %ld\n", nr, rc); "Ret= %ld\n", nr, rc);
} }
#endif
} }
static int smp_pSeries_cpu_bootable(unsigned int nr) static int smp_pSeries_cpu_bootable(unsigned int nr)
......
...@@ -1147,13 +1147,14 @@ static struct platform_driver mpc85xx_mc_err_driver = { ...@@ -1147,13 +1147,14 @@ static struct platform_driver mpc85xx_mc_err_driver = {
static void __init mpc85xx_mc_clear_rfxe(void *data) static void __init mpc85xx_mc_clear_rfxe(void *data)
{ {
orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1); orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1);
mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~0x20000)); mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~HID1_RFXE));
} }
#endif #endif
static int __init mpc85xx_mc_init(void) static int __init mpc85xx_mc_init(void)
{ {
int res = 0; int res = 0;
u32 pvr = 0;
printk(KERN_INFO "Freescale(R) MPC85xx EDAC driver, " printk(KERN_INFO "Freescale(R) MPC85xx EDAC driver, "
"(C) 2006 Montavista Software\n"); "(C) 2006 Montavista Software\n");
...@@ -1183,12 +1184,17 @@ static int __init mpc85xx_mc_init(void) ...@@ -1183,12 +1184,17 @@ static int __init mpc85xx_mc_init(void)
#endif #endif
#ifdef CONFIG_FSL_SOC_BOOKE #ifdef CONFIG_FSL_SOC_BOOKE
/* pvr = mfspr(SPRN_PVR);
* need to clear HID1[RFXE] to disable machine check int
* so we can catch it if ((PVR_VER(pvr) == PVR_VER_E500V1) ||
*/ (PVR_VER(pvr) == PVR_VER_E500V2)) {
if (edac_op_state == EDAC_OPSTATE_INT) /*
on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0); * need to clear HID1[RFXE] to disable machine check int
* so we can catch it
*/
if (edac_op_state == EDAC_OPSTATE_INT)
on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0);
}
#endif #endif
return 0; return 0;
...@@ -1206,7 +1212,12 @@ static void __exit mpc85xx_mc_restore_hid1(void *data) ...@@ -1206,7 +1212,12 @@ static void __exit mpc85xx_mc_restore_hid1(void *data)
static void __exit mpc85xx_mc_exit(void) static void __exit mpc85xx_mc_exit(void)
{ {
#ifdef CONFIG_FSL_SOC_BOOKE #ifdef CONFIG_FSL_SOC_BOOKE
on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); u32 pvr = mfspr(SPRN_PVR);
if ((PVR_VER(pvr) == PVR_VER_E500V1) ||
(PVR_VER(pvr) == PVR_VER_E500V2)) {
on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
}
#endif #endif
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
platform_driver_unregister(&mpc85xx_pci_err_driver); platform_driver_unregister(&mpc85xx_pci_err_driver);
......
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