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Commit 482612af authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Staging: pata_rdc: coding style fixes 

This fixes a number of coding style issues in the pata_rdc.h file

Cc: Kevin Huang  <Kevin.Huang@rdc.com.tw>
Cc: Tomy Wang <Tomy.Wang@rdc.com.tw>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent b079fa27
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drivers/staging/pata_rdc/pata_rdc.c
View file @ 482612af
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
#include "pata_rdc.h" #include "pata_rdc.h"
//#define DBGPRINTF /* #define DBGPRINTF */
#ifdef DBGPRINTF #ifdef DBGPRINTF
...@@ -22,11 +22,13 @@ ...@@ -22,11 +22,13 @@
#endif #endif
// Driver Info. /* Driver Info. */
#define DRIVER_NAME "pata_rdc" /* sata_rdc for SATA */
#define DRIVER_NAME "pata_rdc" // sata_rdc for SATA #define DRIVER_VERSION "2.6.28" /* based on kernel version. */
#define DRIVER_VERSION "2.6.28" // based on kernel version. /* because each kernel main version has
// because each kernel main version has its libata, we follow kernel to determine the last libata version. * its libata, we follow kernel to
* determine the last libata version.
*/
static const struct pci_device_id rdc_pata_id_table[] = { static const struct pci_device_id rdc_pata_id_table[] = {
...@@ -36,12 +38,12 @@ static const struct pci_device_id rdc_pata_id_table[] = { ...@@ -36,12 +38,12 @@ static const struct pci_device_id rdc_pata_id_table[] = {
}; };
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
MODULE_AUTHOR("this version author is RDC"); // replace "RDC" with the last maintainer. MODULE_AUTHOR("this version author is RDC"); /* replace "RDC" with the last maintainer. */
MODULE_DESCRIPTION("RDC PCI IDE Driver"); MODULE_DESCRIPTION("RDC PCI IDE Driver");
MODULE_DEVICE_TABLE(pci, rdc_pata_id_table); MODULE_DEVICE_TABLE(pci, rdc_pata_id_table);
MODULE_VERSION(DRIVER_VERSION); MODULE_VERSION(DRIVER_VERSION);
// a pci driver /* a pci driver */
static struct pci_driver rdc_pata_driver = { static struct pci_driver rdc_pata_driver = {
.name = DRIVER_NAME, .name = DRIVER_NAME,
.id_table = rdc_pata_id_table, .id_table = rdc_pata_id_table,
...@@ -53,15 +55,14 @@ static struct pci_driver rdc_pata_driver = { ...@@ -53,15 +55,14 @@ static struct pci_driver rdc_pata_driver = {
#endif #endif
}; };
static unsigned int in_module_init = 1; // hotplugging check??? static unsigned int in_module_init = 1; /* hotplugging check??? */
static int __init pata_rdc_init(void) static int __init pata_rdc_init(void)
{ {
int rc; int rc;
dbgprintf("pata_rdc_init\n"); dbgprintf("pata_rdc_init\n");
rc = pci_register_driver(&rdc_pata_driver); rc = pci_register_driver(&rdc_pata_driver);
if (rc) if (rc) {
{
dbgprintf("pata_rdc_init faile\n"); dbgprintf("pata_rdc_init faile\n");
return rc; return rc;
} }
...@@ -80,14 +81,16 @@ static void __exit pata_rdc_exit(void) ...@@ -80,14 +81,16 @@ static void __exit pata_rdc_exit(void)
module_init(pata_rdc_init); module_init(pata_rdc_init);
module_exit(pata_rdc_exit); module_exit(pata_rdc_exit);
// ata device data /* ata device data */
static struct pci_bits ATA_Decode_Enable_Bits[] = { // see ATA Host Adapters Standards. /* see ATA Host Adapters Standards. */
static struct pci_bits ATA_Decode_Enable_Bits[] = {
{ 0x41U, 1U, 0x80UL, 0x80UL }, /* port (Channel) 0 */ { 0x41U, 1U, 0x80UL, 0x80UL }, /* port (Channel) 0 */
{ 0x43U, 1U, 0x80UL, 0x80UL }, /* port (Channel) 1 */ { 0x43U, 1U, 0x80UL, 0x80UL }, /* port (Channel) 1 */
}; };
static struct scsi_host_template rdc_pata_sht = { // pata host template /* pata host template */
static struct scsi_host_template rdc_pata_sht = {
ATA_BMDMA_SHT(DRIVER_NAME), ATA_BMDMA_SHT(DRIVER_NAME),
}; };
...@@ -100,12 +103,10 @@ static const struct ata_port_operations rdc_pata_ops = { ...@@ -100,12 +103,10 @@ static const struct ata_port_operations rdc_pata_ops = {
.cable_detect = rdc_pata_cable_detect, .cable_detect = rdc_pata_cable_detect,
.set_piomode = rdc_pata_set_piomode, .set_piomode = rdc_pata_set_piomode,
.set_dmamode = rdc_pata_set_dmamode, .set_dmamode = rdc_pata_set_dmamode,
}; };
static struct ata_port_info rdc_pata_port_info[] = { static struct ata_port_info rdc_pata_port_info[] = {
[RDC_17F31011] = [RDC_17F31011] = {
{
.flags = ATA_FLAG_SLAVE_POSS, .flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = 0x1f, /* pio0-4 */ .pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */ .mwdma_mask = 0x07, /* mwdma0-2 */
...@@ -113,22 +114,19 @@ static struct ata_port_info rdc_pata_port_info[] = { ...@@ -113,22 +114,19 @@ static struct ata_port_info rdc_pata_port_info[] = {
.port_ops = &rdc_pata_ops, .port_ops = &rdc_pata_ops,
}, },
[RDC_17F31012] = [RDC_17F31012] = {
{
.flags = ATA_FLAG_SLAVE_POSS, .flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = 0x1f, /* pio0-4 */ .pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */ .mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = ATA_UDMA5, /* udma0-5 */ .udma_mask = ATA_UDMA5, /* udma0-5 */
.port_ops = &rdc_pata_ops, .port_ops = &rdc_pata_ops,
}, },
}; };
// callback function for pci_driver /* callback function for pci_driver */
/** /**
* Register ATA PCI device with kernel services * Register ATA PCI device with kernel services
...@@ -141,12 +139,10 @@ static struct ata_port_info rdc_pata_port_info[] = { ...@@ -141,12 +139,10 @@ static struct ata_port_info rdc_pata_port_info[] = {
* RETURNS: * RETURNS:
* Zero on success, or -ERRNO value. * Zero on success, or -ERRNO value.
*/ */
static int __devinit rdc_init_one( static int __devinit rdc_init_one(struct pci_dev *pdev,
struct pci_dev *pdev, const struct pci_device_id *ent)
const struct pci_device_id *ent
)
{ {
//struct device *dev = &pdev->dev; /*struct device *dev = &pdev->dev; */
struct ata_port_info port_info[2]; struct ata_port_info port_info[2];
const struct ata_port_info *ppinfo[] = { &port_info[0], &port_info[1] }; const struct ata_port_info *ppinfo[] = { &port_info[0], &port_info[1] };
...@@ -154,9 +150,8 @@ static int __devinit rdc_init_one( ...@@ -154,9 +150,8 @@ static int __devinit rdc_init_one(
dbgprintf("rdc_init_one\n"); dbgprintf("rdc_init_one\n");
/* no hotplugging support (FIXME) */ // why??? /* no hotplugging support (FIXME) */ /* why??? */
if (!in_module_init) if (!in_module_init) {
{
dbgprintf("rdc_init_one in_module_init == 0 failed \n"); dbgprintf("rdc_init_one in_module_init == 0 failed \n");
return -ENODEV; return -ENODEV;
} }
...@@ -165,19 +160,18 @@ static int __devinit rdc_init_one( ...@@ -165,19 +160,18 @@ static int __devinit rdc_init_one(
/* enable device and prepare host */ /* enable device and prepare host */
rc = pci_enable_device(pdev); rc = pci_enable_device(pdev);
if (rc) if (rc) {
{
dbgprintf("rdc_init_one pci_enable_device failed \n"); dbgprintf("rdc_init_one pci_enable_device failed \n");
return rc; return rc;
} }
/* initialize controller */ /* initialize controller */
pci_intx(pdev, 1); // enable interrupt pci_intx(pdev, 1); /* enable interrupt */
return ata_pci_sff_init_one(pdev, ppinfo, &rdc_pata_sht, NULL); return ata_pci_sff_init_one(pdev, ppinfo, &rdc_pata_sht, NULL);
} }
// callback function for ata_port /* callback function for ata_port */
/** /**
* Set port up for dma. * Set port up for dma.
...@@ -196,28 +190,21 @@ static int __devinit rdc_init_one( ...@@ -196,28 +190,21 @@ static int __devinit rdc_init_one(
* LOCKING: * LOCKING:
* Inherited from caller. * Inherited from caller.
*/ */
static int rdc_pata_port_start( static int rdc_pata_port_start(struct ata_port *ap)
struct ata_port *ap
)
{ {
uint Channel; uint Channel;
Channel = ap->port_no; Channel = ap->port_no;
dbgprintf("rdc_pata_port_start Channel: %u \n", Channel); dbgprintf("rdc_pata_port_start Channel: %u \n", Channel);
if (ap->ioaddr.bmdma_addr) if (ap->ioaddr.bmdma_addr) {
{
return ata_port_start(ap); return ata_port_start(ap);
} } else {
else
{
dbgprintf("rdc_pata_port_start return 0 !!!\n"); dbgprintf("rdc_pata_port_start return 0 !!!\n");
return 0; return 0;
} }
} }
static void rdc_pata_port_stop( static void rdc_pata_port_stop(struct ata_port *ap)
struct ata_port *ap
)
{ {
uint Channel; uint Channel;
...@@ -234,14 +221,10 @@ static void rdc_pata_port_stop( ...@@ -234,14 +221,10 @@ static void rdc_pata_port_stop(
* LOCKING: * LOCKING:
* None (inherited from caller). * None (inherited from caller).
*/ */
static int rdc_pata_prereset( static int rdc_pata_prereset(struct ata_link *link, unsigned long deadline)
struct ata_link *link,
unsigned long deadline
)
{ {
struct pci_dev *pdev; struct pci_dev *pdev;
struct ata_port *ap; struct ata_port *ap;
uint Channel; uint Channel;
dbgprintf("rdc_pata_prereset\n"); dbgprintf("rdc_pata_prereset\n");
...@@ -251,14 +234,11 @@ static int rdc_pata_prereset( ...@@ -251,14 +234,11 @@ static int rdc_pata_prereset(
Channel = ap->port_no; Channel = ap->port_no;
// test ATA Decode Enable Bits, should be enable. /* test ATA Decode Enable Bits, should be enable. */
if (!pci_test_config_bits(pdev, &ATA_Decode_Enable_Bits[Channel])) if (!pci_test_config_bits(pdev, &ATA_Decode_Enable_Bits[Channel])) {
{
dbgprintf("rdc_pata_prereset Channel: %u, Decode Disable\n", Channel); dbgprintf("rdc_pata_prereset Channel: %u, Decode Disable\n", Channel);
return -ENOENT; return -ENOENT;
} } else {
else
{
dbgprintf("rdc_pata_prereset Channel: %u, Decode Enable\n", Channel); dbgprintf("rdc_pata_prereset Channel: %u, Decode Enable\n", Channel);
return ata_std_prereset(link, deadline); return ata_std_prereset(link, deadline);
} }
...@@ -274,15 +254,10 @@ static int rdc_pata_prereset( ...@@ -274,15 +254,10 @@ static int rdc_pata_prereset(
* LOCKING: * LOCKING:
* None (inherited from caller). * None (inherited from caller).
*/ */
static int rdc_pata_cable_detect(struct ata_port *ap)
static int rdc_pata_cable_detect(
struct ata_port *ap
)
{ {
struct pci_dev *pdev; struct pci_dev *pdev;
uint Channel; uint Channel;
uint Mask; uint Mask;
u32 u32Value; u32 u32Value;
...@@ -293,24 +268,17 @@ static int rdc_pata_cable_detect( ...@@ -293,24 +268,17 @@ static int rdc_pata_cable_detect(
Channel = ap->port_no; Channel = ap->port_no;
if (Channel == 0) if (Channel == 0)
{
Mask = ATAConfiguration_IDEIOConfiguration_PrimaryDeviceCable80Report; Mask = ATAConfiguration_IDEIOConfiguration_PrimaryDeviceCable80Report;
}
else else
{
Mask = ATAConfiguration_IDEIOConfiguration_SecondaryDeviceCable80Report; Mask = ATAConfiguration_IDEIOConfiguration_SecondaryDeviceCable80Report;
}
/* check BIOS cable detect results */ /* check BIOS cable detect results */
pci_read_config_dword(pdev, ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset, &u32Value); pci_read_config_dword(pdev, ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset, &u32Value);
if ((u32Value & Mask) == 0) if ((u32Value & Mask) == 0) {
{
dbgprintf("rdc_pata_cable_detect Channel: %u, PATA40 \n", Channel); dbgprintf("rdc_pata_cable_detect Channel: %u, PATA40 \n", Channel);
return ATA_CBL_PATA40; return ATA_CBL_PATA40;
} } else {
else
{
dbgprintf("rdc_pata_cable_detect Channel: %u, PATA80 \n", Channel); dbgprintf("rdc_pata_cable_detect Channel: %u, PATA80 \n", Channel);
return ATA_CBL_PATA80; return ATA_CBL_PATA80;
} }
...@@ -326,17 +294,11 @@ static int rdc_pata_cable_detect( ...@@ -326,17 +294,11 @@ static int rdc_pata_cable_detect(
* LOCKING: * LOCKING:
* None (inherited from caller). * None (inherited from caller).
*/ */
static void rdc_pata_set_piomode(struct ata_port *ap, struct ata_device *adev)
static void rdc_pata_set_piomode(
struct ata_port *ap,
struct ata_device *adev
)
{ {
struct pci_dev *pdev; struct pci_dev *pdev;
uint Channel; uint Channel;
uint DeviceID; uint DeviceID;
uint PIOTimingMode; uint PIOTimingMode;
uint PrefetchPostingEnable; uint PrefetchPostingEnable;
...@@ -346,14 +308,16 @@ static void rdc_pata_set_piomode( ...@@ -346,14 +308,16 @@ static void rdc_pata_set_piomode(
Channel = ap->port_no; Channel = ap->port_no;
DeviceID = adev->devno; DeviceID = adev->devno;
PIOTimingMode = adev->pio_mode - XFER_PIO_0; // piomode = 0, 1, 2, 3... ; adev->pio_mode = XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3... /*
* piomode = 0, 1, 2, 3... ; adev->pio_mode = XFER_PIO_0, XFER_PIO_1,
* XFER_PIO_2, XFER_PIO_3...
*/
PIOTimingMode = adev->pio_mode - XFER_PIO_0;
if (adev->class == ATA_DEV_ATA) if (adev->class == ATA_DEV_ATA) {
{
PrefetchPostingEnable = TRUE; PrefetchPostingEnable = TRUE;
} } else {
else /* ATAPI, CD DVD Rom */
{ // ATAPI, CD DVD Rom
PrefetchPostingEnable = FALSE; PrefetchPostingEnable = FALSE;
} }
...@@ -362,40 +326,37 @@ static void rdc_pata_set_piomode( ...@@ -362,40 +326,37 @@ static void rdc_pata_set_piomode(
* after set_piomode if any DMA mode is available. * after set_piomode if any DMA mode is available.
*/ */
/* Ensure the UDMA bit is off - it will be turned back on if /* Ensure the UDMA bit is off - it will be turned back on if UDMA is
UDMA is selected */ * selected */
if (Channel == 0) if (Channel == 0) {
{
ATAHostAdapter_SetPrimaryPIO( ATAHostAdapter_SetPrimaryPIO(
pdev, pdev,
DeviceID, DeviceID,
PIOTimingMode, PIOTimingMode,
TRUE,//DMAEnable, TRUE,/* DMAEnable, */
PrefetchPostingEnable PrefetchPostingEnable
); );
ATAHostAdapter_SetPrimaryUDMA( ATAHostAdapter_SetPrimaryUDMA(
pdev, pdev,
DeviceID, DeviceID,
FALSE,//UDMAEnable, FALSE,/* UDMAEnable, */
UDMA0 UDMA0
); );
} } else {
else
{
ATAHostAdapter_SetSecondaryPIO( ATAHostAdapter_SetSecondaryPIO(
pdev, pdev,
DeviceID, DeviceID,
PIOTimingMode, PIOTimingMode,
TRUE,//DMAEnable, TRUE,/* DMAEnable, */
PrefetchPostingEnable PrefetchPostingEnable
); );
ATAHostAdapter_SetSecondaryUDMA( ATAHostAdapter_SetSecondaryUDMA(
pdev, pdev,
DeviceID, DeviceID,
FALSE,//UDMAEnable, FALSE,/* UDMAEnable, */
UDMA0 UDMA0
); );
} }
...@@ -412,17 +373,11 @@ static void rdc_pata_set_piomode( ...@@ -412,17 +373,11 @@ static void rdc_pata_set_piomode(
* LOCKING: * LOCKING:
* None (inherited from caller). * None (inherited from caller).
*/ */
static void rdc_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev)
static void rdc_pata_set_dmamode(
struct ata_port *ap,
struct ata_device *adev
)
{ {
struct pci_dev *pdev; struct pci_dev *pdev;
uint Channel; uint Channel;
uint DeviceID; uint DeviceID;
uint PIOTimingMode; uint PIOTimingMode;
uint PrefetchPostingEnable; uint PrefetchPostingEnable;
uint DMATimingMode; uint DMATimingMode;
...@@ -434,133 +389,98 @@ static void rdc_pata_set_dmamode( ...@@ -434,133 +389,98 @@ static void rdc_pata_set_dmamode(
Channel = ap->port_no; Channel = ap->port_no;
DeviceID = adev->devno; DeviceID = adev->devno;
PIOTimingMode = adev->pio_mode - XFER_PIO_0; // piomode = 0, 1, 2, 3... ; adev->pio_mode = XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3... PIOTimingMode = adev->pio_mode - XFER_PIO_0; /* piomode = 0, 1, 2, 3... ; adev->pio_mode = XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3... */
DMATimingMode = adev->dma_mode; // UDMA or MDMA DMATimingMode = adev->dma_mode; /* UDMA or MDMA */
if (adev->class == ATA_DEV_ATA) if (adev->class == ATA_DEV_ATA) {
{
PrefetchPostingEnable = TRUE; PrefetchPostingEnable = TRUE;
} } else {
else /* ATAPI, CD DVD Rom */
{ // ATAPI, CD DVD Rom
PrefetchPostingEnable = FALSE; PrefetchPostingEnable = FALSE;
} }
if (ap->udma_mask == 0) if (ap->udma_mask == 0) {
{ // ata_port dont support udma. depend on hardware spec. /* ata_port dont support udma. depend on hardware spec. */
UDMAEnable = FALSE; UDMAEnable = FALSE;
} } else {
else
{
UDMAEnable = TRUE; UDMAEnable = TRUE;
} }
/*if (ap->mdma_mask == 0) /*if (ap->mdma_mask == 0) {
{
}*/ }*/
if (Channel == 0) if (Channel == 0) {
{ if (DMATimingMode >= XFER_UDMA_0) {
if (DMATimingMode >= XFER_UDMA_0) /* UDMA */
{ // UDMA ATAHostAdapter_SetPrimaryPIO(pdev,
ATAHostAdapter_SetPrimaryPIO(
pdev,
DeviceID, DeviceID,
PIOTimingMode, PIOTimingMode,
TRUE,//DMAEnable, TRUE,/*DMAEnable,*/
PrefetchPostingEnable PrefetchPostingEnable);
);
ATAHostAdapter_SetPrimaryUDMA( ATAHostAdapter_SetPrimaryUDMA(pdev,
pdev,
DeviceID, DeviceID,
UDMAEnable, UDMAEnable,
DMATimingMode - XFER_UDMA_0 DMATimingMode - XFER_UDMA_0);
);
dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, UDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_UDMA_0)); dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, UDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_UDMA_0));
} } else {
else /* MDMA */
{ // MDMA ATAHostAdapter_SetPrimaryPIO(pdev,
ATAHostAdapter_SetPrimaryPIO(
pdev,
DeviceID, DeviceID,
(DMATimingMode - XFER_MW_DMA_0) + PIO2, // MDMA0 = PIO2 (DMATimingMode - XFER_MW_DMA_0) + PIO2, /* MDMA0 = PIO2 */
TRUE,//DMAEnable, TRUE,/*DMAEnable,*/
PrefetchPostingEnable PrefetchPostingEnable);
);
ATAHostAdapter_SetPrimaryUDMA( ATAHostAdapter_SetPrimaryUDMA(pdev,
pdev,
DeviceID, DeviceID,
FALSE,//UDMAEnable, FALSE,/*UDMAEnable,*/
UDMA0 UDMA0);
);
dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, MDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_MW_DMA_0)); dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, MDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_MW_DMA_0));
} }
} } else {
else if (DMATimingMode >= XFER_UDMA_0) {
{ /* UDMA */
if (DMATimingMode >= XFER_UDMA_0) ATAHostAdapter_SetSecondaryPIO(pdev,
{ // UDMA
ATAHostAdapter_SetSecondaryPIO(
pdev,
DeviceID, DeviceID,
PIOTimingMode, PIOTimingMode,
TRUE,//DMAEnable, TRUE,/*DMAEnable,*/
PrefetchPostingEnable PrefetchPostingEnable);
);
ATAHostAdapter_SetSecondaryUDMA( ATAHostAdapter_SetSecondaryUDMA(pdev,
pdev,
DeviceID, DeviceID,
UDMAEnable, UDMAEnable,
DMATimingMode - XFER_UDMA_0 DMATimingMode - XFER_UDMA_0);
);
dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, UDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_UDMA_0)); dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, UDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_UDMA_0));
} } else {
else /* MDMA */
{ // MDMA ATAHostAdapter_SetSecondaryPIO(pdev,
ATAHostAdapter_SetSecondaryPIO(
pdev,
DeviceID, DeviceID,
(DMATimingMode - XFER_MW_DMA_0) + PIO2, // MDMA0 = PIO2 (DMATimingMode - XFER_MW_DMA_0) + PIO2, /* MDMA0 = PIO2 */
TRUE,//DMAEnable, TRUE,/*DMAEnable,*/
PrefetchPostingEnable PrefetchPostingEnable);
);
ATAHostAdapter_SetSecondaryUDMA( ATAHostAdapter_SetSecondaryUDMA(pdev,
pdev,
DeviceID, DeviceID,
FALSE,//UDMAEnable, FALSE,/*UDMAEnable,*/
UDMA0 UDMA0);
);
dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, MDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_MW_DMA_0)); dbgprintf("rdc_pata_set_dmamode Channel: %u, DeviceID: %u, MDMA: %u \n", Channel, DeviceID, (uint)(DMATimingMode - XFER_MW_DMA_0));
} }
} }
} }
// modified PCIDeviceIO code. /* modified PCIDeviceIO code. */
static uint static uint PCIDeviceIO_ReadPCIConfiguration(struct pci_dev *pdev, uint Offset, uint Length, void *pBuffer)
PCIDeviceIO_ReadPCIConfiguration(
struct pci_dev *pdev,
uint Offset,
uint Length,
void* pBuffer
)
{ {
uint funcresult; uint funcresult;
unchar *pchar;
unchar* pchar;
uint i; uint i;
funcresult = TRUE; funcresult = TRUE;
pchar = pBuffer; pchar = pBuffer;
for (i = 0; i < Length; i++) for (i = 0; i < Length; i++) {
{
pci_read_config_byte(pdev, Offset, pchar); pci_read_config_byte(pdev, Offset, pchar);
Offset++; Offset++;
pchar++; pchar++;
...@@ -574,26 +494,17 @@ PCIDeviceIO_ReadPCIConfiguration( ...@@ -574,26 +494,17 @@ PCIDeviceIO_ReadPCIConfiguration(
return funcresult; return funcresult;
} }
static uint static uint PCIDeviceIO_WritePCIConfiguration(struct pci_dev *pdev, uint Offset, uint Length, void *pBuffer)
PCIDeviceIO_WritePCIConfiguration(
struct pci_dev *pdev,
uint Offset,
uint Length,
void* pBuffer
)
{ {
uint funcresult; uint funcresult;
unchar *pchar;
unchar* pchar;
uint i; uint i;
funcresult = TRUE; funcresult = TRUE;
pchar = pBuffer; pchar = pBuffer;
for (i = 0; i < Length; i++) for (i = 0; i < Length; i++) {
{
pci_write_config_byte(pdev, Offset, *pchar); pci_write_config_byte(pdev, Offset, *pchar);
Offset++; Offset++;
pchar++; pchar++;
...@@ -607,22 +518,13 @@ PCIDeviceIO_WritePCIConfiguration( ...@@ -607,22 +518,13 @@ PCIDeviceIO_WritePCIConfiguration(
return funcresult; return funcresult;
} }
/* modified ATAHostAdapter code. */
// modified ATAHostAdapter code. static uint ATAHostAdapter_SetPrimaryPIO(struct pci_dev *pdev, uint DeviceID,
uint PIOTimingMode, uint DMAEnable,
static uint uint PrefetchPostingEnable)
ATAHostAdapter_SetPrimaryPIO(
struct pci_dev *pdev,
uint DeviceID,
uint PIOTimingMode,
uint DMAEnable,
uint PrefetchPostingEnable
)
{ {
uint funcresult; uint funcresult;
uint result; uint result;
uint ATATimingRegister; uint ATATimingRegister;
uint Device1TimingRegister; uint Device1TimingRegister;
...@@ -631,179 +533,117 @@ ATAHostAdapter_SetPrimaryPIO( ...@@ -631,179 +533,117 @@ ATAHostAdapter_SetPrimaryPIO(
ATATimingRegister = 0; ATATimingRegister = 0;
Device1TimingRegister = 0; Device1TimingRegister = 0;
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_PrimaryTiming + ATAConfiguration_PCIOffset, ATAConfiguration_ID_PrimaryTiming + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_PrimaryTiming_Size, ATAConfiguration_ID_PrimaryTiming_Size,
&ATATimingRegister &ATATimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_Device1Timing + ATAConfiguration_PCIOffset, ATAConfiguration_ID_Device1Timing + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_Device1Timing_Size, ATAConfiguration_ID_Device1Timing_Size,
&Device1TimingRegister &Device1TimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1TimingRegisterEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1TimingRegisterEnable;
switch(DeviceID) switch (DeviceID) {
{
case 0: case 0:
{ /* mask clear */
// mask clear ATATimingRegister &= ~(ATAConfiguration_PrimaryTiming_Device0FastTimingEnable |
ATATimingRegister &= ~(ATAConfiguration_PrimaryTiming_Device0FastTimingEnable ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable |
| ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable |
| ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable ATAConfiguration_PrimaryTiming_Device0DMATimingEnable |
| ATAConfiguration_PrimaryTiming_Device0DMATimingEnable ATAConfiguration_PrimaryTiming_Device0RecoveryMode |
| ATAConfiguration_PrimaryTiming_Device0RecoveryMode ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode);
| ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode
);
if (PIOTimingMode > PIO0) if (PIOTimingMode > PIO0)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0FastTimingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0FastTimingEnable;
}
if (PIOTimingMode >= PIO3) if (PIOTimingMode >= PIO3)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable;
}
if (PIOTimingMode >= PIO2 && PrefetchPostingEnable == TRUE) if (PIOTimingMode >= PIO2 && PrefetchPostingEnable == TRUE)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable;
}
if (DMAEnable == TRUE if (DMAEnable == TRUE && PIOTimingMode >= PIO2)
&& PIOTimingMode >= PIO2)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0DMATimingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0DMATimingEnable;
}
if (PIOTimingMode <= PIO2) if (PIOTimingMode <= PIO2)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_0; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_0;
}
else if (PIOTimingMode == PIO3) else if (PIOTimingMode == PIO3)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_1; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_1;
}
else if (PIOTimingMode == PIO4) else if (PIOTimingMode == PIO4)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_3; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_3;
}
if (PIOTimingMode <= PIO1) if (PIOTimingMode <= PIO1)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_0; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_0;
}
else if (PIOTimingMode == PIO2) else if (PIOTimingMode == PIO2)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_1; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_1;
}
else if (PIOTimingMode <= PIO4) else if (PIOTimingMode <= PIO4)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_2; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_2;
}
}
break; break;
case 1: case 1:
{ ATATimingRegister &= ~(ATAConfiguration_PrimaryTiming_Device1FastTimingEnable |
ATATimingRegister &= ~(ATAConfiguration_PrimaryTiming_Device1FastTimingEnable ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable |
| ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable |
| ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable ATAConfiguration_PrimaryTiming_Device1DMATimingEnable);
| ATAConfiguration_PrimaryTiming_Device1DMATimingEnable
);
if (PIOTimingMode > PIO0) if (PIOTimingMode > PIO0)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1FastTimingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1FastTimingEnable;
}
if (PIOTimingMode >= PIO3) if (PIOTimingMode >= PIO3)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable;
}
if (PIOTimingMode >= PIO2 && PrefetchPostingEnable == TRUE) if (PIOTimingMode >= PIO2 && PrefetchPostingEnable == TRUE)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable;
}
if (DMAEnable == TRUE if (DMAEnable == TRUE && PIOTimingMode >= PIO2)
&& PIOTimingMode >= PIO2)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1DMATimingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1DMATimingEnable;
}
Device1TimingRegister &= ~(ATAConfiguration_Device1Timing_PrimaryRecoveryMode | ATAConfiguration_Device1Timing_PrimaryIORDYSampleMode); Device1TimingRegister &= ~(ATAConfiguration_Device1Timing_PrimaryRecoveryMode |
ATAConfiguration_Device1Timing_PrimaryIORDYSampleMode);
if (PIOTimingMode <= PIO2) if (PIOTimingMode <= PIO2)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryRecoveryMode_0; Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryRecoveryMode_0;
}
else if (PIOTimingMode == PIO3) else if (PIOTimingMode == PIO3)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryRecoveryMode_1; Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryRecoveryMode_1;
}
else if (PIOTimingMode == PIO4) else if (PIOTimingMode == PIO4)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryRecoveryMode_3; Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryRecoveryMode_3;
}
if (PIOTimingMode <= PIO1) if (PIOTimingMode <= PIO1)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryIORDYSampleMode_0; Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryIORDYSampleMode_0;
}
else if (PIOTimingMode == PIO2) else if (PIOTimingMode == PIO2)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryIORDYSampleMode_1; Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryIORDYSampleMode_1;
}
else if (PIOTimingMode <= PIO4) else if (PIOTimingMode <= PIO4)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryIORDYSampleMode_2; Device1TimingRegister |= ATAConfiguration_Device1Timing_PrimaryIORDYSampleMode_2;
}
}
break; break;
default: default:
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
}
break; break;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_PrimaryTiming + ATAConfiguration_PCIOffset, ATAConfiguration_ID_PrimaryTiming + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_PrimaryTiming_Size, ATAConfiguration_ID_PrimaryTiming_Size,
&ATATimingRegister &ATATimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_Device1Timing + ATAConfiguration_PCIOffset, ATAConfiguration_ID_Device1Timing + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_Device1Timing_Size, ATAConfiguration_ID_Device1Timing_Size,
&Device1TimingRegister &Device1TimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
...@@ -814,19 +654,12 @@ ATAHostAdapter_SetPrimaryPIO( ...@@ -814,19 +654,12 @@ ATAHostAdapter_SetPrimaryPIO(
return funcresult; return funcresult;
} }
static uint static uint ATAHostAdapter_SetSecondaryPIO(struct pci_dev *pdev, uint DeviceID,
ATAHostAdapter_SetSecondaryPIO( uint PIOTimingMode, uint DMAEnable,
struct pci_dev *pdev, uint PrefetchPostingEnable)
uint DeviceID,
uint PIOTimingMode,
uint DMAEnable,
uint PrefetchPostingEnable
)
{ {
uint funcresult; uint funcresult;
uint result; uint result;
uint ATATimingRegister; uint ATATimingRegister;
uint Device1TimingRegister; uint Device1TimingRegister;
...@@ -835,393 +668,269 @@ ATAHostAdapter_SetSecondaryPIO( ...@@ -835,393 +668,269 @@ ATAHostAdapter_SetSecondaryPIO(
ATATimingRegister = 0; ATATimingRegister = 0;
Device1TimingRegister = 0; Device1TimingRegister = 0;
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_SecondaryTiming + ATAConfiguration_PCIOffset, ATAConfiguration_ID_SecondaryTiming + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_SecondaryTiming_Size, ATAConfiguration_ID_SecondaryTiming_Size,
&ATATimingRegister &ATATimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_Device1Timing + ATAConfiguration_PCIOffset, ATAConfiguration_ID_Device1Timing + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_Device1Timing_Size, ATAConfiguration_ID_Device1Timing_Size,
&Device1TimingRegister &Device1TimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1TimingRegisterEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1TimingRegisterEnable;
switch(DeviceID) switch (DeviceID) {
{
case 0: case 0:
{ /* mask clear */
// mask clear ATATimingRegister &= ~(ATAConfiguration_PrimaryTiming_Device0FastTimingEnable |
ATATimingRegister &= ~(ATAConfiguration_PrimaryTiming_Device0FastTimingEnable ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable |
| ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable |
| ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable ATAConfiguration_PrimaryTiming_Device0DMATimingEnable |
| ATAConfiguration_PrimaryTiming_Device0DMATimingEnable ATAConfiguration_PrimaryTiming_Device0RecoveryMode |
| ATAConfiguration_PrimaryTiming_Device0RecoveryMode ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode);
| ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode
);
if (PIOTimingMode > PIO0) if (PIOTimingMode > PIO0)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0FastTimingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0FastTimingEnable;
}
if (PIOTimingMode >= PIO3) if (PIOTimingMode >= PIO3)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable;
}
if (PIOTimingMode >= PIO2 && PrefetchPostingEnable == TRUE) if (PIOTimingMode >= PIO2 && PrefetchPostingEnable == TRUE)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable;
}
if (DMAEnable == TRUE if (DMAEnable == TRUE && PIOTimingMode >= PIO2)
&& PIOTimingMode >= PIO2)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0DMATimingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0DMATimingEnable;
}
if (PIOTimingMode <= PIO2) if (PIOTimingMode <= PIO2)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_0; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_0;
}
else if (PIOTimingMode == PIO3) else if (PIOTimingMode == PIO3)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_1; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_1;
}
else if (PIOTimingMode == PIO4) else if (PIOTimingMode == PIO4)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_3; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0RecoveryMode_3;
}
if (PIOTimingMode <= PIO1) if (PIOTimingMode <= PIO1)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_0; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_0;
}
else if (PIOTimingMode == PIO2) else if (PIOTimingMode == PIO2)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_1; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_1;
}
else if (PIOTimingMode <= PIO4) else if (PIOTimingMode <= PIO4)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_2; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_2;
}
}
break; break;
case 1: case 1:
{ ATATimingRegister &= ~(ATAConfiguration_PrimaryTiming_Device1FastTimingEnable |
ATATimingRegister &= ~(ATAConfiguration_PrimaryTiming_Device1FastTimingEnable ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable |
| ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable |
| ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable ATAConfiguration_PrimaryTiming_Device1DMATimingEnable);
| ATAConfiguration_PrimaryTiming_Device1DMATimingEnable
);
if (PIOTimingMode > PIO0) if (PIOTimingMode > PIO0)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1FastTimingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1FastTimingEnable;
}
if (PIOTimingMode >= PIO3) if (PIOTimingMode >= PIO3)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable;
}
if (PIOTimingMode >= PIO2 && PrefetchPostingEnable == TRUE) if (PIOTimingMode >= PIO2 && PrefetchPostingEnable == TRUE)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable;
}
if (DMAEnable == TRUE if (DMAEnable == TRUE && PIOTimingMode >= PIO2)
&& PIOTimingMode >= PIO2)
{
ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1DMATimingEnable; ATATimingRegister |= ATAConfiguration_PrimaryTiming_Device1DMATimingEnable;
}
Device1TimingRegister &= ~(ATAConfiguration_Device1Timing_SecondaryRecoveryMode | ATAConfiguration_Device1Timing_SecondaryIORDYSampleMode); Device1TimingRegister &= ~(ATAConfiguration_Device1Timing_SecondaryRecoveryMode |
ATAConfiguration_Device1Timing_SecondaryIORDYSampleMode);
if (PIOTimingMode <= PIO2) if (PIOTimingMode <= PIO2)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryRecoveryMode_0; Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryRecoveryMode_0;
}
else if (PIOTimingMode == PIO3) else if (PIOTimingMode == PIO3)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryRecoveryMode_1; Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryRecoveryMode_1;
}
else if (PIOTimingMode == PIO4) else if (PIOTimingMode == PIO4)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryRecoveryMode_3; Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryRecoveryMode_3;
}
if (PIOTimingMode <= PIO1) if (PIOTimingMode <= PIO1)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryIORDYSampleMode_0; Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryIORDYSampleMode_0;
}
else if (PIOTimingMode == PIO2) else if (PIOTimingMode == PIO2)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryIORDYSampleMode_1; Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryIORDYSampleMode_1;
}
else if (PIOTimingMode <= PIO4) else if (PIOTimingMode <= PIO4)
{
Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryIORDYSampleMode_2; Device1TimingRegister |= ATAConfiguration_Device1Timing_SecondaryIORDYSampleMode_2;
}
}
break; break;
default: default:
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
}
break; break;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_SecondaryTiming + ATAConfiguration_PCIOffset, ATAConfiguration_ID_SecondaryTiming + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_SecondaryTiming_Size, ATAConfiguration_ID_SecondaryTiming_Size,
&ATATimingRegister &ATATimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_Device1Timing + ATAConfiguration_PCIOffset, ATAConfiguration_ID_Device1Timing + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_Device1Timing_Size, ATAConfiguration_ID_Device1Timing_Size,
&Device1TimingRegister &Device1TimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
goto funcexit; goto funcexit;
funcexit: funcexit:
return funcresult; return funcresult;
} }
static uint static uint ATAHostAdapter_SetPrimaryUDMA(struct pci_dev *pdev, uint DeviceID,
ATAHostAdapter_SetPrimaryUDMA( uint UDMAEnable, uint UDMATimingMode)
struct pci_dev *pdev,
uint DeviceID,
uint UDMAEnable,
uint UDMATimingMode
)
{ {
uint funcresult; uint funcresult;
uint result; uint result;
uint UDMAControlRegister; uint UDMAControlRegister;
uint UDMATimingRegister; uint UDMATimingRegister;
ulong IDEIOConfigurationRegister; ulong IDEIOConfigurationRegister;
funcresult = TRUE; funcresult = TRUE;
UDMAControlRegister = 0; UDMAControlRegister = 0;
UDMATimingRegister = 0; UDMATimingRegister = 0;
IDEIOConfigurationRegister = 0; IDEIOConfigurationRegister = 0;
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_UDMAControl + ATAConfiguration_PCIOffset, ATAConfiguration_ID_UDMAControl + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_UDMAControl_Size, ATAConfiguration_ID_UDMAControl_Size,
&UDMAControlRegister &UDMAControlRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_UDMATiming + ATAConfiguration_PCIOffset, ATAConfiguration_ID_UDMATiming + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_UDMATiming_Size, ATAConfiguration_ID_UDMATiming_Size,
&UDMATimingRegister &UDMATimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset, ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_IDEIOConfiguration_Size, ATAConfiguration_ID_IDEIOConfiguration_Size,
&IDEIOConfigurationRegister &IDEIOConfigurationRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
//Rom Code will determine the device cable type and ATA 100. /*Rom Code will determine the device cable type and ATA 100.*/
//IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_DeviceCable80Report; /*IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_DeviceCable80Report;*/
//IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_ATA100IsSupported; /*IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_ATA100IsSupported;*/
switch(DeviceID) switch (DeviceID) {
{
case 0: case 0:
{
UDMAControlRegister &= ~(ATAConfiguration_UDMAControl_PrimaryDevice0UDMAModeEnable); UDMAControlRegister &= ~(ATAConfiguration_UDMAControl_PrimaryDevice0UDMAModeEnable);
if (UDMAEnable == TRUE) if (UDMAEnable == TRUE)
{
UDMAControlRegister |= ATAConfiguration_UDMAControl_PrimaryDevice0UDMAModeEnable; UDMAControlRegister |= ATAConfiguration_UDMAControl_PrimaryDevice0UDMAModeEnable;
}
IDEIOConfigurationRegister &= ~(ATAConfiguration_IDEIOConfiguration_PrimaryDevice066MhzEnable IDEIOConfigurationRegister &= ~(ATAConfiguration_IDEIOConfiguration_PrimaryDevice066MhzEnable |
| ATAConfiguration_IDEIOConfiguration_PrimaryDevice0100MhzEnable ATAConfiguration_IDEIOConfiguration_PrimaryDevice0100MhzEnable);
);
if (UDMATimingMode >= UDMA5) if (UDMATimingMode >= UDMA5)
{
IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_PrimaryDevice0100MhzEnable; IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_PrimaryDevice0100MhzEnable;
}
else if (UDMATimingMode >= UDMA3) else if (UDMATimingMode >= UDMA3)
{
IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_PrimaryDevice066MhzEnable; IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_PrimaryDevice066MhzEnable;
}
// if 80 cable report
/* if 80 cable report */
UDMATimingRegister &= ~(ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime); UDMATimingRegister &= ~(ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime);
if (UDMATimingMode == UDMA0) if (UDMATimingMode == UDMA0) {
{
UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_0; UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_0;
} } else if (UDMATimingMode == UDMA1 ||
else if (UDMATimingMode == UDMA1 || UDMATimingMode == UDMA3 || UDMATimingMode == UDMA5) UDMATimingMode == UDMA3 ||
{ UDMATimingMode == UDMA5) {
UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_1; UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_1;
} } else if (UDMATimingMode == UDMA2 ||
else if (UDMATimingMode == UDMA2 || UDMATimingMode == UDMA4) UDMATimingMode == UDMA4) {
{
UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_2; UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_2;
} }
}
break; break;
case 1: case 1:
{
UDMAControlRegister &= ~(ATAConfiguration_UDMAControl_PrimaryDevice1UDMAModeEnable); UDMAControlRegister &= ~(ATAConfiguration_UDMAControl_PrimaryDevice1UDMAModeEnable);
if (UDMAEnable == TRUE) if (UDMAEnable == TRUE)
{
UDMAControlRegister |= ATAConfiguration_UDMAControl_PrimaryDevice1UDMAModeEnable; UDMAControlRegister |= ATAConfiguration_UDMAControl_PrimaryDevice1UDMAModeEnable;
}
IDEIOConfigurationRegister &= ~(ATAConfiguration_IDEIOConfiguration_PrimaryDevice166MhzEnable IDEIOConfigurationRegister &= ~(ATAConfiguration_IDEIOConfiguration_PrimaryDevice166MhzEnable |
| ATAConfiguration_IDEIOConfiguration_PrimaryDevice1100MhzEnable ATAConfiguration_IDEIOConfiguration_PrimaryDevice1100MhzEnable);
);
if (UDMATimingMode >= UDMA5) if (UDMATimingMode >= UDMA5)
{
IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_PrimaryDevice1100MhzEnable; IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_PrimaryDevice1100MhzEnable;
}
else if (UDMATimingMode >= UDMA3) else if (UDMATimingMode >= UDMA3)
{
IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_PrimaryDevice166MhzEnable; IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_PrimaryDevice166MhzEnable;
}
// if 80 cable report
/* if 80 cable report */
UDMATimingRegister &= ~(ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime); UDMATimingRegister &= ~(ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime);
if (UDMATimingMode == UDMA0) if (UDMATimingMode == UDMA0) {
{
UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_0; UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_0;
} } else if (UDMATimingMode == UDMA1 ||
else if (UDMATimingMode == UDMA1 || UDMATimingMode == UDMA3 || UDMATimingMode == UDMA5) UDMATimingMode == UDMA3 ||
{ UDMATimingMode == UDMA5) {
UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_1; UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_1;
} } else if (UDMATimingMode == UDMA2 ||
else if (UDMATimingMode == UDMA2 || UDMATimingMode == UDMA4) UDMATimingMode == UDMA4) {
{
UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_2; UDMATimingRegister |= ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_2;
} }
}
break; break;
default: default:
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
}
break; break;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_UDMAControl + ATAConfiguration_PCIOffset, ATAConfiguration_ID_UDMAControl + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_UDMAControl_Size, ATAConfiguration_ID_UDMAControl_Size,
&UDMAControlRegister &UDMAControlRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_UDMATiming + ATAConfiguration_PCIOffset, ATAConfiguration_ID_UDMATiming + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_UDMATiming_Size, ATAConfiguration_ID_UDMATiming_Size,
&UDMATimingRegister &UDMATimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset, ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_IDEIOConfiguration_Size, ATAConfiguration_ID_IDEIOConfiguration_Size,
&IDEIOConfigurationRegister &IDEIOConfigurationRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
goto funcexit; goto funcexit;
funcexit: funcexit:
return funcresult; return funcresult;
} }
static uint static uint ATAHostAdapter_SetSecondaryUDMA(struct pci_dev *pdev, uint DeviceID,
ATAHostAdapter_SetSecondaryUDMA( uint UDMAEnable, uint UDMATimingMode)
struct pci_dev *pdev,
uint DeviceID,
uint UDMAEnable,
uint UDMATimingMode
)
{ {
uint funcresult; uint funcresult;
uint result; uint result;
uint UDMAControlRegister; uint UDMAControlRegister;
uint UDMATimingRegister; uint UDMATimingRegister;
ulong IDEIOConfigurationRegister; ulong IDEIOConfigurationRegister;
...@@ -1232,172 +941,126 @@ ATAHostAdapter_SetSecondaryUDMA( ...@@ -1232,172 +941,126 @@ ATAHostAdapter_SetSecondaryUDMA(
UDMATimingRegister = 0; UDMATimingRegister = 0;
IDEIOConfigurationRegister = 0; IDEIOConfigurationRegister = 0;
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_UDMAControl + ATAConfiguration_PCIOffset, ATAConfiguration_ID_UDMAControl + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_UDMAControl_Size, ATAConfiguration_ID_UDMAControl_Size,
&UDMAControlRegister &UDMAControlRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_UDMATiming + ATAConfiguration_PCIOffset, ATAConfiguration_ID_UDMATiming + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_UDMATiming_Size, ATAConfiguration_ID_UDMATiming_Size,
&UDMATimingRegister &UDMATimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_ReadPCIConfiguration( result = PCIDeviceIO_ReadPCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset, ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_IDEIOConfiguration_Size, ATAConfiguration_ID_IDEIOConfiguration_Size,
&IDEIOConfigurationRegister &IDEIOConfigurationRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
//Rom Code will determine the device cable type and ATA 100. /* Rom Code will determine the device cable type and ATA 100. */
//IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_DeviceCable80Report; /* IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_DeviceCable80Report; */
//IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_ATA100IsSupported; /* IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_ATA100IsSupported; */
switch(DeviceID) switch (DeviceID) {
{
case 0: case 0:
{
UDMAControlRegister &= ~(ATAConfiguration_UDMAControl_SecondaryDevice0UDMAModeEnable); UDMAControlRegister &= ~(ATAConfiguration_UDMAControl_SecondaryDevice0UDMAModeEnable);
if (UDMAEnable == TRUE) if (UDMAEnable == TRUE)
{
UDMAControlRegister |= ATAConfiguration_UDMAControl_SecondaryDevice0UDMAModeEnable; UDMAControlRegister |= ATAConfiguration_UDMAControl_SecondaryDevice0UDMAModeEnable;
}
IDEIOConfigurationRegister &= ~(ATAConfiguration_IDEIOConfiguration_SecondaryDevice066MhzEnable IDEIOConfigurationRegister &= ~(ATAConfiguration_IDEIOConfiguration_SecondaryDevice066MhzEnable |
| ATAConfiguration_IDEIOConfiguration_SecondaryDevice0100MhzEnable ATAConfiguration_IDEIOConfiguration_SecondaryDevice0100MhzEnable);
);
if (UDMATimingMode >= UDMA5) if (UDMATimingMode >= UDMA5)
{
IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_SecondaryDevice0100MhzEnable; IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_SecondaryDevice0100MhzEnable;
}
else if (UDMATimingMode >= UDMA3) else if (UDMATimingMode >= UDMA3)
{
IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_SecondaryDevice066MhzEnable; IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_SecondaryDevice066MhzEnable;
}
// if 80 cable report
/* if 80 cable report */
UDMATimingRegister &= ~(ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime); UDMATimingRegister &= ~(ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime);
if (UDMATimingMode == UDMA0) if (UDMATimingMode == UDMA0) {
{
UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_0; UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_0;
} } else if (UDMATimingMode == UDMA1 ||
else if (UDMATimingMode == UDMA1 || UDMATimingMode == UDMA3 || UDMATimingMode == UDMA5) UDMATimingMode == UDMA3 ||
{ UDMATimingMode == UDMA5) {
UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_1; UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_1;
} } else if (UDMATimingMode == UDMA2 ||
else if (UDMATimingMode == UDMA2 || UDMATimingMode == UDMA4) UDMATimingMode == UDMA4) {
{
UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_2; UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_2;
} }
}
break; break;
case 1: case 1:
{
UDMAControlRegister &= ~(ATAConfiguration_UDMAControl_SecondaryDevice1UDMAModeEnable); UDMAControlRegister &= ~(ATAConfiguration_UDMAControl_SecondaryDevice1UDMAModeEnable);
if (UDMAEnable == TRUE) if (UDMAEnable == TRUE)
{
UDMAControlRegister |= ATAConfiguration_UDMAControl_SecondaryDevice1UDMAModeEnable; UDMAControlRegister |= ATAConfiguration_UDMAControl_SecondaryDevice1UDMAModeEnable;
}
IDEIOConfigurationRegister &= ~(ATAConfiguration_IDEIOConfiguration_SecondaryDevice166MhzEnable IDEIOConfigurationRegister &= ~(ATAConfiguration_IDEIOConfiguration_SecondaryDevice166MhzEnable |
| ATAConfiguration_IDEIOConfiguration_SecondaryDevice1100MhzEnable ATAConfiguration_IDEIOConfiguration_SecondaryDevice1100MhzEnable);
);
if (UDMATimingMode >= UDMA5) if (UDMATimingMode >= UDMA5)
{
IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_SecondaryDevice1100MhzEnable; IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_SecondaryDevice1100MhzEnable;
}
else if (UDMATimingMode >= UDMA3) else if (UDMATimingMode >= UDMA3)
{
IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_SecondaryDevice166MhzEnable; IDEIOConfigurationRegister |= ATAConfiguration_IDEIOConfiguration_SecondaryDevice166MhzEnable;
}
// if 80 cable report
/* if 80 cable report */
UDMATimingRegister &= ~(ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime); UDMATimingRegister &= ~(ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime);
if (UDMATimingMode == UDMA0) if (UDMATimingMode == UDMA0) {
{
UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_0; UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_0;
} } else if (UDMATimingMode == UDMA1 ||
else if (UDMATimingMode == UDMA1 || UDMATimingMode == UDMA3 || UDMATimingMode == UDMA5) UDMATimingMode == UDMA3 ||
{ UDMATimingMode == UDMA5) {
UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_1; UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_1;
} } else if (UDMATimingMode == UDMA2 ||
else if (UDMATimingMode == UDMA2 || UDMATimingMode == UDMA4) UDMATimingMode == UDMA4) {
{
UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_2; UDMATimingRegister |= ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_2;
} }
}
break; break;
default: default:
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
}
break; break;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_UDMAControl + ATAConfiguration_PCIOffset, ATAConfiguration_ID_UDMAControl + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_UDMAControl_Size, ATAConfiguration_ID_UDMAControl_Size,
&UDMAControlRegister &UDMAControlRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_UDMATiming + ATAConfiguration_PCIOffset, ATAConfiguration_ID_UDMATiming + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_UDMATiming_Size, ATAConfiguration_ID_UDMATiming_Size,
&UDMATimingRegister &UDMATimingRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
result = PCIDeviceIO_WritePCIConfiguration( result = PCIDeviceIO_WritePCIConfiguration(pdev,
pdev,
ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset, ATAConfiguration_ID_IDEIOConfiguration + ATAConfiguration_PCIOffset,
ATAConfiguration_ID_IDEIOConfiguration_Size, ATAConfiguration_ID_IDEIOConfiguration_Size,
&IDEIOConfigurationRegister &IDEIOConfigurationRegister);
); if (result == FALSE) {
if (result == FALSE)
{
funcresult = FALSE; funcresult = FALSE;
goto funcexit; goto funcexit;
} }
goto funcexit; goto funcexit;
funcexit: funcexit:
return funcresult; return funcresult;
} }
drivers/staging/pata_rdc/pata_rdc.h
View file @ 482612af
...@@ -9,7 +9,7 @@ ...@@ -9,7 +9,7 @@
#define FALSE 0 #define FALSE 0
#endif #endif
// ATA Configuration Register ID offset address size /* ATA Configuration Register ID offset address size */
#define ATAConfiguration_PCIOffset 0x40 #define ATAConfiguration_PCIOffset 0x40
#define ATAConfiguration_ID_PrimaryTiming 0x00 #define ATAConfiguration_ID_PrimaryTiming 0x00
#define ATAConfiguration_ID_SecondaryTiming 0x02 #define ATAConfiguration_ID_SecondaryTiming 0x02
...@@ -25,25 +25,25 @@ ...@@ -25,25 +25,25 @@
#define ATAConfiguration_ID_UDMATiming_Size 2 #define ATAConfiguration_ID_UDMATiming_Size 2
#define ATAConfiguration_ID_IDEIOConfiguration_Size 4 #define ATAConfiguration_ID_IDEIOConfiguration_Size 4
// ATA Configuration Register bit define /* ATA Configuration Register bit define */
#define ATAConfiguration_PrimaryTiming_Device0FastTimingEnable 0x0001 #define ATAConfiguration_PrimaryTiming_Device0FastTimingEnable 0x0001
#define ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable 0x0002 // PIO 3 or greater #define ATAConfiguration_PrimaryTiming_Device0IORDYSampleModeEnable 0x0002 /* PIO 3 or greater */
#define ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable 0x0004 // PIO 2 or greater #define ATAConfiguration_PrimaryTiming_Device0PrefetchandPostingEnable 0x0004 /* PIO 2 or greater */
#define ATAConfiguration_PrimaryTiming_Device0DMATimingEnable 0x0008 #define ATAConfiguration_PrimaryTiming_Device0DMATimingEnable 0x0008
#define ATAConfiguration_PrimaryTiming_Device1FastTimingEnable 0x0010 #define ATAConfiguration_PrimaryTiming_Device1FastTimingEnable 0x0010
#define ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable 0x0020 // PIO 3 or greater #define ATAConfiguration_PrimaryTiming_Device1IORDYSampleModeEnable 0x0020 /* PIO 3 or greater */
#define ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable 0x0040 // PIO 2 or greater #define ATAConfiguration_PrimaryTiming_Device1PrefetchandPostingEnable 0x0040 /* PIO 2 or greater */
#define ATAConfiguration_PrimaryTiming_Device1DMATimingEnable 0x0080 #define ATAConfiguration_PrimaryTiming_Device1DMATimingEnable 0x0080
#define ATAConfiguration_PrimaryTiming_Device0RecoveryMode 0x0300 #define ATAConfiguration_PrimaryTiming_Device0RecoveryMode 0x0300
#define ATAConfiguration_PrimaryTiming_Device0RecoveryMode_0 0x0000 // PIO 0, PIO 2, MDMA 0 #define ATAConfiguration_PrimaryTiming_Device0RecoveryMode_0 0x0000 /* PIO 0, PIO 2, MDMA 0 */
#define ATAConfiguration_PrimaryTiming_Device0RecoveryMode_1 0x0100 // PIO 3, MDMA 1 #define ATAConfiguration_PrimaryTiming_Device0RecoveryMode_1 0x0100 /* PIO 3, MDMA 1 */
#define ATAConfiguration_PrimaryTiming_Device0RecoveryMode_2 0x0200 // X #define ATAConfiguration_PrimaryTiming_Device0RecoveryMode_2 0x0200 /* X */
#define ATAConfiguration_PrimaryTiming_Device0RecoveryMode_3 0x0300 // PIO 4, MDMA 2 #define ATAConfiguration_PrimaryTiming_Device0RecoveryMode_3 0x0300 /* PIO 4, MDMA 2 */
#define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode 0x3000 #define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode 0x3000
#define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_0 0x0000 // PIO 0 #define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_0 0x0000 /* PIO 0 */
#define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_1 0x1000 // PIO 2, MDMA 0 #define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_1 0x1000 /* PIO 2, MDMA 0 */
#define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_2 0x2000 // PIO 3, PIO 4, MDMA 1, MDMA 2 #define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_2 0x2000 /* PIO 3, PIO 4, MDMA 1, MDMA 2 */
#define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_3 0x3000 // X #define ATAConfiguration_PrimaryTiming_Device0IORDYSampleMode_3 0x3000 /* X */
#define ATAConfiguration_PrimaryTiming_Device1TimingRegisterEnable 0x4000 #define ATAConfiguration_PrimaryTiming_Device1TimingRegisterEnable 0x4000
#define ATAConfiguration_PrimaryTiming_IDEDecodeEnable 0x8000 #define ATAConfiguration_PrimaryTiming_IDEDecodeEnable 0x8000
...@@ -74,61 +74,58 @@ ...@@ -74,61 +74,58 @@
#define ATAConfiguration_UDMAControl_SecondaryDevice1UDMAModeEnable 0x0008 #define ATAConfiguration_UDMAControl_SecondaryDevice1UDMAModeEnable 0x0008
#define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime 0x0003 #define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime 0x0003
#define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_0 0x0000 // UDMA 0 #define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_0 0x0000 /* UDMA 0 */
#define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_1 0x0001 // UDMA 1, UDMA 3, UDMA 5 #define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_1 0x0001 /* UDMA 1, UDMA 3, UDMA 5 */
#define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_2 0x0002 // UDMA 2, UDMA 4 #define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_2 0x0002 /* UDMA 2, UDMA 4 */
#define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_3 0x0003 // X #define ATAConfiguration_UDMATiming_PrimaryDevice0CycleTime_3 0x0003 /* X */
#define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime 0x0030 #define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime 0x0030
#define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_0 0x0000 // UDMA 0 #define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_0 0x0000 /* UDMA 0 */
#define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_1 0x0010 // UDMA 1, UDMA 3, UDMA 5 #define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_1 0x0010 /* UDMA 1, UDMA 3, UDMA 5 */
#define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_2 0x0020 // UDMA 2, UDMA 4 #define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_2 0x0020 /* UDMA 2, UDMA 4 */
#define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_3 0x0030 // X #define ATAConfiguration_UDMATiming_PrimaryDevice1CycleTime_3 0x0030 /* X */
#define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime 0x0300 #define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime 0x0300
#define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_0 0x0000 // UDMA 0 #define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_0 0x0000 /* UDMA 0 */
#define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_1 0x0100 // UDMA 1, UDMA 3, UDMA 5 #define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_1 0x0100 /* UDMA 1, UDMA 3, UDMA 5 */
#define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_2 0x0200 // UDMA 2, UDMA 4 #define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_2 0x0200 /* UDMA 2, UDMA 4 */
#define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_3 0x0300 // X #define ATAConfiguration_UDMATiming_SecondaryDevice0CycleTime_3 0x0300 /* X */
#define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime 0x3000 #define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime 0x3000
#define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_0 0x0000 // UDMA 0 #define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_0 0x0000 /* UDMA 0 */
#define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_1 0x1000 // UDMA 1, UDMA 3, UDMA 5 #define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_1 0x1000 /* UDMA 1, UDMA 3, UDMA 5 */
#define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_2 0x2000 // UDMA 2, UDMA 4 #define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_2 0x2000 /* UDMA 2, UDMA 4 */
#define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_3 0x3000 // X #define ATAConfiguration_UDMATiming_SecondaryDevice1CycleTime_3 0x3000 /* X */
#define ATAConfiguration_IDEIOConfiguration_PrimaryDevice066MhzEnable 0x00000001 // UDMA 3, UDMA 4 #define ATAConfiguration_IDEIOConfiguration_PrimaryDevice066MhzEnable 0x00000001 /* UDMA 3, UDMA 4 */
#define ATAConfiguration_IDEIOConfiguration_PrimaryDevice166MhzEnable 0x00000002 #define ATAConfiguration_IDEIOConfiguration_PrimaryDevice166MhzEnable 0x00000002
#define ATAConfiguration_IDEIOConfiguration_SecondaryDevice066MhzEnable 0x00000004 #define ATAConfiguration_IDEIOConfiguration_SecondaryDevice066MhzEnable 0x00000004
#define ATAConfiguration_IDEIOConfiguration_SecondaryDevice166MhzEnable 0x00000008 #define ATAConfiguration_IDEIOConfiguration_SecondaryDevice166MhzEnable 0x00000008
#define ATAConfiguration_IDEIOConfiguration_DeviceCable80Report 0x000000F0 #define ATAConfiguration_IDEIOConfiguration_DeviceCable80Report 0x000000F0
#define ATAConfiguration_IDEIOConfiguration_PrimaryDeviceCable80Report 0x00000030 #define ATAConfiguration_IDEIOConfiguration_PrimaryDeviceCable80Report 0x00000030
#define ATAConfiguration_IDEIOConfiguration_PrimaryDevice0Cable80Report 0x00000010 // UDMA 3, UDMA 4, UDMA 5 #define ATAConfiguration_IDEIOConfiguration_PrimaryDevice0Cable80Report 0x00000010 /* UDMA 3, UDMA 4, UDMA 5 */
#define ATAConfiguration_IDEIOConfiguration_PrimaryDevice1Cable80Report 0x00000020 #define ATAConfiguration_IDEIOConfiguration_PrimaryDevice1Cable80Report 0x00000020
#define ATAConfiguration_IDEIOConfiguration_SecondaryDeviceCable80Report 0x000000C0 #define ATAConfiguration_IDEIOConfiguration_SecondaryDeviceCable80Report 0x000000C0
#define ATAConfiguration_IDEIOConfiguration_SecondaryDevice0Cable80Report 0x00000040 #define ATAConfiguration_IDEIOConfiguration_SecondaryDevice0Cable80Report 0x00000040
#define ATAConfiguration_IDEIOConfiguration_SecondaryDevice1Cable80Report 0x00000080 #define ATAConfiguration_IDEIOConfiguration_SecondaryDevice1Cable80Report 0x00000080
#define ATAConfiguration_IDEIOConfiguration_PrimaryDevice0100MhzEnable 0x00001000 // UDMA 5 #define ATAConfiguration_IDEIOConfiguration_PrimaryDevice0100MhzEnable 0x00001000 /* UDMA 5 */
#define ATAConfiguration_IDEIOConfiguration_PrimaryDevice1100MhzEnable 0x00002000 #define ATAConfiguration_IDEIOConfiguration_PrimaryDevice1100MhzEnable 0x00002000
#define ATAConfiguration_IDEIOConfiguration_SecondaryDevice0100MhzEnable 0x00004000 #define ATAConfiguration_IDEIOConfiguration_SecondaryDevice0100MhzEnable 0x00004000
#define ATAConfiguration_IDEIOConfiguration_SecondaryDevice1100MhzEnable 0x00008000 #define ATAConfiguration_IDEIOConfiguration_SecondaryDevice1100MhzEnable 0x00008000
#define ATAConfiguration_IDEIOConfiguration_ATA100IsSupported 0x00F00000 #define ATAConfiguration_IDEIOConfiguration_ATA100IsSupported 0x00F00000
enum _PIOTimingMode enum _PIOTimingMode {
{
PIO0 = 0, PIO0 = 0,
PIO1, PIO1,
PIO2, // MDMA 0 PIO2, /* MDMA 0 */
PIO3, // MDMA 1 PIO3, /* MDMA 1 */
PIO4 // MDMA 2 PIO4 /* MDMA 2 */
}; };
enum _DMATimingMode enum _DMATimingMode {
{
MDMA0 = 0, MDMA0 = 0,
MDMA1, MDMA1,
MDMA2 MDMA2
}; };
enum _UDMATimingMode enum _UDMATimingMode {
{
UDMA0 = 0, UDMA0 = 0,
UDMA1, UDMA1,
UDMA2, UDMA2,
...@@ -144,94 +141,34 @@ enum rdc_controller_ids { ...@@ -144,94 +141,34 @@ enum rdc_controller_ids {
RDC_17F31012 RDC_17F31012
}; };
// callback function for driver /* callback function for driver */
static int rdc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static int __devinit rdc_init_one(
struct pci_dev *pdev, /* callback function for ata_port */
const struct pci_device_id *ent static int rdc_pata_port_start(struct ata_port *ap);
);
static void rdc_pata_port_stop(struct ata_port *ap);
// callback function for ata_port
static int rdc_pata_prereset(struct ata_link *link, unsigned long deadline);
static int rdc_pata_port_start(
struct ata_port *ap static int rdc_pata_cable_detect(struct ata_port *ap);
);
static void rdc_pata_set_piomode(struct ata_port *ap, struct ata_device *adev);
static void rdc_pata_port_stop(
struct ata_port *ap static void rdc_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev);
);
/* modified PCIDeviceIO code. */
static int rdc_pata_prereset( static uint PCIDeviceIO_ReadPCIConfiguration(struct pci_dev *pdev, uint Offset, uint Length, void *pBuffer);
struct ata_link *link,
unsigned long deadline static uint PCIDeviceIO_WritePCIConfiguration(struct pci_dev *pdev, uint Offset, uint Length, void *pBuffer);
);
/* modify ATAHostAdapter code */
static int rdc_pata_cable_detect( static uint ATAHostAdapter_SetPrimaryPIO(struct pci_dev *pdev, uint DeviceID, uint PIOTimingMode, uint DMAEnable, uint PrefetchPostingEnable);
struct ata_port *ap
); static uint ATAHostAdapter_SetSecondaryPIO(struct pci_dev *pdev, uint DeviceID, uint PIOTimingMode, uint DMAEnable, uint PrefetchPostingEnable);
static void rdc_pata_set_piomode( static uint ATAHostAdapter_SetPrimaryUDMA(struct pci_dev *pdev, uint DeviceID, uint UDMAEnable, uint UDMATimingMode);
struct ata_port *ap,
struct ata_device *adev static uint ATAHostAdapter_SetSecondaryUDMA(struct pci_dev *pdev, uint DeviceID, uint UDMAEnable, uint UDMATimingMode);
);
static void rdc_pata_set_dmamode(
struct ata_port *ap,
struct ata_device *adev
);
// modified PCIDeviceIO code.
static uint
PCIDeviceIO_ReadPCIConfiguration(
struct pci_dev *pdev,
uint Offset,
uint Length,
void* pBuffer
);
static uint
PCIDeviceIO_WritePCIConfiguration(
struct pci_dev *pdev,
uint Offset,
uint Length,
void* pBuffer
);
// modify ATAHostAdapter code
static uint
ATAHostAdapter_SetPrimaryPIO(
struct pci_dev *pdev,
uint DeviceID,
uint PIOTimingMode,
uint DMAEnable,
uint PrefetchPostingEnable
);
static uint
ATAHostAdapter_SetSecondaryPIO(
struct pci_dev *pdev,
uint DeviceID,
uint PIOTimingMode,
uint DMAEnable,
uint PrefetchPostingEnable
);
static uint
ATAHostAdapter_SetPrimaryUDMA(
struct pci_dev *pdev,
uint DeviceID,
uint UDMAEnable,
uint UDMATimingMode
);
static uint
ATAHostAdapter_SetSecondaryUDMA(
struct pci_dev *pdev,
uint DeviceID,
uint UDMAEnable,
uint UDMATimingMode
);
#endif #endif
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