UBUNTU: (fix) NVMe: restore code to always use MSI/MSI-x interrupts

BugLink: http://bugs.launchpad.net/bugs/1647887

Commit 90c9712f ("NVMe: Always use MSI/MSI-x
interrupts") changed the NVMe driver to always use MSI/MSI-x interrupts.
However, later commit 30d6592f ("NVMe: Don't
unmap controller registers on reset") as well as commit
e9820e41 ("UBUNTU: (fix) NVMe: Don't unmap
controller registers on reset") accidentally reverted part of the original
commit, which reverted the NVMe driver to using GSI interrupts instead of
always using MSI/MSI-x interrupts.

This un-reverts the accidental reversion, to restore the NVMe driver to
always use MSI/MSI-x interrupts.
Signed-off-by: Dan Streetman <dan.streetman@canonical.com>
Acked-by: Thadeu Lima de Souza Cascardo <thadeu.cascardo@canonical.com>
Acked-by: Seth Forshee <seth.forshee@canonical.com>
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>

drivers/nvme/host/pci.c

@@ -1846,7 +1846,6 @@ static int nvme_pci_enable(struct nvme_dev *dev)
 	if (pci_enable_device_mem(pdev))
 		return result;
 
-	dev->entry[0].vector = pdev->irq;
 	pci_set_master(pdev);
 
 	if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
@@ -1859,16 +1858,22 @@ static int nvme_pci_enable(struct nvme_dev *dev)
 	}
 
 	/*
-	 * Some devices don't advertse INTx interrupts, pre-enable a single
-	 * MSIX vec for setup. We'll adjust this later.
+	 * Some devices and/or platforms don't advertise or work with INTx
+	 * interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll
+	 * adjust this later.
 	 */
-	if (!pdev->irq) {
-		result = pci_enable_msix(pdev, dev->entry, 1);
-		if (result < 0)
-			goto disable;
+	if (pci_enable_msix(pdev, dev->entry, 1)) {
+		pci_enable_msi(pdev);
+		dev->entry[0].vector = pdev->irq;
+	}
+
+	if (!dev->entry[0].vector) {
+		result = -ENODEV;
+		goto disable;
 	}
 
 	cap = lo_hi_readq(dev->bar + NVME_REG_CAP);
+
 	dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
 	dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
 	dev->dbs = dev->bar + 4096;