Commit 48aa820f authored by Rob Herring's avatar Rob Herring Committed by Marek Szyprowski

ARM: kill off arch_is_coherent

With ixp2xxx removed, there are no platforms that define arch_is_coherent,
so the last occurrences of arch_is_coherent can be removed. Any new
platform with coherent i/o should use coherent dma mapping functions.
Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
parent 0fa478df
...@@ -44,10 +44,9 @@ ...@@ -44,10 +44,9 @@
#define rmb() dsb() #define rmb() dsb()
#define wmb() mb() #define wmb() mb()
#else #else
#include <asm/memory.h> #define mb() barrier()
#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) #define rmb() barrier()
#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) #define wmb() barrier()
#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
#endif #endif
#ifndef CONFIG_SMP #ifndef CONFIG_SMP
......
...@@ -275,14 +275,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x) ...@@ -275,14 +275,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) #define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
/*
* Optional coherency support. Currently used only by selected
* Intel XSC3-based systems.
*/
#ifndef arch_is_coherent
#define arch_is_coherent() 0
#endif
#endif #endif
#include <asm-generic/memory_model.h> #include <asm-generic/memory_model.h>
......
...@@ -216,7 +216,7 @@ static struct mem_type mem_types[] = { ...@@ -216,7 +216,7 @@ static struct mem_type mem_types[] = {
.prot_l1 = PMD_TYPE_TABLE, .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB, .prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB,
.domain = DOMAIN_IO, .domain = DOMAIN_IO,
}, },
[MT_DEVICE_WC] = { /* ioremap_wc */ [MT_DEVICE_WC] = { /* ioremap_wc */
.prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC, .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC,
.prot_l1 = PMD_TYPE_TABLE, .prot_l1 = PMD_TYPE_TABLE,
...@@ -421,17 +421,6 @@ static void __init build_mem_type_table(void) ...@@ -421,17 +421,6 @@ static void __init build_mem_type_table(void)
cp = &cache_policies[cachepolicy]; cp = &cache_policies[cachepolicy];
vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
/*
* Enable CPU-specific coherency if supported.
* (Only available on XSC3 at the moment.)
*/
if (arch_is_coherent() && cpu_is_xsc3()) {
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
}
/* /*
* ARMv6 and above have extended page tables. * ARMv6 and above have extended page tables.
*/ */
...@@ -777,8 +766,8 @@ void __init iotable_init(struct map_desc *io_desc, int nr) ...@@ -777,8 +766,8 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
create_mapping(md); create_mapping(md);
vm->addr = (void *)(md->virtual & PAGE_MASK); vm->addr = (void *)(md->virtual & PAGE_MASK);
vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
vm->phys_addr = __pfn_to_phys(md->pfn); vm->phys_addr = __pfn_to_phys(md->pfn);
vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
vm->flags |= VM_ARM_MTYPE(md->type); vm->flags |= VM_ARM_MTYPE(md->type);
vm->caller = iotable_init; vm->caller = iotable_init;
vm_area_add_early(vm++); vm_area_add_early(vm++);
......
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