Commit 494d8a2c authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard

arm64: allwinner: a64: Convert CCU raw number references to macros

The A64 device tree file has some remnants of raw number references
to the CCU node, likely from when the CCU bindings and device tree
changes were first merged.

Convert these, and the R_CCU ones, to use the proper defined macros
from their respective device tree binding header files.
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent 2273aa16
...@@ -43,6 +43,7 @@ ...@@ -43,6 +43,7 @@
*/ */
#include <dt-bindings/clock/sun50i-a64-ccu.h> #include <dt-bindings/clock/sun50i-a64-ccu.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h> #include <dt-bindings/reset/sun50i-a64-ccu.h>
...@@ -345,8 +346,8 @@ uart0: serial@1c28000 { ...@@ -345,8 +346,8 @@ uart0: serial@1c28000 {
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu 67>; clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu 46>; resets = <&ccu RST_BUS_UART0>;
status = "disabled"; status = "disabled";
}; };
...@@ -356,8 +357,8 @@ uart1: serial@1c28400 { ...@@ -356,8 +357,8 @@ uart1: serial@1c28400 {
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu 68>; clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu 47>; resets = <&ccu RST_BUS_UART1>;
status = "disabled"; status = "disabled";
}; };
...@@ -367,8 +368,8 @@ uart2: serial@1c28800 { ...@@ -367,8 +368,8 @@ uart2: serial@1c28800 {
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu 69>; clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu 48>; resets = <&ccu RST_BUS_UART2>;
status = "disabled"; status = "disabled";
}; };
...@@ -378,8 +379,8 @@ uart3: serial@1c28c00 { ...@@ -378,8 +379,8 @@ uart3: serial@1c28c00 {
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu 70>; clocks = <&ccu CLK_BUS_UART3>;
resets = <&ccu 49>; resets = <&ccu RST_BUS_UART3>;
status = "disabled"; status = "disabled";
}; };
...@@ -389,8 +390,8 @@ uart4: serial@1c29000 { ...@@ -389,8 +390,8 @@ uart4: serial@1c29000 {
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu 71>; clocks = <&ccu CLK_BUS_UART4>;
resets = <&ccu 50>; resets = <&ccu RST_BUS_UART4>;
status = "disabled"; status = "disabled";
}; };
...@@ -398,8 +399,8 @@ i2c0: i2c@1c2ac00 { ...@@ -398,8 +399,8 @@ i2c0: i2c@1c2ac00 {
compatible = "allwinner,sun6i-a31-i2c"; compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2ac00 0x400>; reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu 63>; clocks = <&ccu CLK_BUS_I2C0>;
resets = <&ccu 42>; resets = <&ccu RST_BUS_I2C0>;
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -409,8 +410,8 @@ i2c1: i2c@1c2b000 { ...@@ -409,8 +410,8 @@ i2c1: i2c@1c2b000 {
compatible = "allwinner,sun6i-a31-i2c"; compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x400>; reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu 64>; clocks = <&ccu CLK_BUS_I2C1>;
resets = <&ccu 43>; resets = <&ccu RST_BUS_I2C1>;
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -420,8 +421,8 @@ i2c2: i2c@1c2b400 { ...@@ -420,8 +421,8 @@ i2c2: i2c@1c2b400 {
compatible = "allwinner,sun6i-a31-i2c"; compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b400 0x400>; reg = <0x01c2b400 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu 65>; clocks = <&ccu CLK_BUS_I2C2>;
resets = <&ccu 44>; resets = <&ccu RST_BUS_I2C2>;
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -458,7 +459,7 @@ r_pio: pinctrl@01f02c00 { ...@@ -458,7 +459,7 @@ r_pio: pinctrl@01f02c00 {
compatible = "allwinner,sun50i-a64-r-pinctrl"; compatible = "allwinner,sun50i-a64-r-pinctrl";
reg = <0x01f02c00 0x400>; reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>; clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc"; clock-names = "apb", "hosc", "losc";
gpio-controller; gpio-controller;
#gpio-cells = <3>; #gpio-cells = <3>;
......
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