Commit 496543c4 authored by Max Filippov's avatar Max Filippov Committed by Chris Zankel

xtensa: enable HAVE_IRQ_TIME_ACCOUNTING

Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
Signed-off-by: default avatarChris Zankel <chris@zankel.net>
parent 01e3b3cb
...@@ -19,6 +19,7 @@ config XTENSA ...@@ -19,6 +19,7 @@ config XTENSA
select IRQ_DOMAIN select IRQ_DOMAIN
select HAVE_OPROFILE select HAVE_OPROFILE
select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_TRACER
select HAVE_IRQ_TIME_ACCOUNTING
help help
Xtensa processors are 32-bit RISC machines designed by Tensilica Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both primarily for embedded systems. These processors are both
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