Commit 497e8592 authored by Jiri Pirko's avatar Jiri Pirko Committed by David S. Miller

mlxsw: reg: Share direction enum between SBPR, SBCM, SBPM

Same field, same values, so share the same enum.
Signed-off-by: default avatarJiri Pirko <jiri@mellanox.com>
Reviewed-by: default avatarIdo Schimmel <idosch@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b2f10571
...@@ -3476,9 +3476,10 @@ static const struct mlxsw_reg_info mlxsw_reg_sbpr = { ...@@ -3476,9 +3476,10 @@ static const struct mlxsw_reg_info mlxsw_reg_sbpr = {
.len = MLXSW_REG_SBPR_LEN, .len = MLXSW_REG_SBPR_LEN,
}; };
enum mlxsw_reg_sbpr_dir { /* shared direstion enum for SBPR, SBCM, SBPM */
MLXSW_REG_SBPR_DIR_INGRESS, enum mlxsw_reg_sbxx_dir {
MLXSW_REG_SBPR_DIR_EGRESS, MLXSW_REG_SBXX_DIR_INGRESS,
MLXSW_REG_SBXX_DIR_EGRESS,
}; };
/* reg_sbpr_dir /* reg_sbpr_dir
...@@ -3511,7 +3512,7 @@ enum mlxsw_reg_sbpr_mode { ...@@ -3511,7 +3512,7 @@ enum mlxsw_reg_sbpr_mode {
MLXSW_ITEM32(reg, sbpr, mode, 0x08, 0, 4); MLXSW_ITEM32(reg, sbpr, mode, 0x08, 0, 4);
static inline void mlxsw_reg_sbpr_pack(char *payload, u8 pool, static inline void mlxsw_reg_sbpr_pack(char *payload, u8 pool,
enum mlxsw_reg_sbpr_dir dir, enum mlxsw_reg_sbxx_dir dir,
enum mlxsw_reg_sbpr_mode mode, u32 size) enum mlxsw_reg_sbpr_mode mode, u32 size)
{ {
MLXSW_REG_ZERO(sbpr, payload); MLXSW_REG_ZERO(sbpr, payload);
...@@ -3553,11 +3554,6 @@ MLXSW_ITEM32(reg, sbcm, local_port, 0x00, 16, 8); ...@@ -3553,11 +3554,6 @@ MLXSW_ITEM32(reg, sbcm, local_port, 0x00, 16, 8);
*/ */
MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6); MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6);
enum mlxsw_reg_sbcm_dir {
MLXSW_REG_SBCM_DIR_INGRESS,
MLXSW_REG_SBCM_DIR_EGRESS,
};
/* reg_sbcm_dir /* reg_sbcm_dir
* Direction. * Direction.
* Access: Index * Access: Index
...@@ -3590,7 +3586,7 @@ MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24); ...@@ -3590,7 +3586,7 @@ MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24);
MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4); MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4);
static inline void mlxsw_reg_sbcm_pack(char *payload, u8 local_port, u8 pg_buff, static inline void mlxsw_reg_sbcm_pack(char *payload, u8 local_port, u8 pg_buff,
enum mlxsw_reg_sbcm_dir dir, enum mlxsw_reg_sbxx_dir dir,
u32 min_buff, u32 max_buff, u8 pool) u32 min_buff, u32 max_buff, u8 pool)
{ {
MLXSW_REG_ZERO(sbcm, payload); MLXSW_REG_ZERO(sbcm, payload);
...@@ -3630,11 +3626,6 @@ MLXSW_ITEM32(reg, sbpm, local_port, 0x00, 16, 8); ...@@ -3630,11 +3626,6 @@ MLXSW_ITEM32(reg, sbpm, local_port, 0x00, 16, 8);
*/ */
MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4); MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4);
enum mlxsw_reg_sbpm_dir {
MLXSW_REG_SBPM_DIR_INGRESS,
MLXSW_REG_SBPM_DIR_EGRESS,
};
/* reg_sbpm_dir /* reg_sbpm_dir
* Direction. * Direction.
* Access: Index * Access: Index
...@@ -3661,7 +3652,7 @@ MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24); ...@@ -3661,7 +3652,7 @@ MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24);
MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24); MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24);
static inline void mlxsw_reg_sbpm_pack(char *payload, u8 local_port, u8 pool, static inline void mlxsw_reg_sbpm_pack(char *payload, u8 local_port, u8 pool,
enum mlxsw_reg_sbpm_dir dir, enum mlxsw_reg_sbxx_dir dir,
u32 min_buff, u32 max_buff) u32 min_buff, u32 max_buff)
{ {
MLXSW_REG_ZERO(sbpm, payload); MLXSW_REG_ZERO(sbpm, payload);
......
...@@ -110,7 +110,7 @@ static int mlxsw_sp_port_headroom_init(struct mlxsw_sp_port *mlxsw_sp_port) ...@@ -110,7 +110,7 @@ static int mlxsw_sp_port_headroom_init(struct mlxsw_sp_port *mlxsw_sp_port)
struct mlxsw_sp_sb_pool { struct mlxsw_sp_sb_pool {
u8 pool; u8 pool;
enum mlxsw_reg_sbpr_dir dir; enum mlxsw_reg_sbxx_dir dir;
enum mlxsw_reg_sbpr_mode mode; enum mlxsw_reg_sbpr_mode mode;
u32 size; u32 size;
}; };
...@@ -129,11 +129,11 @@ struct mlxsw_sp_sb_pool { ...@@ -129,11 +129,11 @@ struct mlxsw_sp_sb_pool {
} }
#define MLXSW_SP_SB_POOL_INGRESS(_pool, _size) \ #define MLXSW_SP_SB_POOL_INGRESS(_pool, _size) \
MLXSW_SP_SB_POOL(_pool, MLXSW_REG_SBPR_DIR_INGRESS, \ MLXSW_SP_SB_POOL(_pool, MLXSW_REG_SBXX_DIR_INGRESS, \
MLXSW_REG_SBPR_MODE_DYNAMIC, _size) MLXSW_REG_SBPR_MODE_DYNAMIC, _size)
#define MLXSW_SP_SB_POOL_EGRESS(_pool, _size) \ #define MLXSW_SP_SB_POOL_EGRESS(_pool, _size) \
MLXSW_SP_SB_POOL(_pool, MLXSW_REG_SBPR_DIR_EGRESS, \ MLXSW_SP_SB_POOL(_pool, MLXSW_REG_SBXX_DIR_EGRESS, \
MLXSW_REG_SBPR_MODE_DYNAMIC, _size) MLXSW_REG_SBPR_MODE_DYNAMIC, _size)
static const struct mlxsw_sp_sb_pool mlxsw_sp_sb_pools[] = { static const struct mlxsw_sp_sb_pool mlxsw_sp_sb_pools[] = {
...@@ -173,7 +173,7 @@ struct mlxsw_sp_sb_cm { ...@@ -173,7 +173,7 @@ struct mlxsw_sp_sb_cm {
u8 pg; u8 pg;
u8 tc; u8 tc;
} u; } u;
enum mlxsw_reg_sbcm_dir dir; enum mlxsw_reg_sbxx_dir dir;
u32 min_buff; u32 min_buff;
u32 max_buff; u32 max_buff;
u8 pool; u8 pool;
...@@ -189,15 +189,15 @@ struct mlxsw_sp_sb_cm { ...@@ -189,15 +189,15 @@ struct mlxsw_sp_sb_cm {
} }
#define MLXSW_SP_SB_CM_INGRESS(_pg, _min_buff, _max_buff) \ #define MLXSW_SP_SB_CM_INGRESS(_pg, _min_buff, _max_buff) \
MLXSW_SP_SB_CM(_pg, MLXSW_REG_SBCM_DIR_INGRESS, \ MLXSW_SP_SB_CM(_pg, MLXSW_REG_SBXX_DIR_INGRESS, \
_min_buff, _max_buff, 0) _min_buff, _max_buff, 0)
#define MLXSW_SP_SB_CM_EGRESS(_tc, _min_buff, _max_buff) \ #define MLXSW_SP_SB_CM_EGRESS(_tc, _min_buff, _max_buff) \
MLXSW_SP_SB_CM(_tc, MLXSW_REG_SBCM_DIR_EGRESS, \ MLXSW_SP_SB_CM(_tc, MLXSW_REG_SBXX_DIR_EGRESS, \
_min_buff, _max_buff, 0) _min_buff, _max_buff, 0)
#define MLXSW_SP_CPU_PORT_SB_CM_EGRESS(_tc) \ #define MLXSW_SP_CPU_PORT_SB_CM_EGRESS(_tc) \
MLXSW_SP_SB_CM(_tc, MLXSW_REG_SBCM_DIR_EGRESS, 104, 2, 3) MLXSW_SP_SB_CM(_tc, MLXSW_REG_SBXX_DIR_EGRESS, 104, 2, 3)
static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms[] = { static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms[] = {
MLXSW_SP_SB_CM_INGRESS(0, MLXSW_SP_BYTES_TO_CELLS(10000), 8), MLXSW_SP_SB_CM_INGRESS(0, MLXSW_SP_BYTES_TO_CELLS(10000), 8),
...@@ -304,7 +304,7 @@ static int mlxsw_sp_cpu_port_sb_cms_init(struct mlxsw_sp *mlxsw_sp) ...@@ -304,7 +304,7 @@ static int mlxsw_sp_cpu_port_sb_cms_init(struct mlxsw_sp *mlxsw_sp)
struct mlxsw_sp_sb_pm { struct mlxsw_sp_sb_pm {
u8 pool; u8 pool;
enum mlxsw_reg_sbpm_dir dir; enum mlxsw_reg_sbxx_dir dir;
u32 min_buff; u32 min_buff;
u32 max_buff; u32 max_buff;
}; };
...@@ -318,11 +318,11 @@ struct mlxsw_sp_sb_pm { ...@@ -318,11 +318,11 @@ struct mlxsw_sp_sb_pm {
} }
#define MLXSW_SP_SB_PM_INGRESS(_pool, _min_buff, _max_buff) \ #define MLXSW_SP_SB_PM_INGRESS(_pool, _min_buff, _max_buff) \
MLXSW_SP_SB_PM(_pool, MLXSW_REG_SBPM_DIR_INGRESS, \ MLXSW_SP_SB_PM(_pool, MLXSW_REG_SBXX_DIR_INGRESS, \
_min_buff, _max_buff) _min_buff, _max_buff)
#define MLXSW_SP_SB_PM_EGRESS(_pool, _min_buff, _max_buff) \ #define MLXSW_SP_SB_PM_EGRESS(_pool, _min_buff, _max_buff) \
MLXSW_SP_SB_PM(_pool, MLXSW_REG_SBPM_DIR_EGRESS, \ MLXSW_SP_SB_PM(_pool, MLXSW_REG_SBXX_DIR_EGRESS, \
_min_buff, _max_buff) _min_buff, _max_buff)
static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms[] = { static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms[] = {
......
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