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Commit 49f9df5b authored by David S. Miller's avatar David S. Miller
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Merge branch 'bnxt_en-fw-messages' 

Michael Chan says:

====================
bnxt_en: Implement new driver APIs to send FW messages

The current driver APIs to send messages to the firmware allow only one
outstanding message in flight.  There is only one buffer for the firmware
response for each firmware channel.  To send a firmware message, all
callers must take a mutex and it is released after the firmware response
has been read.  This scheme does not allow multiple firmware messages
in flight.  Firmware may take a long time to respond to some messages
(e.g. NVRAM related ones) and this causes the mutex to be held for
a long time, blocking other callers.

This patchset intoduces the new driver APIs to address the above
shortcomings.  The new APIs are compatible with new and old firmware.
But the new deferred firmware response mechanism will require newer
firmware in order to allow multiple outstanding firmware commands.

All callers are updated to use the new APIs.

v2: Patch 4 and patch 9 updated to fix issues reported by test robot
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents eaf2aaec 68f684e2
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drivers/net/ethernet/broadcom/bnxt/Makefile
View file @ 49f9df5b
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_BNXT) += bnxt_en.o
bnxt_en-y := bnxt.o bnxt_sriov.o bnxt_ethtool.o bnxt_dcb.o bnxt_ulp.o bnxt_xdp.o bnxt_ptp.o bnxt_vfr.o bnxt_devlink.o bnxt_dim.o
bnxt_en-y := bnxt.o bnxt_hwrm.o bnxt_sriov.o bnxt_ethtool.o bnxt_dcb.o bnxt_ulp.o bnxt_xdp.o bnxt_ptp.o bnxt_vfr.o bnxt_devlink.o bnxt_dim.o
bnxt_en-$(CONFIG_BNXT_FLOWER_OFFLOAD) += bnxt_tc.o
bnxt_en-$(CONFIG_DEBUG_FS) += bnxt_debugfs.o
drivers/net/ethernet/broadcom/bnxt/bnxt.c
View file @ 49f9df5b
This source diff could not be displayed because it is too large. You can view the blob instead.
drivers/net/ethernet/broadcom/bnxt/bnxt.h
View file @ 49f9df5b
......@@ -669,37 +669,7 @@ struct nqe_cn {
#define RING_CMP(idx) ((idx) & bp->cp_ring_mask)
#define NEXT_CMP(idx) RING_CMP(ADV_RAW_CMP(idx, 1))
#define BNXT_HWRM_MAX_REQ_LEN (bp->hwrm_max_req_len)
#define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input)
#define DFLT_HWRM_CMD_TIMEOUT 500
#define HWRM_CMD_MAX_TIMEOUT 40000
#define SHORT_HWRM_CMD_TIMEOUT 20
#define HWRM_CMD_TIMEOUT (bp->hwrm_cmd_timeout)
#define HWRM_RESET_TIMEOUT ((HWRM_CMD_TIMEOUT) * 4)
#define HWRM_COREDUMP_TIMEOUT ((HWRM_CMD_TIMEOUT) * 12)
#define BNXT_HWRM_REQ_MAX_SIZE 128
#define BNXT_HWRM_REQS_PER_PAGE (BNXT_PAGE_SIZE / \
BNXT_HWRM_REQ_MAX_SIZE)
#define HWRM_SHORT_MIN_TIMEOUT 3
#define HWRM_SHORT_MAX_TIMEOUT 10
#define HWRM_SHORT_TIMEOUT_COUNTER 5
#define HWRM_MIN_TIMEOUT 25
#define HWRM_MAX_TIMEOUT 40
#define HWRM_WAIT_MUST_ABORT(bp, req) \
(le16_to_cpu((req)->req_type) != HWRM_VER_GET && \
!bnxt_is_fw_healthy(bp))
#define HWRM_TOTAL_TIMEOUT(n) (((n) <= HWRM_SHORT_TIMEOUT_COUNTER) ? \
((n) * HWRM_SHORT_MIN_TIMEOUT) : \
(HWRM_SHORT_TIMEOUT_COUNTER * HWRM_SHORT_MIN_TIMEOUT + \
((n) - HWRM_SHORT_TIMEOUT_COUNTER) * HWRM_MIN_TIMEOUT))
#define HWRM_VALID_BIT_DELAY_USEC 150
#define BNXT_HWRM_CHNL_CHIMP 0
#define BNXT_HWRM_CHNL_KONG 1
#define BNXT_RX_EVENT 1
#define BNXT_AGG_EVENT 2
......@@ -1910,13 +1880,8 @@ struct bnxt {
u32 hwrm_spec_code;
u16 hwrm_cmd_seq;
u16 hwrm_cmd_kong_seq;
u16 hwrm_intr_seq_id;
void *hwrm_short_cmd_req_addr;
dma_addr_t hwrm_short_cmd_req_dma_addr;
void *hwrm_cmd_resp_addr;
dma_addr_t hwrm_cmd_resp_dma_addr;
void *hwrm_cmd_kong_resp_addr;
dma_addr_t hwrm_cmd_kong_resp_dma_addr;
struct dma_pool *hwrm_dma_pool;
struct hlist_head hwrm_pending_list;
struct rtnl_link_stats64 net_stats_prev;
struct bnxt_stats_mem port_stats;
......@@ -2016,7 +1981,7 @@ struct bnxt {
struct mutex sriov_lock;
#endif
#if BITS_PER_LONG == 32
#ifndef writeq
/* ensure atomic 64-bit doorbell writes on 32-bit systems. */
spinlock_t db_lock;
#endif
......@@ -2145,7 +2110,7 @@ static inline u32 bnxt_tx_avail(struct bnxt *bp, struct bnxt_tx_ring_info *txr)
((txr->tx_prod - txr->tx_cons) & bp->tx_ring_mask);
}
#if BITS_PER_LONG == 32
#ifndef writeq
#define writeq(val64, db) \
do { \
spin_lock(&bp->db_lock); \
......@@ -2187,63 +2152,6 @@ static inline void bnxt_db_write(struct bnxt *bp, struct bnxt_db_info *db,
}
}
static inline bool bnxt_cfa_hwrm_message(u16 req_type)
{
switch (req_type) {
case HWRM_CFA_ENCAP_RECORD_ALLOC:
case HWRM_CFA_ENCAP_RECORD_FREE:
case HWRM_CFA_DECAP_FILTER_ALLOC:
case HWRM_CFA_DECAP_FILTER_FREE:
case HWRM_CFA_EM_FLOW_ALLOC:
case HWRM_CFA_EM_FLOW_FREE:
case HWRM_CFA_EM_FLOW_CFG:
case HWRM_CFA_FLOW_ALLOC:
case HWRM_CFA_FLOW_FREE:
case HWRM_CFA_FLOW_INFO:
case HWRM_CFA_FLOW_FLUSH:
case HWRM_CFA_FLOW_STATS:
case HWRM_CFA_METER_PROFILE_ALLOC:
case HWRM_CFA_METER_PROFILE_FREE:
case HWRM_CFA_METER_PROFILE_CFG:
case HWRM_CFA_METER_INSTANCE_ALLOC:
case HWRM_CFA_METER_INSTANCE_FREE:
return true;
default:
return false;
}
}
static inline bool bnxt_kong_hwrm_message(struct bnxt *bp, struct input *req)
{
return (bp->fw_cap & BNXT_FW_CAP_KONG_MB_CHNL &&
bnxt_cfa_hwrm_message(le16_to_cpu(req->req_type)));
}
static inline bool bnxt_hwrm_kong_chnl(struct bnxt *bp, struct input *req)
{
return (bp->fw_cap & BNXT_FW_CAP_KONG_MB_CHNL &&
req->resp_addr == cpu_to_le64(bp->hwrm_cmd_kong_resp_dma_addr));
}
static inline void *bnxt_get_hwrm_resp_addr(struct bnxt *bp, void *req)
{
if (bnxt_hwrm_kong_chnl(bp, (struct input *)req))
return bp->hwrm_cmd_kong_resp_addr;
else
return bp->hwrm_cmd_resp_addr;
}
static inline u16 bnxt_get_hwrm_seq_id(struct bnxt *bp, u16 dst)
{
u16 seq_id;
if (dst == BNXT_HWRM_CHNL_CHIMP)
seq_id = bp->hwrm_cmd_seq++;
else
seq_id = bp->hwrm_cmd_kong_seq++;
return seq_id;
}
extern const u16 bnxt_lhint_arr[];
int bnxt_alloc_rx_data(struct bnxt *bp, struct bnxt_rx_ring_info *rxr,
......@@ -2253,11 +2161,6 @@ u32 bnxt_fw_health_readl(struct bnxt *bp, int reg_idx);
void bnxt_set_tpa_flags(struct bnxt *bp);
void bnxt_set_ring_params(struct bnxt *);
int bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode);
void bnxt_hwrm_cmd_hdr_init(struct bnxt *, void *, u16, u16, u16);
int _hwrm_send_message(struct bnxt *, void *, u32, int);
int _hwrm_send_message_silent(struct bnxt *bp, void *msg, u32 len, int timeout);
int hwrm_send_message(struct bnxt *, void *, u32, int);
int hwrm_send_message_silent(struct bnxt *, void *, u32, int);
int bnxt_hwrm_func_drv_rgtr(struct bnxt *bp, unsigned long *bmap,
int bmap_size, bool async_only);
int bnxt_get_nr_rss_ctxs(struct bnxt *bp, int rx_rings);
......
drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c
View file @ 49f9df5b
......@@ -18,6 +18,7 @@
#include <rdma/ib_verbs.h>
#include "bnxt_hsi.h"
#include "bnxt.h"
#include "bnxt_hwrm.h"
#include "bnxt_dcb.h"
#ifdef CONFIG_BNXT_DCB
......@@ -38,38 +39,43 @@ static int bnxt_queue_to_tc(struct bnxt *bp, u8 queue_id)
static int bnxt_hwrm_queue_pri2cos_cfg(struct bnxt *bp, struct ieee_ets *ets)
{
struct hwrm_queue_pri2cos_cfg_input req = {0};
struct hwrm_queue_pri2cos_cfg_input *req;
u8 *pri2cos;
int i;
int rc, i;
rc = hwrm_req_init(bp, req, HWRM_QUEUE_PRI2COS_CFG);
if (rc)
return rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_PRI2COS_CFG, -1, -1);
req.flags = cpu_to_le32(QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_BIDIR |
QUEUE_PRI2COS_CFG_REQ_FLAGS_IVLAN);
req->flags = cpu_to_le32(QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_BIDIR |
QUEUE_PRI2COS_CFG_REQ_FLAGS_IVLAN);
pri2cos = &req.pri0_cos_queue_id;
pri2cos = &req->pri0_cos_queue_id;
for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
u8 qidx;
req.enables |= cpu_to_le32(
req->enables |= cpu_to_le32(
QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI0_COS_QUEUE_ID << i);
qidx = bp->tc_to_qidx[ets->prio_tc[i]];
pri2cos[i] = bp->q_info[qidx].queue_id;
}
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
return hwrm_req_send(bp, req);
}
static int bnxt_hwrm_queue_pri2cos_qcfg(struct bnxt *bp, struct ieee_ets *ets)
{
struct hwrm_queue_pri2cos_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_queue_pri2cos_qcfg_input req = {0};
int rc = 0;
struct hwrm_queue_pri2cos_qcfg_output *resp;
struct hwrm_queue_pri2cos_qcfg_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
req.flags = cpu_to_le32(QUEUE_PRI2COS_QCFG_REQ_FLAGS_IVLAN);
rc = hwrm_req_init(bp, req, HWRM_QUEUE_PRI2COS_QCFG);
if (rc)
return rc;
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->flags = cpu_to_le32(QUEUE_PRI2COS_QCFG_REQ_FLAGS_IVLAN);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (!rc) {
u8 *pri2cos = &resp->pri0_cos_queue_id;
int i;
......@@ -83,23 +89,26 @@ static int bnxt_hwrm_queue_pri2cos_qcfg(struct bnxt *bp, struct ieee_ets *ets)
ets->prio_tc[i] = tc;
}
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
static int bnxt_hwrm_queue_cos2bw_cfg(struct bnxt *bp, struct ieee_ets *ets,
u8 max_tc)
{
struct hwrm_queue_cos2bw_cfg_input req = {0};
struct hwrm_queue_cos2bw_cfg_input *req;
struct bnxt_cos2bw_cfg cos2bw;
void *data;
int i;
int rc, i;
rc = hwrm_req_init(bp, req, HWRM_QUEUE_COS2BW_CFG);
if (rc)
return rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_COS2BW_CFG, -1, -1);
for (i = 0; i < max_tc; i++) {
u8 qidx = bp->tc_to_qidx[i];
req.enables |= cpu_to_le32(
req->enables |= cpu_to_le32(
QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID0_VALID <<
qidx);
......@@ -120,30 +129,32 @@ static int bnxt_hwrm_queue_cos2bw_cfg(struct bnxt *bp, struct ieee_ets *ets,
cpu_to_le32((ets->tc_tx_bw[i] * 100) |
BW_VALUE_UNIT_PERCENT1_100);
}
data = &req.unused_0 + qidx * (sizeof(cos2bw) - 4);
data = &req->unused_0 + qidx * (sizeof(cos2bw) - 4);
memcpy(data, &cos2bw.queue_id, sizeof(cos2bw) - 4);
if (qidx == 0) {
req.queue_id0 = cos2bw.queue_id;
req.unused_0 = 0;
req->queue_id0 = cos2bw.queue_id;
req->unused_0 = 0;
}
}
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
return hwrm_req_send(bp, req);
}
static int bnxt_hwrm_queue_cos2bw_qcfg(struct bnxt *bp, struct ieee_ets *ets)
{
struct hwrm_queue_cos2bw_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_queue_cos2bw_qcfg_input req = {0};
struct hwrm_queue_cos2bw_qcfg_output *resp;
struct hwrm_queue_cos2bw_qcfg_input *req;
struct bnxt_cos2bw_cfg cos2bw;
void *data;
int rc, i;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_COS2BW_QCFG, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_QUEUE_COS2BW_QCFG);
if (rc)
return rc;
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (rc) {
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -167,7 +178,7 @@ static int bnxt_hwrm_queue_cos2bw_qcfg(struct bnxt *bp, struct ieee_ets *ets)
ets->tc_tx_bw[tc] = cos2bw.bw_weight;
}
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return 0;
}
......@@ -229,11 +240,12 @@ static int bnxt_queue_remap(struct bnxt *bp, unsigned int lltc_mask)
static int bnxt_hwrm_queue_pfc_cfg(struct bnxt *bp, struct ieee_pfc *pfc)
{
struct hwrm_queue_pfcenable_cfg_input req = {0};
struct hwrm_queue_pfcenable_cfg_input *req;
struct ieee_ets *my_ets = bp->ieee_ets;
unsigned int tc_mask = 0, pri_mask = 0;
u8 i, pri, lltc_count = 0;
bool need_q_remap = false;
int rc;
if (!my_ets)
return -EINVAL;
......@@ -266,38 +278,43 @@ static int bnxt_hwrm_queue_pfc_cfg(struct bnxt *bp, struct ieee_pfc *pfc)
if (need_q_remap)
bnxt_queue_remap(bp, tc_mask);
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_PFCENABLE_CFG, -1, -1);
req.flags = cpu_to_le32(pri_mask);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_QUEUE_PFCENABLE_CFG);
if (rc)
return rc;
req->flags = cpu_to_le32(pri_mask);
return hwrm_req_send(bp, req);
}
static int bnxt_hwrm_queue_pfc_qcfg(struct bnxt *bp, struct ieee_pfc *pfc)
{
struct hwrm_queue_pfcenable_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_queue_pfcenable_qcfg_input req = {0};
struct hwrm_queue_pfcenable_qcfg_output *resp;
struct hwrm_queue_pfcenable_qcfg_input *req;
u8 pri_mask;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_PFCENABLE_QCFG, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_QUEUE_PFCENABLE_QCFG);
if (rc)
return rc;
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (rc) {
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
pri_mask = le32_to_cpu(resp->flags);
pfc->pfc_en = pri_mask;
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return 0;
}
static int bnxt_hwrm_set_dcbx_app(struct bnxt *bp, struct dcb_app *app,
bool add)
{
struct hwrm_fw_set_structured_data_input set = {0};
struct hwrm_fw_get_structured_data_input get = {0};
struct hwrm_fw_set_structured_data_input *set;
struct hwrm_fw_get_structured_data_input *get;
struct hwrm_struct_data_dcbx_app *fw_app;
struct hwrm_struct_hdr *data;
dma_addr_t mapping;
......@@ -307,19 +324,26 @@ static int bnxt_hwrm_set_dcbx_app(struct bnxt *bp, struct dcb_app *app,
if (bp->hwrm_spec_code < 0x10601)
return 0;
rc = hwrm_req_init(bp, get, HWRM_FW_GET_STRUCTURED_DATA);
if (rc)
return rc;
hwrm_req_hold(bp, get);
hwrm_req_alloc_flags(bp, get, GFP_KERNEL | __GFP_ZERO);
n = IEEE_8021QAZ_MAX_TCS;
data_len = sizeof(*data) + sizeof(*fw_app) * n;
data = dma_alloc_coherent(&bp->pdev->dev, data_len, &mapping,
GFP_KERNEL);
if (!data)
return -ENOMEM;
data = hwrm_req_dma_slice(bp, get, data_len, &mapping);
if (!data) {
rc = -ENOMEM;
goto set_app_exit;
}
bnxt_hwrm_cmd_hdr_init(bp, &get, HWRM_FW_GET_STRUCTURED_DATA, -1, -1);
get.dest_data_addr = cpu_to_le64(mapping);
get.structure_id = cpu_to_le16(STRUCT_HDR_STRUCT_ID_DCBX_APP);
get.subtype = cpu_to_le16(HWRM_STRUCT_DATA_SUBTYPE_HOST_OPERATIONAL);
get.count = 0;
rc = hwrm_send_message(bp, &get, sizeof(get), HWRM_CMD_TIMEOUT);
get->dest_data_addr = cpu_to_le64(mapping);
get->structure_id = cpu_to_le16(STRUCT_HDR_STRUCT_ID_DCBX_APP);
get->subtype = cpu_to_le16(HWRM_STRUCT_DATA_SUBTYPE_HOST_OPERATIONAL);
get->count = 0;
rc = hwrm_req_send(bp, get);
if (rc)
goto set_app_exit;
......@@ -365,44 +389,49 @@ static int bnxt_hwrm_set_dcbx_app(struct bnxt *bp, struct dcb_app *app,
data->len = cpu_to_le16(sizeof(*fw_app) * n);
data->subtype = cpu_to_le16(HWRM_STRUCT_DATA_SUBTYPE_HOST_OPERATIONAL);
bnxt_hwrm_cmd_hdr_init(bp, &set, HWRM_FW_SET_STRUCTURED_DATA, -1, -1);
set.src_data_addr = cpu_to_le64(mapping);
set.data_len = cpu_to_le16(sizeof(*data) + sizeof(*fw_app) * n);
set.hdr_cnt = 1;
rc = hwrm_send_message(bp, &set, sizeof(set), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, set, HWRM_FW_SET_STRUCTURED_DATA);
if (rc)
goto set_app_exit;
set->src_data_addr = cpu_to_le64(mapping);
set->data_len = cpu_to_le16(sizeof(*data) + sizeof(*fw_app) * n);
set->hdr_cnt = 1;
rc = hwrm_req_send(bp, set);
set_app_exit:
dma_free_coherent(&bp->pdev->dev, data_len, data, mapping);
hwrm_req_drop(bp, get); /* dropping get request and associated slice */
return rc;
}
static int bnxt_hwrm_queue_dscp_qcaps(struct bnxt *bp)
{
struct hwrm_queue_dscp_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_queue_dscp_qcaps_input req = {0};
struct hwrm_queue_dscp_qcaps_output *resp;
struct hwrm_queue_dscp_qcaps_input *req;
int rc;
bp->max_dscp_value = 0;
if (bp->hwrm_spec_code < 0x10800 || BNXT_VF(bp))
return 0;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_DSCP_QCAPS, -1, -1);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_QUEUE_DSCP_QCAPS);
if (rc)
return rc;
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send_silent(bp, req);
if (!rc) {
bp->max_dscp_value = (1 << resp->num_dscp_bits) - 1;
if (bp->max_dscp_value < 0x3f)
bp->max_dscp_value = 0;
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
static int bnxt_hwrm_queue_dscp2pri_cfg(struct bnxt *bp, struct dcb_app *app,
bool add)
{
struct hwrm_queue_dscp2pri_cfg_input req = {0};
struct hwrm_queue_dscp2pri_cfg_input *req;
struct bnxt_dscp2pri_entry *dscp2pri;
dma_addr_t mapping;
int rc;
......@@ -410,23 +439,25 @@ static int bnxt_hwrm_queue_dscp2pri_cfg(struct bnxt *bp, struct dcb_app *app,
if (bp->hwrm_spec_code < 0x10800)
return 0;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_DSCP2PRI_CFG, -1, -1);
dscp2pri = dma_alloc_coherent(&bp->pdev->dev, sizeof(*dscp2pri),
&mapping, GFP_KERNEL);
if (!dscp2pri)
rc = hwrm_req_init(bp, req, HWRM_QUEUE_DSCP2PRI_CFG);
if (rc)
return rc;
dscp2pri = hwrm_req_dma_slice(bp, req, sizeof(*dscp2pri), &mapping);
if (!dscp2pri) {
hwrm_req_drop(bp, req);
return -ENOMEM;
}
req.src_data_addr = cpu_to_le64(mapping);
req->src_data_addr = cpu_to_le64(mapping);
dscp2pri->dscp = app->protocol;
if (add)
dscp2pri->mask = 0x3f;
else
dscp2pri->mask = 0;
dscp2pri->pri = app->priority;
req.entry_cnt = cpu_to_le16(1);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
dma_free_coherent(&bp->pdev->dev, sizeof(*dscp2pri), dscp2pri,
mapping);
req->entry_cnt = cpu_to_le16(1);
rc = hwrm_req_send(bp, req);
return rc;
}
......
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
View file @ 49f9df5b
......@@ -12,6 +12,7 @@
#include <net/devlink.h>
#include "bnxt_hsi.h"
#include "bnxt.h"
#include "bnxt_hwrm.h"
#include "bnxt_vfr.h"
#include "bnxt_devlink.h"
#include "bnxt_ethtool.h"
......@@ -354,28 +355,34 @@ static void bnxt_copy_from_nvm_data(union devlink_param_value *dst,
static int bnxt_hwrm_get_nvm_cfg_ver(struct bnxt *bp,
union devlink_param_value *nvm_cfg_ver)
{
struct hwrm_nvm_get_variable_input req = {0};
struct hwrm_nvm_get_variable_input *req;
union bnxt_nvm_data *data;
dma_addr_t data_dma_addr;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1);
data = dma_alloc_coherent(&bp->pdev->dev, sizeof(*data),
&data_dma_addr, GFP_KERNEL);
if (!data)
return -ENOMEM;
rc = hwrm_req_init(bp, req, HWRM_NVM_GET_VARIABLE);
if (rc)
return rc;
data = hwrm_req_dma_slice(bp, req, sizeof(*data), &data_dma_addr);
if (!data) {
rc = -ENOMEM;
goto exit;
}
req.dest_data_addr = cpu_to_le64(data_dma_addr);
req.data_len = cpu_to_le16(BNXT_NVM_CFG_VER_BITS);
req.option_num = cpu_to_le16(NVM_OFF_NVM_CFG_VER);
hwrm_req_hold(bp, req);
req->dest_data_addr = cpu_to_le64(data_dma_addr);
req->data_len = cpu_to_le16(BNXT_NVM_CFG_VER_BITS);
req->option_num = cpu_to_le16(NVM_OFF_NVM_CFG_VER);
rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_send_silent(bp, req);
if (!rc)
bnxt_copy_from_nvm_data(nvm_cfg_ver, data,
BNXT_NVM_CFG_VER_BITS,
BNXT_NVM_CFG_VER_BYTES);
dma_free_coherent(&bp->pdev->dev, sizeof(*data), data, data_dma_addr);
exit:
hwrm_req_drop(bp, req);
return rc;
}
......@@ -562,17 +569,20 @@ static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req,
}
static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
int msg_len, union devlink_param_value *val)
union devlink_param_value *val)
{
struct hwrm_nvm_get_variable_input *req = msg;
struct bnxt_dl_nvm_param nvm_param;
struct hwrm_err_output *resp;
union bnxt_nvm_data *data;
dma_addr_t data_dma_addr;
int idx = 0, rc, i;
/* Get/Set NVM CFG parameter is supported only on PFs */
if (BNXT_VF(bp))
if (BNXT_VF(bp)) {
hwrm_req_drop(bp, req);
return -EPERM;
}
for (i = 0; i < ARRAY_SIZE(nvm_params); i++) {
if (nvm_params[i].id == param_id) {
......@@ -581,18 +591,22 @@ static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
}
}
if (i == ARRAY_SIZE(nvm_params))
if (i == ARRAY_SIZE(nvm_params)) {
hwrm_req_drop(bp, req);
return -EOPNOTSUPP;
}
if (nvm_param.dir_type == BNXT_NVM_PORT_CFG)
idx = bp->pf.port_id;
else if (nvm_param.dir_type == BNXT_NVM_FUNC_CFG)
idx = bp->pf.fw_fid - BNXT_FIRST_PF_FID;
data = dma_alloc_coherent(&bp->pdev->dev, sizeof(*data),
&data_dma_addr, GFP_KERNEL);
if (!data)
data = hwrm_req_dma_slice(bp, req, sizeof(*data), &data_dma_addr);
if (!data) {
hwrm_req_drop(bp, req);
return -ENOMEM;
}
req->dest_data_addr = cpu_to_le64(data_dma_addr);
req->data_len = cpu_to_le16(nvm_param.nvm_num_bits);
......@@ -601,26 +615,24 @@ static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
if (idx)
req->dimensions = cpu_to_le16(1);
resp = hwrm_req_hold(bp, req);
if (req->req_type == cpu_to_le16(HWRM_NVM_SET_VARIABLE)) {
bnxt_copy_to_nvm_data(data, val, nvm_param.nvm_num_bits,
nvm_param.dl_num_bytes);
rc = hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT);
rc = hwrm_req_send(bp, msg);
} else {
rc = hwrm_send_message_silent(bp, msg, msg_len,
HWRM_CMD_TIMEOUT);
rc = hwrm_req_send_silent(bp, msg);
if (!rc) {
bnxt_copy_from_nvm_data(val, data,
nvm_param.nvm_num_bits,
nvm_param.dl_num_bytes);
} else {
struct hwrm_err_output *resp = bp->hwrm_cmd_resp_addr;
if (resp->cmd_err ==
NVM_GET_VARIABLE_CMD_ERR_CODE_VAR_NOT_EXIST)
rc = -EOPNOTSUPP;
}
}
dma_free_coherent(&bp->pdev->dev, sizeof(*data), data, data_dma_addr);
hwrm_req_drop(bp, req);
if (rc == -EACCES)
netdev_err(bp->dev, "PF does not have admin privileges to modify NVM config\n");
return rc;
......@@ -629,15 +641,17 @@ static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
static int bnxt_dl_nvm_param_get(struct devlink *dl, u32 id,
struct devlink_param_gset_ctx *ctx)
{
struct hwrm_nvm_get_variable_input req = {0};
struct bnxt *bp = bnxt_get_bp_from_dl(dl);
struct hwrm_nvm_get_variable_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1);
rc = bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
if (!rc)
if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK)
ctx->val.vbool = !ctx->val.vbool;
rc = hwrm_req_init(bp, req, HWRM_NVM_GET_VARIABLE);
if (rc)
return rc;
rc = bnxt_hwrm_nvm_req(bp, id, req, &ctx->val);
if (!rc && id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK)
ctx->val.vbool = !ctx->val.vbool;
return rc;
}
......@@ -645,15 +659,18 @@ static int bnxt_dl_nvm_param_get(struct devlink *dl, u32 id,
static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,
struct devlink_param_gset_ctx *ctx)
{
struct hwrm_nvm_set_variable_input req = {0};
struct bnxt *bp = bnxt_get_bp_from_dl(dl);
struct hwrm_nvm_set_variable_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_SET_VARIABLE, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_NVM_SET_VARIABLE);
if (rc)
return rc;
if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK)
ctx->val.vbool = !ctx->val.vbool;
return bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
return bnxt_hwrm_nvm_req(bp, id, req, &ctx->val);
}
static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,
......
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c
View file @ 49f9df5b
......@@ -24,6 +24,7 @@
#include <linux/timecounter.h>
#include "bnxt_hsi.h"
#include "bnxt.h"
#include "bnxt_hwrm.h"
#include "bnxt_xdp.h"
#include "bnxt_ptp.h"
#include "bnxt_ethtool.h"
......@@ -1365,7 +1366,7 @@ static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
void *_p)
{
struct pcie_ctx_hw_stats *hw_pcie_stats;
struct hwrm_pcie_qstats_input req = {0};
struct hwrm_pcie_qstats_input *req;
struct bnxt *bp = netdev_priv(dev);
dma_addr_t hw_pcie_stats_addr;
int rc;
......@@ -1376,18 +1377,21 @@ static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
return;
hw_pcie_stats = dma_alloc_coherent(&bp->pdev->dev,
sizeof(*hw_pcie_stats),
&hw_pcie_stats_addr, GFP_KERNEL);
if (!hw_pcie_stats)
if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS))
return;
hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats),
&hw_pcie_stats_addr);
if (!hw_pcie_stats) {
hwrm_req_drop(bp, req);
return;
}
regs->version = 1;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PCIE_QSTATS, -1, -1);
req.pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));
req.pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
hwrm_req_hold(bp, req); /* hold on to slice */
req->pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));
req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);
rc = hwrm_req_send(bp, req);
if (!rc) {
__le64 *src = (__le64 *)hw_pcie_stats;
u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN);
......@@ -1396,9 +1400,7 @@ static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++)
dst[i] = le64_to_cpu(src[i]);
}
mutex_unlock(&bp->hwrm_cmd_lock);
dma_free_coherent(&bp->pdev->dev, sizeof(*hw_pcie_stats), hw_pcie_stats,
hw_pcie_stats_addr);
hwrm_req_drop(bp, req);
}
static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
......@@ -1978,7 +1980,7 @@ static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info,
static int bnxt_set_fecparam(struct net_device *dev,
struct ethtool_fecparam *fecparam)
{
struct hwrm_port_phy_cfg_input req = {0};
struct hwrm_port_phy_cfg_input *req;
struct bnxt *bp = netdev_priv(dev);
struct bnxt_link_info *link_info;
u32 new_cfg, fec = fecparam->fec;
......@@ -2010,9 +2012,11 @@ static int bnxt_set_fecparam(struct net_device *dev,
}
apply_fec:
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
req.flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG);
if (rc)
return rc;
req->flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
rc = hwrm_req_send(bp, req);
/* update current settings */
if (!rc) {
mutex_lock(&bp->link_lock);
......@@ -2106,19 +2110,22 @@ static u32 bnxt_get_link(struct net_device *dev)
int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp,
struct hwrm_nvm_get_dev_info_output *nvm_dev_info)
{
struct hwrm_nvm_get_dev_info_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_nvm_get_dev_info_input req = {0};
struct hwrm_nvm_get_dev_info_output *resp;
struct hwrm_nvm_get_dev_info_input *req;
int rc;
if (BNXT_VF(bp))
return -EOPNOTSUPP;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DEV_INFO, -1, -1);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DEV_INFO);
if (rc)
return rc;
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (!rc)
memcpy(nvm_dev_info, resp, sizeof(*resp));
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -2131,77 +2138,67 @@ static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
u16 ext, u16 *index, u32 *item_length,
u32 *data_length);
static int __bnxt_flash_nvram(struct net_device *dev, u16 dir_type,
u16 dir_ordinal, u16 dir_ext, u16 dir_attr,
u32 dir_item_len, const u8 *data,
size_t data_len)
static int bnxt_flash_nvram(struct net_device *dev, u16 dir_type,
u16 dir_ordinal, u16 dir_ext, u16 dir_attr,
u32 dir_item_len, const u8 *data,
size_t data_len)
{
struct bnxt *bp = netdev_priv(dev);
struct hwrm_nvm_write_input *req;
int rc;
struct hwrm_nvm_write_input req = {0};
dma_addr_t dma_handle;
u8 *kmem = NULL;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_NVM_WRITE);
if (rc)
return rc;
req.dir_type = cpu_to_le16(dir_type);
req.dir_ordinal = cpu_to_le16(dir_ordinal);
req.dir_ext = cpu_to_le16(dir_ext);
req.dir_attr = cpu_to_le16(dir_attr);
req.dir_item_length = cpu_to_le32(dir_item_len);
if (data_len && data) {
req.dir_data_length = cpu_to_le32(data_len);
dma_addr_t dma_handle;
u8 *kmem;
kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
GFP_KERNEL);
if (!kmem)
kmem = hwrm_req_dma_slice(bp, req, data_len, &dma_handle);
if (!kmem) {
hwrm_req_drop(bp, req);
return -ENOMEM;
}
req->dir_data_length = cpu_to_le32(data_len);
memcpy(kmem, data, data_len);
req.host_src_addr = cpu_to_le64(dma_handle);
req->host_src_addr = cpu_to_le64(dma_handle);
}
rc = _hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
if (kmem)
dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
hwrm_req_timeout(bp, req, FLASH_NVRAM_TIMEOUT);
req->dir_type = cpu_to_le16(dir_type);
req->dir_ordinal = cpu_to_le16(dir_ordinal);
req->dir_ext = cpu_to_le16(dir_ext);
req->dir_attr = cpu_to_le16(dir_attr);
req->dir_item_length = cpu_to_le32(dir_item_len);
rc = hwrm_req_send(bp, req);
if (rc == -EACCES)
bnxt_print_admin_err(bp);
return rc;
}
static int bnxt_flash_nvram(struct net_device *dev, u16 dir_type,
u16 dir_ordinal, u16 dir_ext, u16 dir_attr,
const u8 *data, size_t data_len)
{
struct bnxt *bp = netdev_priv(dev);
int rc;
mutex_lock(&bp->hwrm_cmd_lock);
rc = __bnxt_flash_nvram(dev, dir_type, dir_ordinal, dir_ext, dir_attr,
0, data, data_len);
mutex_unlock(&bp->hwrm_cmd_lock);
return rc;
}
static int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type,
u8 self_reset, u8 flags)
{
struct hwrm_fw_reset_input req = {0};
struct bnxt *bp = netdev_priv(dev);
struct hwrm_fw_reset_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_FW_RESET);
if (rc)
return rc;
req.embedded_proc_type = proc_type;
req.selfrst_status = self_reset;
req.flags = flags;
req->embedded_proc_type = proc_type;
req->selfrst_status = self_reset;
req->flags = flags;
if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) {
rc = hwrm_send_message_silent(bp, &req, sizeof(req),
HWRM_CMD_TIMEOUT);
rc = hwrm_req_send_silent(bp, req);
} else {
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_send(bp, req);
if (rc == -EACCES)
bnxt_print_admin_err(bp);
}
......@@ -2339,7 +2336,7 @@ static int bnxt_flash_firmware(struct net_device *dev,
return -EINVAL;
}
rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
0, 0, fw_data, fw_size);
0, 0, 0, fw_data, fw_size);
if (rc == 0) /* Firmware update successful */
rc = bnxt_firmware_reset(dev, dir_type);
......@@ -2392,7 +2389,7 @@ static int bnxt_flash_microcode(struct net_device *dev,
return -EINVAL;
}
rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
0, 0, fw_data, fw_size);
0, 0, 0, fw_data, fw_size);
return rc;
}
......@@ -2458,7 +2455,7 @@ static int bnxt_flash_firmware_from_file(struct net_device *dev,
rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
else
rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
0, 0, fw->data, fw->size);
0, 0, 0, fw->data, fw->size);
release_firmware(fw);
return rc;
}
......@@ -2470,21 +2467,23 @@ static int bnxt_flash_firmware_from_file(struct net_device *dev,
int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware *fw,
u32 install_type)
{
struct hwrm_nvm_install_update_input install = {0};
struct hwrm_nvm_install_update_output resp = {0};
struct hwrm_nvm_modify_input modify = {0};
struct hwrm_nvm_install_update_input *install;
struct hwrm_nvm_install_update_output *resp;
struct hwrm_nvm_modify_input *modify;
struct bnxt *bp = netdev_priv(dev);
bool defrag_attempted = false;
dma_addr_t dma_handle;
u8 *kmem = NULL;
u32 modify_len;
u32 item_len;
int rc = 0;
u16 index;
int rc;
bnxt_hwrm_fw_set_time(bp);
bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
rc = hwrm_req_init(bp, modify, HWRM_NVM_MODIFY);
if (rc)
return rc;
/* Try allocating a large DMA buffer first. Older fw will
* cause excessive NVRAM erases when using small blocks.
......@@ -2492,22 +2491,33 @@ int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware
modify_len = roundup_pow_of_two(fw->size);
modify_len = min_t(u32, modify_len, BNXT_PKG_DMA_SIZE);
while (1) {
kmem = dma_alloc_coherent(&bp->pdev->dev, modify_len,
&dma_handle, GFP_KERNEL);
kmem = hwrm_req_dma_slice(bp, modify, modify_len, &dma_handle);
if (!kmem && modify_len > PAGE_SIZE)
modify_len /= 2;
else
break;
}
if (!kmem)
if (!kmem) {
hwrm_req_drop(bp, modify);
return -ENOMEM;
}
modify.host_src_addr = cpu_to_le64(dma_handle);
rc = hwrm_req_init(bp, install, HWRM_NVM_INSTALL_UPDATE);
if (rc) {
hwrm_req_drop(bp, modify);
return rc;
}
hwrm_req_timeout(bp, modify, FLASH_PACKAGE_TIMEOUT);
hwrm_req_timeout(bp, install, INSTALL_PACKAGE_TIMEOUT);
bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
hwrm_req_hold(bp, modify);
modify->host_src_addr = cpu_to_le64(dma_handle);
resp = hwrm_req_hold(bp, install);
if ((install_type & 0xffff) == 0)
install_type >>= 16;
install.install_type = cpu_to_le32(install_type);
install->install_type = cpu_to_le32(install_type);
do {
u32 copied = 0, len = modify_len;
......@@ -2527,76 +2537,69 @@ int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware
break;
}
modify.dir_idx = cpu_to_le16(index);
modify->dir_idx = cpu_to_le16(index);
if (fw->size > modify_len)
modify.flags = BNXT_NVM_MORE_FLAG;
modify->flags = BNXT_NVM_MORE_FLAG;
while (copied < fw->size) {
u32 balance = fw->size - copied;
if (balance <= modify_len) {
len = balance;
if (copied)
modify.flags |= BNXT_NVM_LAST_FLAG;
modify->flags |= BNXT_NVM_LAST_FLAG;
}
memcpy(kmem, fw->data + copied, len);
modify.len = cpu_to_le32(len);
modify.offset = cpu_to_le32(copied);
rc = hwrm_send_message(bp, &modify, sizeof(modify),
FLASH_PACKAGE_TIMEOUT);
modify->len = cpu_to_le32(len);
modify->offset = cpu_to_le32(copied);
rc = hwrm_req_send(bp, modify);
if (rc)
goto pkg_abort;
copied += len;
}
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message_silent(bp, &install, sizeof(install),
INSTALL_PACKAGE_TIMEOUT);
memcpy(&resp, bp->hwrm_cmd_resp_addr, sizeof(resp));
rc = hwrm_req_send_silent(bp, install);
if (defrag_attempted) {
/* We have tried to defragment already in the previous
* iteration. Return with the result for INSTALL_UPDATE
*/
mutex_unlock(&bp->hwrm_cmd_lock);
break;
}
if (rc && ((struct hwrm_err_output *)&resp)->cmd_err ==
if (rc && ((struct hwrm_err_output *)resp)->cmd_err ==
NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
install.flags =
install->flags =
cpu_to_le16(NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
rc = _hwrm_send_message_silent(bp, &install,
sizeof(install),
INSTALL_PACKAGE_TIMEOUT);
memcpy(&resp, bp->hwrm_cmd_resp_addr, sizeof(resp));
rc = hwrm_req_send_silent(bp, install);
if (rc && ((struct hwrm_err_output *)&resp)->cmd_err ==
if (rc && ((struct hwrm_err_output *)resp)->cmd_err ==
NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE) {
/* FW has cleared NVM area, driver will create
* UPDATE directory and try the flash again
*/
defrag_attempted = true;
install.flags = 0;
rc = __bnxt_flash_nvram(bp->dev,
BNX_DIR_TYPE_UPDATE,
BNX_DIR_ORDINAL_FIRST,
0, 0, item_len, NULL,
0);
install->flags = 0;
rc = bnxt_flash_nvram(bp->dev,
BNX_DIR_TYPE_UPDATE,
BNX_DIR_ORDINAL_FIRST,
0, 0, item_len, NULL, 0);
} else if (rc) {
netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc);
}
} else if (rc) {
netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc);
}
mutex_unlock(&bp->hwrm_cmd_lock);
} while (defrag_attempted && !rc);
pkg_abort:
dma_free_coherent(&bp->pdev->dev, modify_len, kmem, dma_handle);
if (resp.result) {
hwrm_req_drop(bp, modify);
hwrm_req_drop(bp, install);
if (resp->result) {
netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
(s8)resp.result, (int)resp.problem_item);
(s8)resp->result, (int)resp->problem_item);
rc = -ENOPKG;
}
if (rc == -EACCES)
......@@ -2642,20 +2645,22 @@ static int bnxt_flash_device(struct net_device *dev,
static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
{
struct hwrm_nvm_get_dir_info_output *output;
struct hwrm_nvm_get_dir_info_input *req;
struct bnxt *bp = netdev_priv(dev);
int rc;
struct hwrm_nvm_get_dir_info_input req = {0};
struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_INFO);
if (rc)
return rc;
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
output = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (!rc) {
*entries = le32_to_cpu(output->entries);
*length = le32_to_cpu(output->entry_length);
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -2681,7 +2686,7 @@ static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
u8 *buf;
size_t buflen;
dma_addr_t dma_handle;
struct hwrm_nvm_get_dir_entries_input req = {0};
struct hwrm_nvm_get_dir_entries_input *req;
rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
if (rc != 0)
......@@ -2699,20 +2704,23 @@ static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
len -= 2;
memset(data, 0xff, len);
rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_ENTRIES);
if (rc)
return rc;
buflen = dir_entries * entry_length;
buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
GFP_KERNEL);
buf = hwrm_req_dma_slice(bp, req, buflen, &dma_handle);
if (!buf) {
netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
(unsigned)buflen);
hwrm_req_drop(bp, req);
return -ENOMEM;
}
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
req.host_dest_addr = cpu_to_le64(dma_handle);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->host_dest_addr = cpu_to_le64(dma_handle);
hwrm_req_hold(bp, req); /* hold the slice */
rc = hwrm_req_send(bp, req);
if (rc == 0)
memcpy(data, buf, len > buflen ? buflen : len);
dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -2723,28 +2731,31 @@ static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
int rc;
u8 *buf;
dma_addr_t dma_handle;
struct hwrm_nvm_read_input req = {0};
struct hwrm_nvm_read_input *req;
if (!length)
return -EINVAL;
buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
GFP_KERNEL);
rc = hwrm_req_init(bp, req, HWRM_NVM_READ);
if (rc)
return rc;
buf = hwrm_req_dma_slice(bp, req, length, &dma_handle);
if (!buf) {
netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
(unsigned)length);
hwrm_req_drop(bp, req);
return -ENOMEM;
}
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
req.host_dest_addr = cpu_to_le64(dma_handle);
req.dir_idx = cpu_to_le16(index);
req.offset = cpu_to_le32(offset);
req.len = cpu_to_le32(length);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->host_dest_addr = cpu_to_le64(dma_handle);
req->dir_idx = cpu_to_le16(index);
req->offset = cpu_to_le32(offset);
req->len = cpu_to_le32(length);
hwrm_req_hold(bp, req); /* hold the slice */
rc = hwrm_req_send(bp, req);
if (rc == 0)
memcpy(data, buf, length);
dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -2752,20 +2763,23 @@ static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
u16 ext, u16 *index, u32 *item_length,
u32 *data_length)
{
struct hwrm_nvm_find_dir_entry_output *output;
struct hwrm_nvm_find_dir_entry_input *req;
struct bnxt *bp = netdev_priv(dev);
int rc;
struct hwrm_nvm_find_dir_entry_input req = {0};
struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
req.enables = 0;
req.dir_idx = 0;
req.dir_type = cpu_to_le16(type);
req.dir_ordinal = cpu_to_le16(ordinal);
req.dir_ext = cpu_to_le16(ext);
req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_NVM_FIND_DIR_ENTRY);
if (rc)
return rc;
req->enables = 0;
req->dir_idx = 0;
req->dir_type = cpu_to_le16(type);
req->dir_ordinal = cpu_to_le16(ordinal);
req->dir_ext = cpu_to_le16(ext);
req->opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
output = hwrm_req_hold(bp, req);
rc = hwrm_req_send_silent(bp, req);
if (rc == 0) {
if (index)
*index = le16_to_cpu(output->dir_idx);
......@@ -2774,7 +2788,7 @@ static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
if (data_length)
*data_length = le32_to_cpu(output->dir_data_length);
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -2869,12 +2883,16 @@ static int bnxt_get_eeprom(struct net_device *dev,
static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
{
struct hwrm_nvm_erase_dir_entry_input *req;
struct bnxt *bp = netdev_priv(dev);
struct hwrm_nvm_erase_dir_entry_input req = {0};
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
req.dir_idx = cpu_to_le16(index);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_NVM_ERASE_DIR_ENTRY);
if (rc)
return rc;
req->dir_idx = cpu_to_le16(index);
return hwrm_req_send(bp, req);
}
static int bnxt_set_eeprom(struct net_device *dev,
......@@ -2914,7 +2932,7 @@ static int bnxt_set_eeprom(struct net_device *dev,
ordinal = eeprom->offset >> 16;
attr = eeprom->offset & 0xffff;
return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
return bnxt_flash_nvram(dev, type, ordinal, ext, attr, 0, data,
eeprom->len);
}
......@@ -3002,31 +3020,33 @@ static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
u16 page_number, u16 start_addr,
u16 data_length, u8 *buf)
{
struct hwrm_port_phy_i2c_read_input req = {0};
struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
struct hwrm_port_phy_i2c_read_output *output;
struct hwrm_port_phy_i2c_read_input *req;
int rc, byte_offset = 0;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
req.i2c_slave_addr = i2c_addr;
req.page_number = cpu_to_le16(page_number);
req.port_id = cpu_to_le16(bp->pf.port_id);
rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_READ);
if (rc)
return rc;
output = hwrm_req_hold(bp, req);
req->i2c_slave_addr = i2c_addr;
req->page_number = cpu_to_le16(page_number);
req->port_id = cpu_to_le16(bp->pf.port_id);
do {
u16 xfer_size;
xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
data_length -= xfer_size;
req.page_offset = cpu_to_le16(start_addr + byte_offset);
req.data_length = xfer_size;
req.enables = cpu_to_le32(start_addr + byte_offset ?
req->page_offset = cpu_to_le16(start_addr + byte_offset);
req->data_length = xfer_size;
req->enables = cpu_to_le32(start_addr + byte_offset ?
PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req),
HWRM_CMD_TIMEOUT);
rc = hwrm_req_send(bp, req);
if (!rc)
memcpy(buf + byte_offset, output->data, xfer_size);
mutex_unlock(&bp->hwrm_cmd_lock);
byte_offset += xfer_size;
} while (!rc && data_length > 0);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -3135,13 +3155,13 @@ static int bnxt_nway_reset(struct net_device *dev)
static int bnxt_set_phys_id(struct net_device *dev,
enum ethtool_phys_id_state state)
{
struct hwrm_port_led_cfg_input req = {0};
struct hwrm_port_led_cfg_input *req;
struct bnxt *bp = netdev_priv(dev);
struct bnxt_pf_info *pf = &bp->pf;
struct bnxt_led_cfg *led_cfg;
u8 led_state;
__le16 duration;
int i;
int rc, i;
if (!bp->num_leds || BNXT_VF(bp))
return -EOPNOTSUPP;
......@@ -3155,27 +3175,35 @@ static int bnxt_set_phys_id(struct net_device *dev,
} else {
return -EINVAL;
}
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
req.port_id = cpu_to_le16(pf->port_id);
req.num_leds = bp->num_leds;
led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
rc = hwrm_req_init(bp, req, HWRM_PORT_LED_CFG);
if (rc)
return rc;
req->port_id = cpu_to_le16(pf->port_id);
req->num_leds = bp->num_leds;
led_cfg = (struct bnxt_led_cfg *)&req->led0_id;
for (i = 0; i < bp->num_leds; i++, led_cfg++) {
req.enables |= BNXT_LED_DFLT_ENABLES(i);
req->enables |= BNXT_LED_DFLT_ENABLES(i);
led_cfg->led_id = bp->leds[i].led_id;
led_cfg->led_state = led_state;
led_cfg->led_blink_on = duration;
led_cfg->led_blink_off = duration;
led_cfg->led_group_id = bp->leds[i].led_group_id;
}
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
return hwrm_req_send(bp, req);
}
static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
{
struct hwrm_selftest_irq_input req = {0};
struct hwrm_selftest_irq_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_SELFTEST_IRQ);
if (rc)
return rc;
req->cmpl_ring = cpu_to_le16(cmpl_ring);
return hwrm_req_send(bp, req);
}
static int bnxt_test_irq(struct bnxt *bp)
......@@ -3195,31 +3223,37 @@ static int bnxt_test_irq(struct bnxt *bp)
static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
{
struct hwrm_port_mac_cfg_input req = {0};
struct hwrm_port_mac_cfg_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG);
if (rc)
return rc;
req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
if (enable)
req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
req->lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
else
req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
return hwrm_req_send(bp, req);
}
static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
{
struct hwrm_port_phy_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_port_phy_qcaps_input req = {0};
struct hwrm_port_phy_qcaps_output *resp;
struct hwrm_port_phy_qcaps_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_QCAPS, -1, -1);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_QCAPS);
if (rc)
return rc;
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (!rc)
*force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -3254,7 +3288,7 @@ static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
req->force_link_speed = cpu_to_le16(fw_speed);
req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_send(bp, req);
req->flags = 0;
req->force_link_speed = cpu_to_le16(0);
return rc;
......@@ -3262,21 +3296,29 @@ static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
{
struct hwrm_port_phy_cfg_input req = {0};
struct hwrm_port_phy_cfg_input *req;
int rc;
rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG);
if (rc)
return rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
/* prevent bnxt_disable_an_for_lpbk() from consuming the request */
hwrm_req_hold(bp, req);
if (enable) {
bnxt_disable_an_for_lpbk(bp, &req);
bnxt_disable_an_for_lpbk(bp, req);
if (ext)
req.lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
req->lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
else
req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
req->lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
} else {
req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
req->lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
}
req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
rc = hwrm_req_send(bp, req);
hwrm_req_drop(bp, req);
return rc;
}
static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
......@@ -3394,17 +3436,21 @@ static int bnxt_run_loopback(struct bnxt *bp)
static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
{
struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_selftest_exec_input req = {0};
struct hwrm_selftest_exec_output *resp;
struct hwrm_selftest_exec_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
mutex_lock(&bp->hwrm_cmd_lock);
resp->test_success = 0;
req.flags = test_mask;
rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
rc = hwrm_req_init(bp, req, HWRM_SELFTEST_EXEC);
if (rc)
return rc;
hwrm_req_timeout(bp, req, bp->test_info->timeout);
req->flags = test_mask;
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
*test_results = resp->test_success;
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -3563,32 +3609,34 @@ static int bnxt_reset(struct net_device *dev, u32 *flags)
return 0;
}
static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len,
static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg,
struct bnxt_hwrm_dbg_dma_info *info)
{
struct hwrm_dbg_cmn_output *cmn_resp = bp->hwrm_cmd_resp_addr;
struct hwrm_dbg_cmn_input *cmn_req = msg;
__le16 *seq_ptr = msg + info->seq_off;
struct hwrm_dbg_cmn_output *cmn_resp;
u16 seq = 0, len, segs_off;
void *resp = cmn_resp;
dma_addr_t dma_handle;
void *dma_buf, *resp;
int rc, off = 0;
void *dma_buf;
dma_buf = dma_alloc_coherent(&bp->pdev->dev, info->dma_len, &dma_handle,
GFP_KERNEL);
if (!dma_buf)
dma_buf = hwrm_req_dma_slice(bp, msg, info->dma_len, &dma_handle);
if (!dma_buf) {
hwrm_req_drop(bp, msg);
return -ENOMEM;
}
hwrm_req_timeout(bp, msg, HWRM_COREDUMP_TIMEOUT);
cmn_resp = hwrm_req_hold(bp, msg);
resp = cmn_resp;
segs_off = offsetof(struct hwrm_dbg_coredump_list_output,
total_segments);
cmn_req->host_dest_addr = cpu_to_le64(dma_handle);
cmn_req->host_buf_len = cpu_to_le32(info->dma_len);
mutex_lock(&bp->hwrm_cmd_lock);
while (1) {
*seq_ptr = cpu_to_le16(seq);
rc = _hwrm_send_message(bp, msg, msg_len,
HWRM_COREDUMP_TIMEOUT);
rc = hwrm_req_send(bp, msg);
if (rc)
break;
......@@ -3632,26 +3680,27 @@ static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len,
seq++;
off += len;
}
mutex_unlock(&bp->hwrm_cmd_lock);
dma_free_coherent(&bp->pdev->dev, info->dma_len, dma_buf, dma_handle);
hwrm_req_drop(bp, msg);
return rc;
}
static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp,
struct bnxt_coredump *coredump)
{
struct hwrm_dbg_coredump_list_input req = {0};
struct bnxt_hwrm_dbg_dma_info info = {NULL};
struct hwrm_dbg_coredump_list_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_LIST, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_DBG_COREDUMP_LIST);
if (rc)
return rc;
info.dma_len = COREDUMP_LIST_BUF_LEN;
info.seq_off = offsetof(struct hwrm_dbg_coredump_list_input, seq_no);
info.data_len_off = offsetof(struct hwrm_dbg_coredump_list_output,
data_len);
rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
rc = bnxt_hwrm_dbg_dma_data(bp, req, &info);
if (!rc) {
coredump->data = info.dest_buf;
coredump->data_size = info.dest_buf_size;
......@@ -3663,26 +3712,34 @@ static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp,
static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id,
u16 segment_id)
{
struct hwrm_dbg_coredump_initiate_input req = {0};
struct hwrm_dbg_coredump_initiate_input *req;
int rc;
rc = hwrm_req_init(bp, req, HWRM_DBG_COREDUMP_INITIATE);
if (rc)
return rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_INITIATE, -1, -1);
req.component_id = cpu_to_le16(component_id);
req.segment_id = cpu_to_le16(segment_id);
hwrm_req_timeout(bp, req, HWRM_COREDUMP_TIMEOUT);
req->component_id = cpu_to_le16(component_id);
req->segment_id = cpu_to_le16(segment_id);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_COREDUMP_TIMEOUT);
return hwrm_req_send(bp, req);
}
static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id,
u16 segment_id, u32 *seg_len,
void *buf, u32 buf_len, u32 offset)
{
struct hwrm_dbg_coredump_retrieve_input req = {0};
struct hwrm_dbg_coredump_retrieve_input *req;
struct bnxt_hwrm_dbg_dma_info info = {NULL};
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_RETRIEVE, -1, -1);
req.component_id = cpu_to_le16(component_id);
req.segment_id = cpu_to_le16(segment_id);
rc = hwrm_req_init(bp, req, HWRM_DBG_COREDUMP_RETRIEVE);
if (rc)
return rc;
req->component_id = cpu_to_le16(component_id);
req->segment_id = cpu_to_le16(segment_id);
info.dma_len = COREDUMP_RETRIEVE_BUF_LEN;
info.seq_off = offsetof(struct hwrm_dbg_coredump_retrieve_input,
......@@ -3695,7 +3752,7 @@ static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id,
info.seg_start = offset;
}
rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
rc = bnxt_hwrm_dbg_dma_data(bp, req, &info);
if (!rc)
*seg_len = info.dest_buf_size;
......@@ -3974,8 +4031,8 @@ static int bnxt_get_ts_info(struct net_device *dev,
void bnxt_ethtool_init(struct bnxt *bp)
{
struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_selftest_qlist_input req = {0};
struct hwrm_selftest_qlist_output *resp;
struct hwrm_selftest_qlist_input *req;
struct bnxt_test_info *test_info;
struct net_device *dev = bp->dev;
int i, rc;
......@@ -3987,19 +4044,22 @@ void bnxt_ethtool_init(struct bnxt *bp)
if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp))
return;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
if (rc)
goto ethtool_init_exit;
test_info = bp->test_info;
if (!test_info)
if (!test_info) {
test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
if (!test_info)
if (!test_info)
return;
bp->test_info = test_info;
}
if (hwrm_req_init(bp, req, HWRM_SELFTEST_QLIST))
return;
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send_silent(bp, req);
if (rc)
goto ethtool_init_exit;
bp->test_info = test_info;
bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
if (bp->num_tests > BNXT_MAX_TEST)
bp->num_tests = BNXT_MAX_TEST;
......@@ -4033,7 +4093,7 @@ void bnxt_ethtool_init(struct bnxt *bp)
}
ethtool_init_exit:
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
}
static void bnxt_get_eth_phy_stats(struct net_device *dev,
......
drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c 0 → 100644
View file @ 49f9df5b
/* Broadcom NetXtreme-C/E network driver.
*
* Copyright (c) 2020 Broadcom Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation.
*/
#include <asm/byteorder.h>
#include <linux/dma-mapping.h>
#include <linux/dmapool.h>
#include <linux/errno.h>
#include <linux/ethtool.h>
#include <linux/if_ether.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/netdevice.h>
#include <linux/pci.h>
#include <linux/skbuff.h>
#include "bnxt_hsi.h"
#include "bnxt.h"
#include "bnxt_hwrm.h"
static u64 hwrm_calc_sentinel(struct bnxt_hwrm_ctx *ctx, u16 req_type)
{
return (((uintptr_t)ctx) + req_type) ^ BNXT_HWRM_SENTINEL;
}
/**
* __hwrm_req_init() - Initialize an HWRM request.
* @bp: The driver context.
* @req: A pointer to the request pointer to initialize.
* @req_type: The request type. This will be converted to the little endian
* before being written to the req_type field of the returned request.
* @req_len: The length of the request to be allocated.
*
* Allocate DMA resources and initialize a new HWRM request object of the
* given type. The response address field in the request is configured with
* the DMA bus address that has been mapped for the response and the passed
* request is pointed to kernel virtual memory mapped for the request (such
* that short_input indirection can be accomplished without copying). The
* request’s target and completion ring are initialized to default values and
* can be overridden by writing to the returned request object directly.
*
* The initialized request can be further customized by writing to its fields
* directly, taking care to covert such fields to little endian. The request
* object will be consumed (and all its associated resources release) upon
* passing it to hwrm_req_send() unless ownership of the request has been
* claimed by the caller via a call to hwrm_req_hold(). If the request is not
* consumed, either because it is never sent or because ownership has been
* claimed, then it must be released by a call to hwrm_req_drop().
*
* Return: zero on success, negative error code otherwise:
* E2BIG: the type of request pointer is too large to fit.
* ENOMEM: an allocation failure occurred.
*/
int __hwrm_req_init(struct bnxt *bp, void **req, u16 req_type, u32 req_len)
{
struct bnxt_hwrm_ctx *ctx;
dma_addr_t dma_handle;
u8 *req_addr;
if (req_len > BNXT_HWRM_CTX_OFFSET)
return -E2BIG;
req_addr = dma_pool_alloc(bp->hwrm_dma_pool, GFP_KERNEL | __GFP_ZERO,
&dma_handle);
if (!req_addr)
return -ENOMEM;
ctx = (struct bnxt_hwrm_ctx *)(req_addr + BNXT_HWRM_CTX_OFFSET);
/* safety first, sentinel used to check for invalid requests */
ctx->sentinel = hwrm_calc_sentinel(ctx, req_type);
ctx->req_len = req_len;
ctx->req = (struct input *)req_addr;
ctx->resp = (struct output *)(req_addr + BNXT_HWRM_RESP_OFFSET);
ctx->dma_handle = dma_handle;
ctx->flags = 0; /* __GFP_ZERO, but be explicit regarding ownership */
ctx->timeout = bp->hwrm_cmd_timeout ?: DFLT_HWRM_CMD_TIMEOUT;
ctx->allocated = BNXT_HWRM_DMA_SIZE - BNXT_HWRM_CTX_OFFSET;
ctx->gfp = GFP_KERNEL;
ctx->slice_addr = NULL;
/* initialize common request fields */
ctx->req->req_type = cpu_to_le16(req_type);
ctx->req->resp_addr = cpu_to_le64(dma_handle + BNXT_HWRM_RESP_OFFSET);
ctx->req->cmpl_ring = cpu_to_le16(BNXT_HWRM_NO_CMPL_RING);
ctx->req->target_id = cpu_to_le16(BNXT_HWRM_TARGET);
*req = ctx->req;
return 0;
}
static struct bnxt_hwrm_ctx *__hwrm_ctx(struct bnxt *bp, u8 *req_addr)
{
void *ctx_addr = req_addr + BNXT_HWRM_CTX_OFFSET;
struct input *req = (struct input *)req_addr;
struct bnxt_hwrm_ctx *ctx = ctx_addr;
u64 sentinel;
if (!req) {
/* can only be due to software bug, be loud */
netdev_err(bp->dev, "null HWRM request");
dump_stack();
return NULL;
}
/* HWRM API has no type safety, verify sentinel to validate address */
sentinel = hwrm_calc_sentinel(ctx, le16_to_cpu(req->req_type));
if (ctx->sentinel != sentinel) {
/* can only be due to software bug, be loud */
netdev_err(bp->dev, "HWRM sentinel mismatch, req_type = %u\n",
(u32)le16_to_cpu(req->req_type));
dump_stack();
return NULL;
}
return ctx;
}
/**
* hwrm_req_timeout() - Set the completion timeout for the request.
* @bp: The driver context.
* @req: The request to set the timeout.
* @timeout: The timeout in milliseconds.
*
* Set the timeout associated with the request for subsequent calls to
* hwrm_req_send(). Some requests are long running and require a different
* timeout than the default.
*/
void hwrm_req_timeout(struct bnxt *bp, void *req, unsigned int timeout)
{
struct bnxt_hwrm_ctx *ctx = __hwrm_ctx(bp, req);
if (ctx)
ctx->timeout = timeout;
}
/**
* hwrm_req_alloc_flags() - Sets GFP allocation flags for slices.
* @bp: The driver context.
* @req: The request for which calls to hwrm_req_dma_slice() will have altered
* allocation flags.
* @flags: A bitmask of GFP flags. These flags are passed to
* dma_alloc_coherent() whenever it is used to allocate backing memory
* for slices. Note that calls to hwrm_req_dma_slice() will not always
* result in new allocations, however, memory suballocated from the
* request buffer is already __GFP_ZERO.
*
* Sets the GFP allocation flags associated with the request for subsequent
* calls to hwrm_req_dma_slice(). This can be useful for specifying __GFP_ZERO
* for slice allocations.
*/
void hwrm_req_alloc_flags(struct bnxt *bp, void *req, gfp_t gfp)
{
struct bnxt_hwrm_ctx *ctx = __hwrm_ctx(bp, req);
if (ctx)
ctx->gfp = gfp;
}
/**
* hwrm_req_replace() - Replace request data.
* @bp: The driver context.
* @req: The request to modify. A call to hwrm_req_replace() is conceptually
* an assignment of new_req to req. Subsequent calls to HWRM API functions,
* such as hwrm_req_send(), should thus use req and not new_req (in fact,
* calls to HWRM API functions will fail if non-managed request objects
* are passed).
* @len: The length of new_req.
* @new_req: The pre-built request to copy or reference.
*
* Replaces the request data in req with that of new_req. This is useful in
* scenarios where a request object has already been constructed by a third
* party prior to creating a resource managed request using hwrm_req_init().
* Depending on the length, hwrm_req_replace() will either copy the new
* request data into the DMA memory allocated for req, or it will simply
* reference the new request and use it in lieu of req during subsequent
* calls to hwrm_req_send(). The resource management is associated with
* req and is independent of and does not apply to new_req. The caller must
* ensure that the lifetime of new_req is least as long as req. Any slices
* that may have been associated with the original request are released.
*
* Return: zero on success, negative error code otherwise:
* E2BIG: Request is too large.
* EINVAL: Invalid request to modify.
*/
int hwrm_req_replace(struct bnxt *bp, void *req, void *new_req, u32 len)
{
struct bnxt_hwrm_ctx *ctx = __hwrm_ctx(bp, req);
struct input *internal_req = req;
u16 req_type;
if (!ctx)
return -EINVAL;
if (len > BNXT_HWRM_CTX_OFFSET)
return -E2BIG;
/* free any existing slices */
ctx->allocated = BNXT_HWRM_DMA_SIZE - BNXT_HWRM_CTX_OFFSET;
if (ctx->slice_addr) {
dma_free_coherent(&bp->pdev->dev, ctx->slice_size,
ctx->slice_addr, ctx->slice_handle);
ctx->slice_addr = NULL;
}
ctx->gfp = GFP_KERNEL;
if ((bp->fw_cap & BNXT_FW_CAP_SHORT_CMD) || len > BNXT_HWRM_MAX_REQ_LEN) {
memcpy(internal_req, new_req, len);
} else {
internal_req->req_type = ((struct input *)new_req)->req_type;
ctx->req = new_req;
}
ctx->req_len = len;
ctx->req->resp_addr = cpu_to_le64(ctx->dma_handle +
BNXT_HWRM_RESP_OFFSET);
/* update sentinel for potentially new request type */
req_type = le16_to_cpu(internal_req->req_type);
ctx->sentinel = hwrm_calc_sentinel(ctx, req_type);
return 0;
}
/**
* hwrm_req_flags() - Set non internal flags of the ctx
* @bp: The driver context.
* @req: The request containing the HWRM command
* @flags: ctx flags that don't have BNXT_HWRM_INTERNAL_FLAG set
*
* ctx flags can be used by the callers to instruct how the subsequent
* hwrm_req_send() should behave. Example: callers can use hwrm_req_flags
* with BNXT_HWRM_CTX_SILENT to omit kernel prints of errors of hwrm_req_send()
* or with BNXT_HWRM_FULL_WAIT enforce hwrm_req_send() to wait for full timeout
* even if FW is not responding.
* This generic function can be used to set any flag that is not an internal flag
* of the HWRM module.
*/
void hwrm_req_flags(struct bnxt *bp, void *req, enum bnxt_hwrm_ctx_flags flags)
{
struct bnxt_hwrm_ctx *ctx = __hwrm_ctx(bp, req);
if (ctx)
ctx->flags |= (flags & HWRM_API_FLAGS);
}
/**
* hwrm_req_hold() - Claim ownership of the request's resources.
* @bp: The driver context.
* @req: A pointer to the request to own. The request will no longer be
* consumed by calls to hwrm_req_send().
*
* Take ownership of the request. Ownership places responsibility on the
* caller to free the resources associated with the request via a call to
* hwrm_req_drop(). The caller taking ownership implies that a subsequent
* call to hwrm_req_send() will not consume the request (ie. sending will
* not free the associated resources if the request is owned by the caller).
* Taking ownership returns a reference to the response. Retaining and
* accessing the response data is the most common reason to take ownership
* of the request. Ownership can also be acquired in order to reuse the same
* request object across multiple invocations of hwrm_req_send().
*
* Return: A pointer to the response object.
*
* The resources associated with the response will remain available to the
* caller until ownership of the request is relinquished via a call to
* hwrm_req_drop(). It is not possible for hwrm_req_hold() to return NULL if
* a valid request is provided. A returned NULL value would imply a driver
* bug and the implementation will complain loudly in the logs to aid in
* detection. It should not be necessary to check the result for NULL.
*/
void *hwrm_req_hold(struct bnxt *bp, void *req)
{
struct bnxt_hwrm_ctx *ctx = __hwrm_ctx(bp, req);
struct input *input = (struct input *)req;
if (!ctx)
return NULL;
if (ctx->flags & BNXT_HWRM_INTERNAL_CTX_OWNED) {
/* can only be due to software bug, be loud */
netdev_err(bp->dev, "HWRM context already owned, req_type = %u\n",
(u32)le16_to_cpu(input->req_type));
dump_stack();
return NULL;
}
ctx->flags |= BNXT_HWRM_INTERNAL_CTX_OWNED;
return ((u8 *)req) + BNXT_HWRM_RESP_OFFSET;
}
static void __hwrm_ctx_drop(struct bnxt *bp, struct bnxt_hwrm_ctx *ctx)
{
void *addr = ((u8 *)ctx) - BNXT_HWRM_CTX_OFFSET;
dma_addr_t dma_handle = ctx->dma_handle; /* save before invalidate */
/* unmap any auxiliary DMA slice */
if (ctx->slice_addr)
dma_free_coherent(&bp->pdev->dev, ctx->slice_size,
ctx->slice_addr, ctx->slice_handle);
/* invalidate, ensure ownership, sentinel and dma_handle are cleared */
memset(ctx, 0, sizeof(struct bnxt_hwrm_ctx));
/* return the buffer to the DMA pool */
if (dma_handle)
dma_pool_free(bp->hwrm_dma_pool, addr, dma_handle);
}
/**
* hwrm_req_drop() - Release all resources associated with the request.
* @bp: The driver context.
* @req: The request to consume, releasing the associated resources. The
* request object, any slices, and its associated response are no
* longer valid.
*
* It is legal to call hwrm_req_drop() on an unowned request, provided it
* has not already been consumed by hwrm_req_send() (for example, to release
* an aborted request). A given request should not be dropped more than once,
* nor should it be dropped after having been consumed by hwrm_req_send(). To
* do so is an error (the context will not be found and a stack trace will be
* rendered in the kernel log).
*/
void hwrm_req_drop(struct bnxt *bp, void *req)
{
struct bnxt_hwrm_ctx *ctx = __hwrm_ctx(bp, req);
if (ctx)
__hwrm_ctx_drop(bp, ctx);
}
static int __hwrm_to_stderr(u32 hwrm_err)
{
switch (hwrm_err) {
case HWRM_ERR_CODE_SUCCESS:
return 0;
case HWRM_ERR_CODE_RESOURCE_LOCKED:
return -EROFS;
case HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED:
return -EACCES;
case HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR:
return -ENOSPC;
case HWRM_ERR_CODE_INVALID_PARAMS:
case HWRM_ERR_CODE_INVALID_FLAGS:
case HWRM_ERR_CODE_INVALID_ENABLES:
case HWRM_ERR_CODE_UNSUPPORTED_TLV:
case HWRM_ERR_CODE_UNSUPPORTED_OPTION_ERR:
return -EINVAL;
case HWRM_ERR_CODE_NO_BUFFER:
return -ENOMEM;
case HWRM_ERR_CODE_HOT_RESET_PROGRESS:
case HWRM_ERR_CODE_BUSY:
return -EAGAIN;
case HWRM_ERR_CODE_CMD_NOT_SUPPORTED:
return -EOPNOTSUPP;
default:
return -EIO;
}
}
static struct bnxt_hwrm_wait_token *
__hwrm_acquire_token(struct bnxt *bp, enum bnxt_hwrm_chnl dst)
{
struct bnxt_hwrm_wait_token *token;
token = kzalloc(sizeof(*token), GFP_KERNEL);
if (!token)
return NULL;
mutex_lock(&bp->hwrm_cmd_lock);
token->dst = dst;
token->state = BNXT_HWRM_PENDING;
if (dst == BNXT_HWRM_CHNL_CHIMP) {
token->seq_id = bp->hwrm_cmd_seq++;
hlist_add_head_rcu(&token->node, &bp->hwrm_pending_list);
} else {
token->seq_id = bp->hwrm_cmd_kong_seq++;
}
return token;
}
static void
__hwrm_release_token(struct bnxt *bp, struct bnxt_hwrm_wait_token *token)
{
if (token->dst == BNXT_HWRM_CHNL_CHIMP) {
hlist_del_rcu(&token->node);
kfree_rcu(token, rcu);
} else {
kfree(token);
}
mutex_unlock(&bp->hwrm_cmd_lock);
}
void
hwrm_update_token(struct bnxt *bp, u16 seq_id, enum bnxt_hwrm_wait_state state)
{
struct bnxt_hwrm_wait_token *token;
rcu_read_lock();
hlist_for_each_entry_rcu(token, &bp->hwrm_pending_list, node) {
if (token->seq_id == seq_id) {
WRITE_ONCE(token->state, state);
rcu_read_unlock();
return;
}
}
rcu_read_unlock();
netdev_err(bp->dev, "Invalid hwrm seq id %d\n", seq_id);
}
static int __hwrm_send(struct bnxt *bp, struct bnxt_hwrm_ctx *ctx)
{
u32 doorbell_offset = BNXT_GRCPF_REG_CHIMP_COMM_TRIGGER;
enum bnxt_hwrm_chnl dst = BNXT_HWRM_CHNL_CHIMP;
u32 bar_offset = BNXT_GRCPF_REG_CHIMP_COMM;
struct bnxt_hwrm_wait_token *token = NULL;
struct hwrm_short_input short_input = {0};
u16 max_req_len = BNXT_HWRM_MAX_REQ_LEN;
unsigned int i, timeout, tmo_count;
u32 *data = (u32 *)ctx->req;
u32 msg_len = ctx->req_len;
int rc = -EBUSY;
u32 req_type;
u16 len = 0;
u8 *valid;
if (ctx->flags & BNXT_HWRM_INTERNAL_RESP_DIRTY)
memset(ctx->resp, 0, PAGE_SIZE);
req_type = le16_to_cpu(ctx->req->req_type);
if (BNXT_NO_FW_ACCESS(bp) && req_type != HWRM_FUNC_RESET)
goto exit;
if (msg_len > BNXT_HWRM_MAX_REQ_LEN &&
msg_len > bp->hwrm_max_ext_req_len) {
rc = -E2BIG;
goto exit;
}
if (bnxt_kong_hwrm_message(bp, ctx->req)) {
dst = BNXT_HWRM_CHNL_KONG;
bar_offset = BNXT_GRCPF_REG_KONG_COMM;
doorbell_offset = BNXT_GRCPF_REG_KONG_COMM_TRIGGER;
if (le16_to_cpu(ctx->req->cmpl_ring) != INVALID_HW_RING_ID) {
netdev_err(bp->dev, "Ring completions not supported for KONG commands, req_type = %d\n",
req_type);
rc = -EINVAL;
goto exit;
}
}
token = __hwrm_acquire_token(bp, dst);
if (!token) {
rc = -ENOMEM;
goto exit;
}
ctx->req->seq_id = cpu_to_le16(token->seq_id);
if ((bp->fw_cap & BNXT_FW_CAP_SHORT_CMD) ||
msg_len > BNXT_HWRM_MAX_REQ_LEN) {
short_input.req_type = ctx->req->req_type;
short_input.signature =
cpu_to_le16(SHORT_REQ_SIGNATURE_SHORT_CMD);
short_input.size = cpu_to_le16(msg_len);
short_input.req_addr = cpu_to_le64(ctx->dma_handle);
data = (u32 *)&short_input;
msg_len = sizeof(short_input);
max_req_len = BNXT_HWRM_SHORT_REQ_LEN;
}
/* Ensure any associated DMA buffers are written before doorbell */
wmb();
/* Write request msg to hwrm channel */
__iowrite32_copy(bp->bar0 + bar_offset, data, msg_len / 4);
for (i = msg_len; i < max_req_len; i += 4)
writel(0, bp->bar0 + bar_offset + i);
/* Ring channel doorbell */
writel(1, bp->bar0 + doorbell_offset);
if (!pci_is_enabled(bp->pdev)) {
rc = -ENODEV;
goto exit;
}
/* Limit timeout to an upper limit */
timeout = min_t(uint, ctx->timeout, HWRM_CMD_MAX_TIMEOUT);
/* convert timeout to usec */
timeout *= 1000;
i = 0;
/* Short timeout for the first few iterations:
* number of loops = number of loops for short timeout +
* number of loops for standard timeout.
*/
tmo_count = HWRM_SHORT_TIMEOUT_COUNTER;
timeout = timeout - HWRM_SHORT_MIN_TIMEOUT * HWRM_SHORT_TIMEOUT_COUNTER;
tmo_count += DIV_ROUND_UP(timeout, HWRM_MIN_TIMEOUT);
if (le16_to_cpu(ctx->req->cmpl_ring) != INVALID_HW_RING_ID) {
/* Wait until hwrm response cmpl interrupt is processed */
while (READ_ONCE(token->state) < BNXT_HWRM_COMPLETE &&
i++ < tmo_count) {
/* Abort the wait for completion if the FW health
* check has failed.
*/
if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))
goto exit;
/* on first few passes, just barely sleep */
if (i < HWRM_SHORT_TIMEOUT_COUNTER) {
usleep_range(HWRM_SHORT_MIN_TIMEOUT,
HWRM_SHORT_MAX_TIMEOUT);
} else {
if (HWRM_WAIT_MUST_ABORT(bp, ctx))
break;
usleep_range(HWRM_MIN_TIMEOUT,
HWRM_MAX_TIMEOUT);
}
}
if (READ_ONCE(token->state) != BNXT_HWRM_COMPLETE) {
if (!(ctx->flags & BNXT_HWRM_CTX_SILENT))
netdev_err(bp->dev, "Resp cmpl intr err msg: 0x%x\n",
le16_to_cpu(ctx->req->req_type));
goto exit;
}
len = le16_to_cpu(READ_ONCE(ctx->resp->resp_len));
valid = ((u8 *)ctx->resp) + len - 1;
} else {
__le16 seen_out_of_seq = ctx->req->seq_id; /* will never see */
int j;
/* Check if response len is updated */
for (i = 0; i < tmo_count; i++) {
/* Abort the wait for completion if the FW health
* check has failed.
*/
if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))
goto exit;
if (token &&
READ_ONCE(token->state) == BNXT_HWRM_DEFERRED) {
__hwrm_release_token(bp, token);
token = NULL;
}
len = le16_to_cpu(READ_ONCE(ctx->resp->resp_len));
if (len) {
__le16 resp_seq = READ_ONCE(ctx->resp->seq_id);
if (resp_seq == ctx->req->seq_id)
break;
if (resp_seq != seen_out_of_seq) {
netdev_warn(bp->dev, "Discarding out of seq response: 0x%x for msg {0x%x 0x%x}\n",
le16_to_cpu(resp_seq),
le16_to_cpu(ctx->req->req_type),
le16_to_cpu(ctx->req->seq_id));
seen_out_of_seq = resp_seq;
}
}
/* on first few passes, just barely sleep */
if (i < HWRM_SHORT_TIMEOUT_COUNTER) {
usleep_range(HWRM_SHORT_MIN_TIMEOUT,
HWRM_SHORT_MAX_TIMEOUT);
} else {
if (HWRM_WAIT_MUST_ABORT(bp, ctx))
goto timeout_abort;
usleep_range(HWRM_MIN_TIMEOUT,
HWRM_MAX_TIMEOUT);
}
}
if (i >= tmo_count) {
timeout_abort:
if (!(ctx->flags & BNXT_HWRM_CTX_SILENT))
netdev_err(bp->dev, "Error (timeout: %u) msg {0x%x 0x%x} len:%d\n",
hwrm_total_timeout(i),
le16_to_cpu(ctx->req->req_type),
le16_to_cpu(ctx->req->seq_id), len);
goto exit;
}
/* Last byte of resp contains valid bit */
valid = ((u8 *)ctx->resp) + len - 1;
for (j = 0; j < HWRM_VALID_BIT_DELAY_USEC; j++) {
/* make sure we read from updated DMA memory */
dma_rmb();
if (*valid)
break;
usleep_range(1, 5);
}
if (j >= HWRM_VALID_BIT_DELAY_USEC) {
if (!(ctx->flags & BNXT_HWRM_CTX_SILENT))
netdev_err(bp->dev, "Error (timeout: %u) msg {0x%x 0x%x} len:%d v:%d\n",
hwrm_total_timeout(i),
le16_to_cpu(ctx->req->req_type),
le16_to_cpu(ctx->req->seq_id), len,
*valid);
goto exit;
}
}
/* Zero valid bit for compatibility. Valid bit in an older spec
* may become a new field in a newer spec. We must make sure that
* a new field not implemented by old spec will read zero.
*/
*valid = 0;
rc = le16_to_cpu(ctx->resp->error_code);
if (rc && !(ctx->flags & BNXT_HWRM_CTX_SILENT)) {
netdev_err(bp->dev, "hwrm req_type 0x%x seq id 0x%x error 0x%x\n",
le16_to_cpu(ctx->resp->req_type),
le16_to_cpu(ctx->resp->seq_id), rc);
}
rc = __hwrm_to_stderr(rc);
exit:
if (token)
__hwrm_release_token(bp, token);
if (ctx->flags & BNXT_HWRM_INTERNAL_CTX_OWNED)
ctx->flags |= BNXT_HWRM_INTERNAL_RESP_DIRTY;
else
__hwrm_ctx_drop(bp, ctx);
return rc;
}
/**
* hwrm_req_send() - Execute an HWRM command.
* @bp: The driver context.
* @req: A pointer to the request to send. The DMA resources associated with
* the request will be released (ie. the request will be consumed) unless
* ownership of the request has been assumed by the caller via a call to
* hwrm_req_hold().
*
* Send an HWRM request to the device and wait for a response. The request is
* consumed if it is not owned by the caller. This function will block until
* the request has either completed or times out due to an error.
*
* Return: A result code.
*
* The result is zero on success, otherwise the negative error code indicates
* one of the following errors:
* E2BIG: The request was too large.
* EBUSY: The firmware is in a fatal state or the request timed out
* EACCESS: HWRM access denied.
* ENOSPC: HWRM resource allocation error.
* EINVAL: Request parameters are invalid.
* ENOMEM: HWRM has no buffers.
* EAGAIN: HWRM busy or reset in progress.
* EOPNOTSUPP: Invalid request type.
* EIO: Any other error.
* Error handling is orthogonal to request ownership. An unowned request will
* still be consumed on error. If the caller owns the request, then the caller
* is responsible for releasing the resources. Otherwise, hwrm_req_send() will
* always consume the request.
*/
int hwrm_req_send(struct bnxt *bp, void *req)
{
struct bnxt_hwrm_ctx *ctx = __hwrm_ctx(bp, req);
if (!ctx)
return -EINVAL;
return __hwrm_send(bp, ctx);
}
/**
* hwrm_req_send_silent() - A silent version of hwrm_req_send().
* @bp: The driver context.
* @req: The request to send without logging.
*
* The same as hwrm_req_send(), except that the request is silenced using
* hwrm_req_silence() prior the call. This version of the function is
* provided solely to preserve the legacy API’s flavor for this functionality.
*
* Return: A result code, see hwrm_req_send().
*/
int hwrm_req_send_silent(struct bnxt *bp, void *req)
{
hwrm_req_flags(bp, req, BNXT_HWRM_CTX_SILENT);
return hwrm_req_send(bp, req);
}
/**
* hwrm_req_dma_slice() - Allocate a slice of DMA mapped memory.
* @bp: The driver context.
* @req: The request for which indirect data will be associated.
* @size: The size of the allocation.
* @dma: The bus address associated with the allocation. The HWRM API has no
* knowledge about the type of the request and so cannot infer how the
* caller intends to use the indirect data. Thus, the caller is
* responsible for configuring the request object appropriately to
* point to the associated indirect memory. Note, DMA handle has the
* same definition as it does in dma_alloc_coherent(), the caller is
* responsible for endian conversions via cpu_to_le64() before assigning
* this address.
*
* Allocates DMA mapped memory for indirect data related to a request. The
* lifetime of the DMA resources will be bound to that of the request (ie.
* they will be automatically released when the request is either consumed by
* hwrm_req_send() or dropped by hwrm_req_drop()). Small allocations are
* efficiently suballocated out of the request buffer space, hence the name
* slice, while larger requests are satisfied via an underlying call to
* dma_alloc_coherent(). Multiple suballocations are supported, however, only
* one externally mapped region is.
*
* Return: The kernel virtual address of the DMA mapping.
*/
void *
hwrm_req_dma_slice(struct bnxt *bp, void *req, u32 size, dma_addr_t *dma_handle)
{
struct bnxt_hwrm_ctx *ctx = __hwrm_ctx(bp, req);
u8 *end = ((u8 *)req) + BNXT_HWRM_DMA_SIZE;
struct input *input = req;
u8 *addr, *req_addr = req;
u32 max_offset, offset;
if (!ctx)
return NULL;
max_offset = BNXT_HWRM_DMA_SIZE - ctx->allocated;
offset = max_offset - size;
offset = ALIGN_DOWN(offset, BNXT_HWRM_DMA_ALIGN);
addr = req_addr + offset;
if (addr < req_addr + max_offset && req_addr + ctx->req_len <= addr) {
ctx->allocated = end - addr;
*dma_handle = ctx->dma_handle + offset;
return addr;
}
/* could not suballocate from ctx buffer, try create a new mapping */
if (ctx->slice_addr) {
/* if one exists, can only be due to software bug, be loud */
netdev_err(bp->dev, "HWRM refusing to reallocate DMA slice, req_type = %u\n",
(u32)le16_to_cpu(input->req_type));
dump_stack();
return NULL;
}
addr = dma_alloc_coherent(&bp->pdev->dev, size, dma_handle, ctx->gfp);
if (!addr)
return NULL;
ctx->slice_addr = addr;
ctx->slice_size = size;
ctx->slice_handle = *dma_handle;
return addr;
}
drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h 0 → 100644
View file @ 49f9df5b
/* Broadcom NetXtreme-C/E network driver.
*
* Copyright (c) 2020 Broadcom Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation.
*/
#ifndef BNXT_HWRM_H
#define BNXT_HWRM_H
#include "bnxt_hsi.h"
enum bnxt_hwrm_ctx_flags {
/* Update the HWRM_API_FLAGS right below for any new non-internal bit added here */
BNXT_HWRM_INTERNAL_CTX_OWNED = BIT(0), /* caller owns the context */
BNXT_HWRM_INTERNAL_RESP_DIRTY = BIT(1), /* response contains data */
BNXT_HWRM_CTX_SILENT = BIT(2), /* squelch firmware errors */
BNXT_HWRM_FULL_WAIT = BIT(3), /* wait for full timeout of HWRM command */
};
#define HWRM_API_FLAGS (BNXT_HWRM_CTX_SILENT | BNXT_HWRM_FULL_WAIT)
struct bnxt_hwrm_ctx {
u64 sentinel;
dma_addr_t dma_handle;
struct output *resp;
struct input *req;
dma_addr_t slice_handle;
void *slice_addr;
u32 slice_size;
u32 req_len;
enum bnxt_hwrm_ctx_flags flags;
unsigned int timeout;
u32 allocated;
gfp_t gfp;
};
enum bnxt_hwrm_wait_state {
BNXT_HWRM_PENDING,
BNXT_HWRM_DEFERRED,
BNXT_HWRM_COMPLETE,
BNXT_HWRM_CANCELLED,
};
enum bnxt_hwrm_chnl { BNXT_HWRM_CHNL_CHIMP, BNXT_HWRM_CHNL_KONG };
struct bnxt_hwrm_wait_token {
struct rcu_head rcu;
struct hlist_node node;
enum bnxt_hwrm_wait_state state;
enum bnxt_hwrm_chnl dst;
u16 seq_id;
};
void hwrm_update_token(struct bnxt *bp, u16 seq, enum bnxt_hwrm_wait_state s);
#define BNXT_HWRM_MAX_REQ_LEN (bp->hwrm_max_req_len)
#define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input)
#define HWRM_CMD_MAX_TIMEOUT 40000
#define SHORT_HWRM_CMD_TIMEOUT 20
#define HWRM_CMD_TIMEOUT (bp->hwrm_cmd_timeout)
#define HWRM_RESET_TIMEOUT ((HWRM_CMD_TIMEOUT) * 4)
#define HWRM_COREDUMP_TIMEOUT ((HWRM_CMD_TIMEOUT) * 12)
#define BNXT_HWRM_TARGET 0xffff
#define BNXT_HWRM_NO_CMPL_RING -1
#define BNXT_HWRM_REQ_MAX_SIZE 128
#define BNXT_HWRM_DMA_SIZE (2 * PAGE_SIZE) /* space for req+resp */
#define BNXT_HWRM_RESP_RESERVED PAGE_SIZE
#define BNXT_HWRM_RESP_OFFSET (BNXT_HWRM_DMA_SIZE - \
BNXT_HWRM_RESP_RESERVED)
#define BNXT_HWRM_CTX_OFFSET (BNXT_HWRM_RESP_OFFSET - \
sizeof(struct bnxt_hwrm_ctx))
#define BNXT_HWRM_DMA_ALIGN 16
#define BNXT_HWRM_SENTINEL 0xb6e1f68a12e9a7eb /* arbitrary value */
#define BNXT_HWRM_REQS_PER_PAGE (BNXT_PAGE_SIZE / \
BNXT_HWRM_REQ_MAX_SIZE)
#define HWRM_SHORT_MIN_TIMEOUT 3
#define HWRM_SHORT_MAX_TIMEOUT 10
#define HWRM_SHORT_TIMEOUT_COUNTER 5
#define HWRM_MIN_TIMEOUT 25
#define HWRM_MAX_TIMEOUT 40
#define HWRM_WAIT_MUST_ABORT(bp, ctx) \
(le16_to_cpu((ctx)->req->req_type) != HWRM_VER_GET && \
!bnxt_is_fw_healthy(bp))
static inline unsigned int hwrm_total_timeout(unsigned int n)
{
return n <= HWRM_SHORT_TIMEOUT_COUNTER ? n * HWRM_SHORT_MIN_TIMEOUT :
HWRM_SHORT_TIMEOUT_COUNTER * HWRM_SHORT_MIN_TIMEOUT +
(n - HWRM_SHORT_TIMEOUT_COUNTER) * HWRM_MIN_TIMEOUT;
}
#define HWRM_VALID_BIT_DELAY_USEC 150
static inline bool bnxt_cfa_hwrm_message(u16 req_type)
{
switch (req_type) {
case HWRM_CFA_ENCAP_RECORD_ALLOC:
case HWRM_CFA_ENCAP_RECORD_FREE:
case HWRM_CFA_DECAP_FILTER_ALLOC:
case HWRM_CFA_DECAP_FILTER_FREE:
case HWRM_CFA_EM_FLOW_ALLOC:
case HWRM_CFA_EM_FLOW_FREE:
case HWRM_CFA_EM_FLOW_CFG:
case HWRM_CFA_FLOW_ALLOC:
case HWRM_CFA_FLOW_FREE:
case HWRM_CFA_FLOW_INFO:
case HWRM_CFA_FLOW_FLUSH:
case HWRM_CFA_FLOW_STATS:
case HWRM_CFA_METER_PROFILE_ALLOC:
case HWRM_CFA_METER_PROFILE_FREE:
case HWRM_CFA_METER_PROFILE_CFG:
case HWRM_CFA_METER_INSTANCE_ALLOC:
case HWRM_CFA_METER_INSTANCE_FREE:
return true;
default:
return false;
}
}
static inline bool bnxt_kong_hwrm_message(struct bnxt *bp, struct input *req)
{
return (bp->fw_cap & BNXT_FW_CAP_KONG_MB_CHNL &&
(bnxt_cfa_hwrm_message(le16_to_cpu(req->req_type)) ||
le16_to_cpu(req->target_id) == HWRM_TARGET_ID_KONG));
}
int __hwrm_req_init(struct bnxt *bp, void **req, u16 req_type, u32 req_len);
#define hwrm_req_init(bp, req, req_type) \
__hwrm_req_init((bp), (void **)&(req), (req_type), sizeof(*(req)))
void *hwrm_req_hold(struct bnxt *bp, void *req);
void hwrm_req_drop(struct bnxt *bp, void *req);
void hwrm_req_flags(struct bnxt *bp, void *req, enum bnxt_hwrm_ctx_flags flags);
void hwrm_req_timeout(struct bnxt *bp, void *req, unsigned int timeout);
int hwrm_req_send(struct bnxt *bp, void *req);
int hwrm_req_send_silent(struct bnxt *bp, void *req);
int hwrm_req_replace(struct bnxt *bp, void *req, void *new_req, u32 len);
void hwrm_req_alloc_flags(struct bnxt *bp, void *req, gfp_t flags);
void *hwrm_req_dma_slice(struct bnxt *bp, void *req, u32 size, dma_addr_t *dma);
#endif
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
View file @ 49f9df5b
......@@ -18,6 +18,7 @@
#include <linux/ptp_classify.h>
#include "bnxt_hsi.h"
#include "bnxt.h"
#include "bnxt_hwrm.h"
#include "bnxt_ptp.h"
int bnxt_ptp_parse(struct sk_buff *skb, u16 *seq_id, u16 *hdr_off)
......@@ -85,24 +86,28 @@ static void bnxt_ptp_get_current_time(struct bnxt *bp)
static int bnxt_hwrm_port_ts_query(struct bnxt *bp, u32 flags, u64 *ts)
{
struct hwrm_port_ts_query_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_port_ts_query_input req = {0};
struct hwrm_port_ts_query_output *resp;
struct hwrm_port_ts_query_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_TS_QUERY, -1, -1);
req.flags = cpu_to_le32(flags);
rc = hwrm_req_init(bp, req, HWRM_PORT_TS_QUERY);
if (rc)
return rc;
req->flags = cpu_to_le32(flags);
if ((flags & PORT_TS_QUERY_REQ_FLAGS_PATH) ==
PORT_TS_QUERY_REQ_FLAGS_PATH_TX) {
req.enables = cpu_to_le16(BNXT_PTP_QTS_TX_ENABLES);
req.ptp_seq_id = cpu_to_le32(bp->ptp_cfg->tx_seqid);
req.ptp_hdr_offset = cpu_to_le16(bp->ptp_cfg->tx_hdr_off);
req.ts_req_timeout = cpu_to_le16(BNXT_PTP_QTS_TIMEOUT);
req->enables = cpu_to_le16(BNXT_PTP_QTS_TX_ENABLES);
req->ptp_seq_id = cpu_to_le32(bp->ptp_cfg->tx_seqid);
req->ptp_hdr_offset = cpu_to_le16(bp->ptp_cfg->tx_hdr_off);
req->ts_req_timeout = cpu_to_le16(BNXT_PTP_QTS_TIMEOUT);
}
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (!rc)
*ts = le64_to_cpu(resp->ptp_msg_ts);
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -143,14 +148,17 @@ static int bnxt_ptp_adjfreq(struct ptp_clock_info *ptp_info, s32 ppb)
{
struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
ptp_info);
struct hwrm_port_mac_cfg_input req = {0};
struct hwrm_port_mac_cfg_input *req;
struct bnxt *bp = ptp->bp;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
req.ptp_freq_adj_ppb = cpu_to_le32(ppb);
req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_PTP_FREQ_ADJ_PPB);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG);
if (rc)
return rc;
req->ptp_freq_adj_ppb = cpu_to_le32(ppb);
req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_PTP_FREQ_ADJ_PPB);
rc = hwrm_req_send(ptp->bp, req);
if (rc)
netdev_err(ptp->bp->dev,
"ptp adjfreq failed. rc = %d\n", rc);
......@@ -186,7 +194,7 @@ void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2)
static int bnxt_ptp_cfg_pin(struct bnxt *bp, u8 pin, u8 usage)
{
struct hwrm_func_ptp_pin_cfg_input req = {0};
struct hwrm_func_ptp_pin_cfg_input *req;
struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
u8 state = usage != BNXT_PPS_PIN_NONE;
u8 *pin_state, *pin_usg;
......@@ -198,18 +206,21 @@ static int bnxt_ptp_cfg_pin(struct bnxt *bp, u8 pin, u8 usage)
return -EOPNOTSUPP;
}
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_PTP_PIN_CFG, -1, -1);
rc = hwrm_req_init(ptp->bp, req, HWRM_FUNC_PTP_PIN_CFG);
if (rc)
return rc;
enables = (FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN0_STATE |
FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN0_USAGE) << (pin * 2);
req.enables = cpu_to_le32(enables);
req->enables = cpu_to_le32(enables);
pin_state = &req.pin0_state;
pin_usg = &req.pin0_usage;
pin_state = &req->pin0_state;
pin_usg = &req->pin0_usage;
*(pin_state + (pin * 2)) = state;
*(pin_usg + (pin * 2)) = usage;
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_send(ptp->bp, req);
if (rc)
return rc;
......@@ -221,12 +232,16 @@ static int bnxt_ptp_cfg_pin(struct bnxt *bp, u8 pin, u8 usage)
static int bnxt_ptp_cfg_event(struct bnxt *bp, u8 event)
{
struct hwrm_func_ptp_cfg_input req = {0};
struct hwrm_func_ptp_cfg_input *req;
int rc;
rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);
if (rc)
return rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_PTP_CFG, -1, -1);
req.enables = cpu_to_le16(FUNC_PTP_CFG_REQ_ENABLES_PTP_PPS_EVENT);
req.ptp_pps_event = event;
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->enables = cpu_to_le16(FUNC_PTP_CFG_REQ_ENABLES_PTP_PPS_EVENT);
req->ptp_pps_event = event;
return hwrm_req_send(bp, req);
}
void bnxt_ptp_reapply_pps(struct bnxt *bp)
......@@ -277,7 +292,7 @@ static int bnxt_get_target_cycles(struct bnxt_ptp_cfg *ptp, u64 target_ns,
static int bnxt_ptp_perout_cfg(struct bnxt_ptp_cfg *ptp,
struct ptp_clock_request *rq)
{
struct hwrm_func_ptp_cfg_input req = {0};
struct hwrm_func_ptp_cfg_input *req;
struct bnxt *bp = ptp->bp;
struct timespec64 ts;
u64 target_ns, delta;
......@@ -292,20 +307,22 @@ static int bnxt_ptp_perout_cfg(struct bnxt_ptp_cfg *ptp,
if (rc)
return rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_PTP_CFG, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);
if (rc)
return rc;
enables = FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PERIOD |
FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_UP |
FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PHASE;
req.enables = cpu_to_le16(enables);
req.ptp_pps_event = 0;
req.ptp_freq_adj_dll_source = 0;
req.ptp_freq_adj_dll_phase = 0;
req.ptp_freq_adj_ext_period = cpu_to_le32(NSEC_PER_SEC);
req.ptp_freq_adj_ext_up = 0;
req.ptp_freq_adj_ext_phase_lower = cpu_to_le32(delta);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->enables = cpu_to_le16(enables);
req->ptp_pps_event = 0;
req->ptp_freq_adj_dll_source = 0;
req->ptp_freq_adj_dll_phase = 0;
req->ptp_freq_adj_ext_period = cpu_to_le32(NSEC_PER_SEC);
req->ptp_freq_adj_ext_up = 0;
req->ptp_freq_adj_ext_phase_lower = cpu_to_le32(delta);
return hwrm_req_send(bp, req);
}
static int bnxt_ptp_enable(struct ptp_clock_info *ptp_info,
......@@ -362,11 +379,15 @@ static int bnxt_ptp_enable(struct ptp_clock_info *ptp_info,
static int bnxt_hwrm_ptp_cfg(struct bnxt *bp)
{
struct hwrm_port_mac_cfg_input req = {0};
struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
struct hwrm_port_mac_cfg_input *req;
u32 flags = 0;
int rc;
rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG);
if (rc)
return rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
if (ptp->rx_filter)
flags |= PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_ENABLE;
else
......@@ -375,11 +396,11 @@ static int bnxt_hwrm_ptp_cfg(struct bnxt *bp)
flags |= PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_ENABLE;
else
flags |= PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_DISABLE;
req.flags = cpu_to_le32(flags);
req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_RX_TS_CAPTURE_PTP_MSG_TYPE);
req.rx_ts_capture_ptp_msg_type = cpu_to_le16(ptp->rxctl);
req->flags = cpu_to_le32(flags);
req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_RX_TS_CAPTURE_PTP_MSG_TYPE);
req->rx_ts_capture_ptp_msg_type = cpu_to_le16(ptp->rxctl);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
return hwrm_req_send(bp, req);
}
int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
......@@ -630,11 +651,10 @@ static int bnxt_ptp_verify(struct ptp_clock_info *ptp_info, unsigned int pin,
return -EOPNOTSUPP;
}
/* bp->hwrm_cmd_lock held by the caller */
static int bnxt_ptp_pps_init(struct bnxt *bp)
{
struct hwrm_func_ptp_pin_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_func_ptp_pin_qcfg_input req = {0};
struct hwrm_func_ptp_pin_qcfg_output *resp;
struct hwrm_func_ptp_pin_qcfg_input *req;
struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
struct ptp_clock_info *ptp_info;
struct bnxt_pps *pps_info;
......@@ -642,11 +662,16 @@ static int bnxt_ptp_pps_init(struct bnxt *bp)
u32 i, rc;
/* Query current/default PIN CFG */
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_PTP_PIN_QCFG, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_PIN_QCFG);
if (rc)
return rc;
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
if (rc || !resp->num_pins)
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (rc || !resp->num_pins) {
hwrm_req_drop(bp, req);
return -EOPNOTSUPP;
}
ptp_info = &ptp->ptp_info;
pps_info = &ptp->pps_info;
......@@ -655,8 +680,10 @@ static int bnxt_ptp_pps_init(struct bnxt *bp)
ptp_info->pin_config = kcalloc(ptp_info->n_pins,
sizeof(*ptp_info->pin_config),
GFP_KERNEL);
if (!ptp_info->pin_config)
if (!ptp_info->pin_config) {
hwrm_req_drop(bp, req);
return -ENOMEM;
}
/* Report the TSIO capability to kernel */
pin_usg = &resp->pin0_usage;
......@@ -674,6 +701,7 @@ static int bnxt_ptp_pps_init(struct bnxt *bp)
pps_info->pins[i].usage = *pin_usg;
}
hwrm_req_drop(bp, req);
/* Only 1 each of ext_ts and per_out pins is available in HW */
ptp_info->n_ext_ts = 1;
......
drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c
View file @ 49f9df5b
......@@ -17,6 +17,7 @@
#include <linux/etherdevice.h>
#include "bnxt_hsi.h"
#include "bnxt.h"
#include "bnxt_hwrm.h"
#include "bnxt_ulp.h"
#include "bnxt_sriov.h"
#include "bnxt_vfr.h"
......@@ -26,21 +27,26 @@
static int bnxt_hwrm_fwd_async_event_cmpl(struct bnxt *bp,
struct bnxt_vf_info *vf, u16 event_id)
{
struct hwrm_fwd_async_event_cmpl_input req = {0};
struct hwrm_fwd_async_event_cmpl_input *req;
struct hwrm_async_event_cmpl *async_cmpl;
int rc = 0;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FWD_ASYNC_EVENT_CMPL, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_FWD_ASYNC_EVENT_CMPL);
if (rc)
goto exit;
if (vf)
req.encap_async_event_target_id = cpu_to_le16(vf->fw_fid);
req->encap_async_event_target_id = cpu_to_le16(vf->fw_fid);
else
/* broadcast this async event to all VFs */
req.encap_async_event_target_id = cpu_to_le16(0xffff);
async_cmpl = (struct hwrm_async_event_cmpl *)req.encap_async_event_cmpl;
req->encap_async_event_target_id = cpu_to_le16(0xffff);
async_cmpl =
(struct hwrm_async_event_cmpl *)req->encap_async_event_cmpl;
async_cmpl->type = cpu_to_le16(ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT);
async_cmpl->event_id = cpu_to_le16(event_id);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_send(bp, req);
exit:
if (rc)
netdev_err(bp->dev, "hwrm_fwd_async_event_cmpl failed. rc:%d\n",
rc);
......@@ -62,10 +68,10 @@ static int bnxt_vf_ndo_prep(struct bnxt *bp, int vf_id)
int bnxt_set_vf_spoofchk(struct net_device *dev, int vf_id, bool setting)
{
struct hwrm_func_cfg_input req = {0};
struct bnxt *bp = netdev_priv(dev);
struct bnxt_vf_info *vf;
struct hwrm_func_cfg_input *req;
bool old_setting = false;
struct bnxt_vf_info *vf;
u32 func_flags;
int rc;
......@@ -89,36 +95,38 @@ int bnxt_set_vf_spoofchk(struct net_device *dev, int vf_id, bool setting)
/*TODO: if the driver supports VLAN filter on guest VLAN,
* the spoof check should also include vlan anti-spoofing
*/
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
req.fid = cpu_to_le16(vf->fw_fid);
req.flags = cpu_to_le32(func_flags);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
if (!rc) {
if (setting)
vf->flags |= BNXT_VF_SPOOFCHK;
else
vf->flags &= ~BNXT_VF_SPOOFCHK;
req->fid = cpu_to_le16(vf->fw_fid);
req->flags = cpu_to_le32(func_flags);
rc = hwrm_req_send(bp, req);
if (!rc) {
if (setting)
vf->flags |= BNXT_VF_SPOOFCHK;
else
vf->flags &= ~BNXT_VF_SPOOFCHK;
}
}
return rc;
}
static int bnxt_hwrm_func_qcfg_flags(struct bnxt *bp, struct bnxt_vf_info *vf)
{
struct hwrm_func_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_func_qcfg_input req = {0};
struct hwrm_func_qcfg_output *resp;
struct hwrm_func_qcfg_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_QCFG, -1, -1);
req.fid = cpu_to_le16(BNXT_PF(bp) ? vf->fw_fid : 0xffff);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
if (rc) {
mutex_unlock(&bp->hwrm_cmd_lock);
rc = hwrm_req_init(bp, req, HWRM_FUNC_QCFG);
if (rc)
return rc;
}
vf->func_qcfg_flags = le16_to_cpu(resp->flags);
mutex_unlock(&bp->hwrm_cmd_lock);
return 0;
req->fid = cpu_to_le16(BNXT_PF(bp) ? vf->fw_fid : 0xffff);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (!rc)
vf->func_qcfg_flags = le16_to_cpu(resp->flags);
hwrm_req_drop(bp, req);
return rc;
}
bool bnxt_is_trusted_vf(struct bnxt *bp, struct bnxt_vf_info *vf)
......@@ -132,18 +140,22 @@ bool bnxt_is_trusted_vf(struct bnxt *bp, struct bnxt_vf_info *vf)
static int bnxt_hwrm_set_trusted_vf(struct bnxt *bp, struct bnxt_vf_info *vf)
{
struct hwrm_func_cfg_input req = {0};
struct hwrm_func_cfg_input *req;
int rc;
if (!(bp->fw_cap & BNXT_FW_CAP_TRUSTED_VF))
return 0;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
req.fid = cpu_to_le16(vf->fw_fid);
rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
if (rc)
return rc;
req->fid = cpu_to_le16(vf->fw_fid);
if (vf->flags & BNXT_VF_TRUST)
req.flags = cpu_to_le32(FUNC_CFG_REQ_FLAGS_TRUSTED_VF_ENABLE);
req->flags = cpu_to_le32(FUNC_CFG_REQ_FLAGS_TRUSTED_VF_ENABLE);
else
req.flags = cpu_to_le32(FUNC_CFG_REQ_FLAGS_TRUSTED_VF_DISABLE);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->flags = cpu_to_le32(FUNC_CFG_REQ_FLAGS_TRUSTED_VF_DISABLE);
return hwrm_req_send(bp, req);
}
int bnxt_set_vf_trust(struct net_device *dev, int vf_id, bool trusted)
......@@ -203,8 +215,8 @@ int bnxt_get_vf_config(struct net_device *dev, int vf_id,
int bnxt_set_vf_mac(struct net_device *dev, int vf_id, u8 *mac)
{
struct hwrm_func_cfg_input req = {0};
struct bnxt *bp = netdev_priv(dev);
struct hwrm_func_cfg_input *req;
struct bnxt_vf_info *vf;
int rc;
......@@ -220,19 +232,23 @@ int bnxt_set_vf_mac(struct net_device *dev, int vf_id, u8 *mac)
}
vf = &bp->pf.vf[vf_id];
rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
if (rc)
return rc;
memcpy(vf->mac_addr, mac, ETH_ALEN);
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
req.fid = cpu_to_le16(vf->fw_fid);
req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
memcpy(req.dflt_mac_addr, mac, ETH_ALEN);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->fid = cpu_to_le16(vf->fw_fid);
req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
memcpy(req->dflt_mac_addr, mac, ETH_ALEN);
return hwrm_req_send(bp, req);
}
int bnxt_set_vf_vlan(struct net_device *dev, int vf_id, u16 vlan_id, u8 qos,
__be16 vlan_proto)
{
struct hwrm_func_cfg_input req = {0};
struct bnxt *bp = netdev_priv(dev);
struct hwrm_func_cfg_input *req;
struct bnxt_vf_info *vf;
u16 vlan_tag;
int rc;
......@@ -258,21 +274,23 @@ int bnxt_set_vf_vlan(struct net_device *dev, int vf_id, u16 vlan_id, u8 qos,
if (vlan_tag == vf->vlan)
return 0;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
req.fid = cpu_to_le16(vf->fw_fid);
req.dflt_vlan = cpu_to_le16(vlan_tag);
req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_VLAN);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
if (!rc)
vf->vlan = vlan_tag;
rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
if (!rc) {
req->fid = cpu_to_le16(vf->fw_fid);
req->dflt_vlan = cpu_to_le16(vlan_tag);
req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_VLAN);
rc = hwrm_req_send(bp, req);
if (!rc)
vf->vlan = vlan_tag;
}
return rc;
}
int bnxt_set_vf_bw(struct net_device *dev, int vf_id, int min_tx_rate,
int max_tx_rate)
{
struct hwrm_func_cfg_input req = {0};
struct bnxt *bp = netdev_priv(dev);
struct hwrm_func_cfg_input *req;
struct bnxt_vf_info *vf;
u32 pf_link_speed;
int rc;
......@@ -296,16 +314,18 @@ int bnxt_set_vf_bw(struct net_device *dev, int vf_id, int min_tx_rate,
}
if (min_tx_rate == vf->min_tx_rate && max_tx_rate == vf->max_tx_rate)
return 0;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
req.fid = cpu_to_le16(vf->fw_fid);
req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_MAX_BW);
req.max_bw = cpu_to_le32(max_tx_rate);
req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_MIN_BW);
req.min_bw = cpu_to_le32(min_tx_rate);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
if (!rc) {
vf->min_tx_rate = min_tx_rate;
vf->max_tx_rate = max_tx_rate;
req->fid = cpu_to_le16(vf->fw_fid);
req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_MAX_BW |
FUNC_CFG_REQ_ENABLES_MIN_BW);
req->max_bw = cpu_to_le32(max_tx_rate);
req->min_bw = cpu_to_le32(min_tx_rate);
rc = hwrm_req_send(bp, req);
if (!rc) {
vf->min_tx_rate = min_tx_rate;
vf->max_tx_rate = max_tx_rate;
}
}
return rc;
}
......@@ -358,21 +378,22 @@ static int bnxt_set_vf_attr(struct bnxt *bp, int num_vfs)
static int bnxt_hwrm_func_vf_resource_free(struct bnxt *bp, int num_vfs)
{
int i, rc = 0;
struct hwrm_func_vf_resc_free_input *req;
struct bnxt_pf_info *pf = &bp->pf;
struct hwrm_func_vf_resc_free_input req = {0};
int i, rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_VF_RESC_FREE, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_FUNC_VF_RESC_FREE);
if (rc)
return rc;
mutex_lock(&bp->hwrm_cmd_lock);
hwrm_req_hold(bp, req);
for (i = pf->first_vf_id; i < pf->first_vf_id + num_vfs; i++) {
req.vf_id = cpu_to_le16(i);
rc = _hwrm_send_message(bp, &req, sizeof(req),
HWRM_CMD_TIMEOUT);
req->vf_id = cpu_to_le16(i);
rc = hwrm_req_send(bp, req);
if (rc)
break;
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -446,51 +467,55 @@ static int bnxt_alloc_vf_resources(struct bnxt *bp, int num_vfs)
static int bnxt_hwrm_func_buf_rgtr(struct bnxt *bp)
{
struct hwrm_func_buf_rgtr_input req = {0};
struct hwrm_func_buf_rgtr_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_BUF_RGTR, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_FUNC_BUF_RGTR);
if (rc)
return rc;
req.req_buf_num_pages = cpu_to_le16(bp->pf.hwrm_cmd_req_pages);
req.req_buf_page_size = cpu_to_le16(BNXT_PAGE_SHIFT);
req.req_buf_len = cpu_to_le16(BNXT_HWRM_REQ_MAX_SIZE);
req.req_buf_page_addr0 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[0]);
req.req_buf_page_addr1 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[1]);
req.req_buf_page_addr2 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[2]);
req.req_buf_page_addr3 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[3]);
req->req_buf_num_pages = cpu_to_le16(bp->pf.hwrm_cmd_req_pages);
req->req_buf_page_size = cpu_to_le16(BNXT_PAGE_SHIFT);
req->req_buf_len = cpu_to_le16(BNXT_HWRM_REQ_MAX_SIZE);
req->req_buf_page_addr0 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[0]);
req->req_buf_page_addr1 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[1]);
req->req_buf_page_addr2 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[2]);
req->req_buf_page_addr3 = cpu_to_le64(bp->pf.hwrm_cmd_req_dma_addr[3]);
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
return hwrm_req_send(bp, req);
}
/* Caller holds bp->hwrm_cmd_lock mutex lock */
static void __bnxt_set_vf_params(struct bnxt *bp, int vf_id)
static int __bnxt_set_vf_params(struct bnxt *bp, int vf_id)
{
struct hwrm_func_cfg_input req = {0};
struct hwrm_func_cfg_input *req;
struct bnxt_vf_info *vf;
int rc;
rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
if (rc)
return rc;
vf = &bp->pf.vf[vf_id];
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
req.fid = cpu_to_le16(vf->fw_fid);
req->fid = cpu_to_le16(vf->fw_fid);
if (is_valid_ether_addr(vf->mac_addr)) {
req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
memcpy(req.dflt_mac_addr, vf->mac_addr, ETH_ALEN);
req->enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
memcpy(req->dflt_mac_addr, vf->mac_addr, ETH_ALEN);
}
if (vf->vlan) {
req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_VLAN);
req.dflt_vlan = cpu_to_le16(vf->vlan);
req->enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_VLAN);
req->dflt_vlan = cpu_to_le16(vf->vlan);
}
if (vf->max_tx_rate) {
req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_MAX_BW);
req.max_bw = cpu_to_le32(vf->max_tx_rate);
#ifdef HAVE_IFLA_TX_RATE
req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_MIN_BW);
req.min_bw = cpu_to_le32(vf->min_tx_rate);
#endif
req->enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_MAX_BW |
FUNC_CFG_REQ_ENABLES_MIN_BW);
req->max_bw = cpu_to_le32(vf->max_tx_rate);
req->min_bw = cpu_to_le32(vf->min_tx_rate);
}
if (vf->flags & BNXT_VF_TRUST)
req.flags |= cpu_to_le32(FUNC_CFG_REQ_FLAGS_TRUSTED_VF_ENABLE);
req->flags |= cpu_to_le32(FUNC_CFG_REQ_FLAGS_TRUSTED_VF_ENABLE);
_hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
return hwrm_req_send(bp, req);
}
/* Only called by PF to reserve resources for VFs, returns actual number of
......@@ -498,7 +523,7 @@ static void __bnxt_set_vf_params(struct bnxt *bp, int vf_id)
*/
static int bnxt_hwrm_func_vf_resc_cfg(struct bnxt *bp, int num_vfs, bool reset)
{
struct hwrm_func_vf_resource_cfg_input req = {0};
struct hwrm_func_vf_resource_cfg_input *req;
struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
u16 vf_tx_rings, vf_rx_rings, vf_cp_rings;
u16 vf_stat_ctx, vf_vnics, vf_ring_grps;
......@@ -507,7 +532,9 @@ static int bnxt_hwrm_func_vf_resc_cfg(struct bnxt *bp, int num_vfs, bool reset)
u16 vf_msix = 0;
u16 vf_rss;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_VF_RESOURCE_CFG, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_FUNC_VF_RESOURCE_CFG);
if (rc)
return rc;
if (bp->flags & BNXT_FLAG_CHIP_P5) {
vf_msix = hw_resc->max_nqs - bnxt_nq_rings_in_use(bp);
......@@ -526,21 +553,21 @@ static int bnxt_hwrm_func_vf_resc_cfg(struct bnxt *bp, int num_vfs, bool reset)
vf_vnics = min_t(u16, vf_vnics, vf_rx_rings);
vf_rss = hw_resc->max_rsscos_ctxs - bp->rsscos_nr_ctxs;
req.min_rsscos_ctx = cpu_to_le16(BNXT_VF_MIN_RSS_CTX);
req->min_rsscos_ctx = cpu_to_le16(BNXT_VF_MIN_RSS_CTX);
if (pf->vf_resv_strategy == BNXT_VF_RESV_STRATEGY_MINIMAL_STATIC) {
min = 0;
req.min_rsscos_ctx = cpu_to_le16(min);
req->min_rsscos_ctx = cpu_to_le16(min);
}
if (pf->vf_resv_strategy == BNXT_VF_RESV_STRATEGY_MINIMAL ||
pf->vf_resv_strategy == BNXT_VF_RESV_STRATEGY_MINIMAL_STATIC) {
req.min_cmpl_rings = cpu_to_le16(min);
req.min_tx_rings = cpu_to_le16(min);
req.min_rx_rings = cpu_to_le16(min);
req.min_l2_ctxs = cpu_to_le16(min);
req.min_vnics = cpu_to_le16(min);
req.min_stat_ctx = cpu_to_le16(min);
req->min_cmpl_rings = cpu_to_le16(min);
req->min_tx_rings = cpu_to_le16(min);
req->min_rx_rings = cpu_to_le16(min);
req->min_l2_ctxs = cpu_to_le16(min);
req->min_vnics = cpu_to_le16(min);
req->min_stat_ctx = cpu_to_le16(min);
if (!(bp->flags & BNXT_FLAG_CHIP_P5))
req.min_hw_ring_grps = cpu_to_le16(min);
req->min_hw_ring_grps = cpu_to_le16(min);
} else {
vf_cp_rings /= num_vfs;
vf_tx_rings /= num_vfs;
......@@ -550,56 +577,57 @@ static int bnxt_hwrm_func_vf_resc_cfg(struct bnxt *bp, int num_vfs, bool reset)
vf_ring_grps /= num_vfs;
vf_rss /= num_vfs;
req.min_cmpl_rings = cpu_to_le16(vf_cp_rings);
req.min_tx_rings = cpu_to_le16(vf_tx_rings);
req.min_rx_rings = cpu_to_le16(vf_rx_rings);
req.min_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX);
req.min_vnics = cpu_to_le16(vf_vnics);
req.min_stat_ctx = cpu_to_le16(vf_stat_ctx);
req.min_hw_ring_grps = cpu_to_le16(vf_ring_grps);
req.min_rsscos_ctx = cpu_to_le16(vf_rss);
req->min_cmpl_rings = cpu_to_le16(vf_cp_rings);
req->min_tx_rings = cpu_to_le16(vf_tx_rings);
req->min_rx_rings = cpu_to_le16(vf_rx_rings);
req->min_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX);
req->min_vnics = cpu_to_le16(vf_vnics);
req->min_stat_ctx = cpu_to_le16(vf_stat_ctx);
req->min_hw_ring_grps = cpu_to_le16(vf_ring_grps);
req->min_rsscos_ctx = cpu_to_le16(vf_rss);
}
req.max_cmpl_rings = cpu_to_le16(vf_cp_rings);
req.max_tx_rings = cpu_to_le16(vf_tx_rings);
req.max_rx_rings = cpu_to_le16(vf_rx_rings);
req.max_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX);
req.max_vnics = cpu_to_le16(vf_vnics);
req.max_stat_ctx = cpu_to_le16(vf_stat_ctx);
req.max_hw_ring_grps = cpu_to_le16(vf_ring_grps);
req.max_rsscos_ctx = cpu_to_le16(vf_rss);
req->max_cmpl_rings = cpu_to_le16(vf_cp_rings);
req->max_tx_rings = cpu_to_le16(vf_tx_rings);
req->max_rx_rings = cpu_to_le16(vf_rx_rings);
req->max_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX);
req->max_vnics = cpu_to_le16(vf_vnics);
req->max_stat_ctx = cpu_to_le16(vf_stat_ctx);
req->max_hw_ring_grps = cpu_to_le16(vf_ring_grps);
req->max_rsscos_ctx = cpu_to_le16(vf_rss);
if (bp->flags & BNXT_FLAG_CHIP_P5)
req.max_msix = cpu_to_le16(vf_msix / num_vfs);
req->max_msix = cpu_to_le16(vf_msix / num_vfs);
mutex_lock(&bp->hwrm_cmd_lock);
hwrm_req_hold(bp, req);
for (i = 0; i < num_vfs; i++) {
if (reset)
__bnxt_set_vf_params(bp, i);
req.vf_id = cpu_to_le16(pf->first_vf_id + i);
rc = _hwrm_send_message(bp, &req, sizeof(req),
HWRM_CMD_TIMEOUT);
req->vf_id = cpu_to_le16(pf->first_vf_id + i);
rc = hwrm_req_send(bp, req);
if (rc)
break;
pf->active_vfs = i + 1;
pf->vf[i].fw_fid = pf->first_vf_id + i;
}
mutex_unlock(&bp->hwrm_cmd_lock);
if (pf->active_vfs) {
u16 n = pf->active_vfs;
hw_resc->max_tx_rings -= le16_to_cpu(req.min_tx_rings) * n;
hw_resc->max_rx_rings -= le16_to_cpu(req.min_rx_rings) * n;
hw_resc->max_hw_ring_grps -= le16_to_cpu(req.min_hw_ring_grps) *
n;
hw_resc->max_cp_rings -= le16_to_cpu(req.min_cmpl_rings) * n;
hw_resc->max_rsscos_ctxs -= le16_to_cpu(req.min_rsscos_ctx) * n;
hw_resc->max_stat_ctxs -= le16_to_cpu(req.min_stat_ctx) * n;
hw_resc->max_vnics -= le16_to_cpu(req.min_vnics) * n;
hw_resc->max_tx_rings -= le16_to_cpu(req->min_tx_rings) * n;
hw_resc->max_rx_rings -= le16_to_cpu(req->min_rx_rings) * n;
hw_resc->max_hw_ring_grps -=
le16_to_cpu(req->min_hw_ring_grps) * n;
hw_resc->max_cp_rings -= le16_to_cpu(req->min_cmpl_rings) * n;
hw_resc->max_rsscos_ctxs -=
le16_to_cpu(req->min_rsscos_ctx) * n;
hw_resc->max_stat_ctxs -= le16_to_cpu(req->min_stat_ctx) * n;
hw_resc->max_vnics -= le16_to_cpu(req->min_vnics) * n;
if (bp->flags & BNXT_FLAG_CHIP_P5)
hw_resc->max_irqs -= vf_msix * n;
rc = pf->active_vfs;
}
hwrm_req_drop(bp, req);
return rc;
}
......@@ -608,15 +636,18 @@ static int bnxt_hwrm_func_vf_resc_cfg(struct bnxt *bp, int num_vfs, bool reset)
*/
static int bnxt_hwrm_func_cfg(struct bnxt *bp, int num_vfs)
{
u32 rc = 0, mtu, i;
u16 vf_tx_rings, vf_rx_rings, vf_cp_rings, vf_stat_ctx, vf_vnics;
struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
struct hwrm_func_cfg_input req = {0};
struct bnxt_pf_info *pf = &bp->pf;
struct hwrm_func_cfg_input *req;
int total_vf_tx_rings = 0;
u16 vf_ring_grps;
u32 mtu, i;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_FUNC_CFG);
if (rc)
return rc;
/* Remaining rings are distributed equally amongs VF's for now */
vf_cp_rings = bnxt_get_avail_cp_rings_for_en(bp) / num_vfs;
......@@ -632,50 +663,49 @@ static int bnxt_hwrm_func_cfg(struct bnxt *bp, int num_vfs)
vf_vnics = (hw_resc->max_vnics - bp->nr_vnics) / num_vfs;
vf_vnics = min_t(u16, vf_vnics, vf_rx_rings);
req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_ADMIN_MTU |
FUNC_CFG_REQ_ENABLES_MRU |
FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS |
FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS |
FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS |
FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS |
FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS |
FUNC_CFG_REQ_ENABLES_NUM_L2_CTXS |
FUNC_CFG_REQ_ENABLES_NUM_VNICS |
FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS);
req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_ADMIN_MTU |
FUNC_CFG_REQ_ENABLES_MRU |
FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS |
FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS |
FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS |
FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS |
FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS |
FUNC_CFG_REQ_ENABLES_NUM_L2_CTXS |
FUNC_CFG_REQ_ENABLES_NUM_VNICS |
FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS);
mtu = bp->dev->mtu + ETH_HLEN + VLAN_HLEN;
req.mru = cpu_to_le16(mtu);
req.admin_mtu = cpu_to_le16(mtu);
req->mru = cpu_to_le16(mtu);
req->admin_mtu = cpu_to_le16(mtu);
req.num_rsscos_ctxs = cpu_to_le16(1);
req.num_cmpl_rings = cpu_to_le16(vf_cp_rings);
req.num_tx_rings = cpu_to_le16(vf_tx_rings);
req.num_rx_rings = cpu_to_le16(vf_rx_rings);
req.num_hw_ring_grps = cpu_to_le16(vf_ring_grps);
req.num_l2_ctxs = cpu_to_le16(4);
req->num_rsscos_ctxs = cpu_to_le16(1);
req->num_cmpl_rings = cpu_to_le16(vf_cp_rings);
req->num_tx_rings = cpu_to_le16(vf_tx_rings);
req->num_rx_rings = cpu_to_le16(vf_rx_rings);
req->num_hw_ring_grps = cpu_to_le16(vf_ring_grps);
req->num_l2_ctxs = cpu_to_le16(4);
req.num_vnics = cpu_to_le16(vf_vnics);
req->num_vnics = cpu_to_le16(vf_vnics);
/* FIXME spec currently uses 1 bit for stats ctx */
req.num_stat_ctxs = cpu_to_le16(vf_stat_ctx);
req->num_stat_ctxs = cpu_to_le16(vf_stat_ctx);
mutex_lock(&bp->hwrm_cmd_lock);
hwrm_req_hold(bp, req);
for (i = 0; i < num_vfs; i++) {
int vf_tx_rsvd = vf_tx_rings;
req.fid = cpu_to_le16(pf->first_vf_id + i);
rc = _hwrm_send_message(bp, &req, sizeof(req),
HWRM_CMD_TIMEOUT);
req->fid = cpu_to_le16(pf->first_vf_id + i);
rc = hwrm_req_send(bp, req);
if (rc)
break;
pf->active_vfs = i + 1;
pf->vf[i].fw_fid = le16_to_cpu(req.fid);
pf->vf[i].fw_fid = le16_to_cpu(req->fid);
rc = __bnxt_hwrm_get_tx_rings(bp, pf->vf[i].fw_fid,
&vf_tx_rsvd);
if (rc)
break;
total_vf_tx_rings += vf_tx_rsvd;
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
if (pf->active_vfs) {
hw_resc->max_tx_rings -= total_vf_tx_rings;
hw_resc->max_rx_rings -= vf_rx_rings * num_vfs;
......@@ -893,23 +923,24 @@ static int bnxt_hwrm_fwd_resp(struct bnxt *bp, struct bnxt_vf_info *vf,
void *encap_resp, __le64 encap_resp_addr,
__le16 encap_resp_cpr, u32 msg_size)
{
int rc = 0;
struct hwrm_fwd_resp_input req = {0};
struct hwrm_fwd_resp_input *req;
int rc;
if (BNXT_FWD_RESP_SIZE_ERR(msg_size))
return -EINVAL;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FWD_RESP, -1, -1);
/* Set the new target id */
req.target_id = cpu_to_le16(vf->fw_fid);
req.encap_resp_target_id = cpu_to_le16(vf->fw_fid);
req.encap_resp_len = cpu_to_le16(msg_size);
req.encap_resp_addr = encap_resp_addr;
req.encap_resp_cmpl_ring = encap_resp_cpr;
memcpy(req.encap_resp, encap_resp, msg_size);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_FWD_RESP);
if (!rc) {
/* Set the new target id */
req->target_id = cpu_to_le16(vf->fw_fid);
req->encap_resp_target_id = cpu_to_le16(vf->fw_fid);
req->encap_resp_len = cpu_to_le16(msg_size);
req->encap_resp_addr = encap_resp_addr;
req->encap_resp_cmpl_ring = encap_resp_cpr;
memcpy(req->encap_resp, encap_resp, msg_size);
rc = hwrm_req_send(bp, req);
}
if (rc)
netdev_err(bp->dev, "hwrm_fwd_resp failed. rc:%d\n", rc);
return rc;
......@@ -918,19 +949,21 @@ static int bnxt_hwrm_fwd_resp(struct bnxt *bp, struct bnxt_vf_info *vf,
static int bnxt_hwrm_fwd_err_resp(struct bnxt *bp, struct bnxt_vf_info *vf,
u32 msg_size)
{
int rc = 0;
struct hwrm_reject_fwd_resp_input req = {0};
struct hwrm_reject_fwd_resp_input *req;
int rc;
if (BNXT_REJ_FWD_RESP_SIZE_ERR(msg_size))
return -EINVAL;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_REJECT_FWD_RESP, -1, -1);
/* Set the new target id */
req.target_id = cpu_to_le16(vf->fw_fid);
req.encap_resp_target_id = cpu_to_le16(vf->fw_fid);
memcpy(req.encap_request, vf->hwrm_cmd_req_addr, msg_size);
rc = hwrm_req_init(bp, req, HWRM_REJECT_FWD_RESP);
if (!rc) {
/* Set the new target id */
req->target_id = cpu_to_le16(vf->fw_fid);
req->encap_resp_target_id = cpu_to_le16(vf->fw_fid);
memcpy(req->encap_request, vf->hwrm_cmd_req_addr, msg_size);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_send(bp, req);
}
if (rc)
netdev_err(bp->dev, "hwrm_fwd_err_resp failed. rc:%d\n", rc);
return rc;
......@@ -939,19 +972,21 @@ static int bnxt_hwrm_fwd_err_resp(struct bnxt *bp, struct bnxt_vf_info *vf,
static int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, struct bnxt_vf_info *vf,
u32 msg_size)
{
int rc = 0;
struct hwrm_exec_fwd_resp_input req = {0};
struct hwrm_exec_fwd_resp_input *req;
int rc;
if (BNXT_EXEC_FWD_RESP_SIZE_ERR(msg_size))
return -EINVAL;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_EXEC_FWD_RESP, -1, -1);
/* Set the new target id */
req.target_id = cpu_to_le16(vf->fw_fid);
req.encap_resp_target_id = cpu_to_le16(vf->fw_fid);
memcpy(req.encap_request, vf->hwrm_cmd_req_addr, msg_size);
rc = hwrm_req_init(bp, req, HWRM_EXEC_FWD_RESP);
if (!rc) {
/* Set the new target id */
req->target_id = cpu_to_le16(vf->fw_fid);
req->encap_resp_target_id = cpu_to_le16(vf->fw_fid);
memcpy(req->encap_request, vf->hwrm_cmd_req_addr, msg_size);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_send(bp, req);
}
if (rc)
netdev_err(bp->dev, "hwrm_exec_fw_resp failed. rc:%d\n", rc);
return rc;
......@@ -1031,10 +1066,10 @@ static int bnxt_vf_set_link(struct bnxt *bp, struct bnxt_vf_info *vf)
phy_qcfg_req =
(struct hwrm_port_phy_qcfg_input *)vf->hwrm_cmd_req_addr;
mutex_lock(&bp->hwrm_cmd_lock);
mutex_lock(&bp->link_lock);
memcpy(&phy_qcfg_resp, &bp->link_info.phy_qcfg_resp,
sizeof(phy_qcfg_resp));
mutex_unlock(&bp->hwrm_cmd_lock);
mutex_unlock(&bp->link_lock);
phy_qcfg_resp.resp_len = cpu_to_le16(sizeof(phy_qcfg_resp));
phy_qcfg_resp.seq_id = phy_qcfg_req->seq_id;
phy_qcfg_resp.valid = 1;
......@@ -1118,7 +1153,7 @@ void bnxt_hwrm_exec_fwd_req(struct bnxt *bp)
int bnxt_approve_mac(struct bnxt *bp, u8 *mac, bool strict)
{
struct hwrm_func_vf_cfg_input req = {0};
struct hwrm_func_vf_cfg_input *req;
int rc = 0;
if (!BNXT_VF(bp))
......@@ -1129,10 +1164,16 @@ int bnxt_approve_mac(struct bnxt *bp, u8 *mac, bool strict)
rc = -EADDRNOTAVAIL;
goto mac_done;
}
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_VF_CFG, -1, -1);
req.enables = cpu_to_le32(FUNC_VF_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
memcpy(req.dflt_mac_addr, mac, ETH_ALEN);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_FUNC_VF_CFG);
if (rc)
goto mac_done;
req->enables = cpu_to_le32(FUNC_VF_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
memcpy(req->dflt_mac_addr, mac, ETH_ALEN);
if (!strict)
hwrm_req_flags(bp, req, BNXT_HWRM_CTX_SILENT);
rc = hwrm_req_send(bp, req);
mac_done:
if (rc && strict) {
rc = -EADDRNOTAVAIL;
......@@ -1145,15 +1186,17 @@ int bnxt_approve_mac(struct bnxt *bp, u8 *mac, bool strict)
void bnxt_update_vf_mac(struct bnxt *bp)
{
struct hwrm_func_qcaps_input req = {0};
struct hwrm_func_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_func_qcaps_output *resp;
struct hwrm_func_qcaps_input *req;
bool inform_pf = false;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_QCAPS, -1, -1);
req.fid = cpu_to_le16(0xffff);
if (hwrm_req_init(bp, req, HWRM_FUNC_QCAPS))
return;
req->fid = cpu_to_le16(0xffff);
mutex_lock(&bp->hwrm_cmd_lock);
if (_hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT))
resp = hwrm_req_hold(bp, req);
if (hwrm_req_send(bp, req))
goto update_vf_mac_exit;
/* Store MAC address from the firmware. There are 2 cases:
......@@ -1176,7 +1219,7 @@ void bnxt_update_vf_mac(struct bnxt *bp)
if (is_valid_ether_addr(bp->vf.mac_addr))
memcpy(bp->dev->dev_addr, bp->vf.mac_addr, ETH_ALEN);
update_vf_mac_exit:
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
if (inform_pf)
bnxt_approve_mac(bp, bp->dev->dev_addr, false);
}
......
drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c
View file @ 49f9df5b
......@@ -22,6 +22,7 @@
#include "bnxt_hsi.h"
#include "bnxt.h"
#include "bnxt_hwrm.h"
#include "bnxt_sriov.h"
#include "bnxt_tc.h"
#include "bnxt_vfr.h"
......@@ -502,16 +503,18 @@ static int bnxt_tc_parse_flow(struct bnxt *bp,
static int bnxt_hwrm_cfa_flow_free(struct bnxt *bp,
struct bnxt_tc_flow_node *flow_node)
{
struct hwrm_cfa_flow_free_input req = { 0 };
struct hwrm_cfa_flow_free_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_FLOW_FREE, -1, -1);
if (bp->fw_cap & BNXT_FW_CAP_OVS_64BIT_HANDLE)
req.ext_flow_handle = flow_node->ext_flow_handle;
else
req.flow_handle = flow_node->flow_handle;
rc = hwrm_req_init(bp, req, HWRM_CFA_FLOW_FREE);
if (!rc) {
if (bp->fw_cap & BNXT_FW_CAP_OVS_64BIT_HANDLE)
req->ext_flow_handle = flow_node->ext_flow_handle;
else
req->flow_handle = flow_node->flow_handle;
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_send(bp, req);
}
if (rc)
netdev_info(bp->dev, "%s: Error rc=%d\n", __func__, rc);
......@@ -587,20 +590,22 @@ static int bnxt_hwrm_cfa_flow_alloc(struct bnxt *bp, struct bnxt_tc_flow *flow,
struct bnxt_tc_actions *actions = &flow->actions;
struct bnxt_tc_l3_key *l3_mask = &flow->l3_mask;
struct bnxt_tc_l3_key *l3_key = &flow->l3_key;
struct hwrm_cfa_flow_alloc_input req = { 0 };
struct hwrm_cfa_flow_alloc_output *resp;
struct hwrm_cfa_flow_alloc_input *req;
u16 flow_flags = 0, action_flags = 0;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_FLOW_ALLOC, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_CFA_FLOW_ALLOC);
if (rc)
return rc;
req.src_fid = cpu_to_le16(flow->src_fid);
req.ref_flow_handle = ref_flow_handle;
req->src_fid = cpu_to_le16(flow->src_fid);
req->ref_flow_handle = ref_flow_handle;
if (actions->flags & BNXT_TC_ACTION_FLAG_L2_REWRITE) {
memcpy(req.l2_rewrite_dmac, actions->l2_rewrite_dmac,
memcpy(req->l2_rewrite_dmac, actions->l2_rewrite_dmac,
ETH_ALEN);
memcpy(req.l2_rewrite_smac, actions->l2_rewrite_smac,
memcpy(req->l2_rewrite_smac, actions->l2_rewrite_smac,
ETH_ALEN);
action_flags |=
CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_L2_HEADER_REWRITE;
......@@ -615,71 +620,71 @@ static int bnxt_hwrm_cfa_flow_alloc(struct bnxt *bp, struct bnxt_tc_flow *flow,
action_flags |=
CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_SRC;
/* L3 source rewrite */
req.nat_ip_address[0] =
req->nat_ip_address[0] =
actions->nat.l3.ipv4.saddr.s_addr;
/* L4 source port */
if (actions->nat.l4.ports.sport)
req.nat_port =
req->nat_port =
actions->nat.l4.ports.sport;
} else {
action_flags |=
CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_DEST;
/* L3 destination rewrite */
req.nat_ip_address[0] =
req->nat_ip_address[0] =
actions->nat.l3.ipv4.daddr.s_addr;
/* L4 destination port */
if (actions->nat.l4.ports.dport)
req.nat_port =
req->nat_port =
actions->nat.l4.ports.dport;
}
netdev_dbg(bp->dev,
"req.nat_ip_address: %pI4 src_xlate: %d req.nat_port: %x\n",
req.nat_ip_address, actions->nat.src_xlate,
req.nat_port);
"req->nat_ip_address: %pI4 src_xlate: %d req->nat_port: %x\n",
req->nat_ip_address, actions->nat.src_xlate,
req->nat_port);
} else {
if (actions->nat.src_xlate) {
action_flags |=
CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_SRC;
/* L3 source rewrite */
memcpy(req.nat_ip_address,
memcpy(req->nat_ip_address,
actions->nat.l3.ipv6.saddr.s6_addr32,
sizeof(req.nat_ip_address));
sizeof(req->nat_ip_address));
/* L4 source port */
if (actions->nat.l4.ports.sport)
req.nat_port =
req->nat_port =
actions->nat.l4.ports.sport;
} else {
action_flags |=
CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_DEST;
/* L3 destination rewrite */
memcpy(req.nat_ip_address,
memcpy(req->nat_ip_address,
actions->nat.l3.ipv6.daddr.s6_addr32,
sizeof(req.nat_ip_address));
sizeof(req->nat_ip_address));
/* L4 destination port */
if (actions->nat.l4.ports.dport)
req.nat_port =
req->nat_port =
actions->nat.l4.ports.dport;
}
netdev_dbg(bp->dev,
"req.nat_ip_address: %pI6 src_xlate: %d req.nat_port: %x\n",
req.nat_ip_address, actions->nat.src_xlate,
req.nat_port);
"req->nat_ip_address: %pI6 src_xlate: %d req->nat_port: %x\n",
req->nat_ip_address, actions->nat.src_xlate,
req->nat_port);
}
}
if (actions->flags & BNXT_TC_ACTION_FLAG_TUNNEL_DECAP ||
actions->flags & BNXT_TC_ACTION_FLAG_TUNNEL_ENCAP) {
req.tunnel_handle = tunnel_handle;
req->tunnel_handle = tunnel_handle;
flow_flags |= CFA_FLOW_ALLOC_REQ_FLAGS_TUNNEL;
action_flags |= CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_TUNNEL;
}
req.ethertype = flow->l2_key.ether_type;
req.ip_proto = flow->l4_key.ip_proto;
req->ethertype = flow->l2_key.ether_type;
req->ip_proto = flow->l4_key.ip_proto;
if (flow->flags & BNXT_TC_FLOW_FLAGS_ETH_ADDRS) {
memcpy(req.dmac, flow->l2_key.dmac, ETH_ALEN);
memcpy(req.smac, flow->l2_key.smac, ETH_ALEN);
memcpy(req->dmac, flow->l2_key.dmac, ETH_ALEN);
memcpy(req->smac, flow->l2_key.smac, ETH_ALEN);
}
if (flow->l2_key.num_vlans > 0) {
......@@ -688,7 +693,7 @@ static int bnxt_hwrm_cfa_flow_alloc(struct bnxt *bp, struct bnxt_tc_flow *flow,
* in outer_vlan_tci when num_vlans is 1 (which is
* always the case in TC.)
*/
req.outer_vlan_tci = flow->l2_key.inner_vlan_tci;
req->outer_vlan_tci = flow->l2_key.inner_vlan_tci;
}
/* If all IP and L4 fields are wildcarded then this is an L2 flow */
......@@ -701,68 +706,67 @@ static int bnxt_hwrm_cfa_flow_alloc(struct bnxt *bp, struct bnxt_tc_flow *flow,
CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_IPV6;
if (flow->flags & BNXT_TC_FLOW_FLAGS_IPV4_ADDRS) {
req.ip_dst[0] = l3_key->ipv4.daddr.s_addr;
req.ip_dst_mask_len =
req->ip_dst[0] = l3_key->ipv4.daddr.s_addr;
req->ip_dst_mask_len =
inet_mask_len(l3_mask->ipv4.daddr.s_addr);
req.ip_src[0] = l3_key->ipv4.saddr.s_addr;
req.ip_src_mask_len =
req->ip_src[0] = l3_key->ipv4.saddr.s_addr;
req->ip_src_mask_len =
inet_mask_len(l3_mask->ipv4.saddr.s_addr);
} else if (flow->flags & BNXT_TC_FLOW_FLAGS_IPV6_ADDRS) {
memcpy(req.ip_dst, l3_key->ipv6.daddr.s6_addr32,
sizeof(req.ip_dst));
req.ip_dst_mask_len =
memcpy(req->ip_dst, l3_key->ipv6.daddr.s6_addr32,
sizeof(req->ip_dst));
req->ip_dst_mask_len =
ipv6_mask_len(&l3_mask->ipv6.daddr);
memcpy(req.ip_src, l3_key->ipv6.saddr.s6_addr32,
sizeof(req.ip_src));
req.ip_src_mask_len =
memcpy(req->ip_src, l3_key->ipv6.saddr.s6_addr32,
sizeof(req->ip_src));
req->ip_src_mask_len =
ipv6_mask_len(&l3_mask->ipv6.saddr);
}
}
if (flow->flags & BNXT_TC_FLOW_FLAGS_PORTS) {
req.l4_src_port = flow->l4_key.ports.sport;
req.l4_src_port_mask = flow->l4_mask.ports.sport;
req.l4_dst_port = flow->l4_key.ports.dport;
req.l4_dst_port_mask = flow->l4_mask.ports.dport;
req->l4_src_port = flow->l4_key.ports.sport;
req->l4_src_port_mask = flow->l4_mask.ports.sport;
req->l4_dst_port = flow->l4_key.ports.dport;
req->l4_dst_port_mask = flow->l4_mask.ports.dport;
} else if (flow->flags & BNXT_TC_FLOW_FLAGS_ICMP) {
/* l4 ports serve as type/code when ip_proto is ICMP */
req.l4_src_port = htons(flow->l4_key.icmp.type);
req.l4_src_port_mask = htons(flow->l4_mask.icmp.type);
req.l4_dst_port = htons(flow->l4_key.icmp.code);
req.l4_dst_port_mask = htons(flow->l4_mask.icmp.code);
req->l4_src_port = htons(flow->l4_key.icmp.type);
req->l4_src_port_mask = htons(flow->l4_mask.icmp.type);
req->l4_dst_port = htons(flow->l4_key.icmp.code);
req->l4_dst_port_mask = htons(flow->l4_mask.icmp.code);
}
req.flags = cpu_to_le16(flow_flags);
req->flags = cpu_to_le16(flow_flags);
if (actions->flags & BNXT_TC_ACTION_FLAG_DROP) {
action_flags |= CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_DROP;
} else {
if (actions->flags & BNXT_TC_ACTION_FLAG_FWD) {
action_flags |= CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_FWD;
req.dst_fid = cpu_to_le16(actions->dst_fid);
req->dst_fid = cpu_to_le16(actions->dst_fid);
}
if (actions->flags & BNXT_TC_ACTION_FLAG_PUSH_VLAN) {
action_flags |=
CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_L2_HEADER_REWRITE;
req.l2_rewrite_vlan_tpid = actions->push_vlan_tpid;
req.l2_rewrite_vlan_tci = actions->push_vlan_tci;
memcpy(&req.l2_rewrite_dmac, &req.dmac, ETH_ALEN);
memcpy(&req.l2_rewrite_smac, &req.smac, ETH_ALEN);
req->l2_rewrite_vlan_tpid = actions->push_vlan_tpid;
req->l2_rewrite_vlan_tci = actions->push_vlan_tci;
memcpy(&req->l2_rewrite_dmac, &req->dmac, ETH_ALEN);
memcpy(&req->l2_rewrite_smac, &req->smac, ETH_ALEN);
}
if (actions->flags & BNXT_TC_ACTION_FLAG_POP_VLAN) {
action_flags |=
CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_L2_HEADER_REWRITE;
/* Rewrite config with tpid = 0 implies vlan pop */
req.l2_rewrite_vlan_tpid = 0;
memcpy(&req.l2_rewrite_dmac, &req.dmac, ETH_ALEN);
memcpy(&req.l2_rewrite_smac, &req.smac, ETH_ALEN);
req->l2_rewrite_vlan_tpid = 0;
memcpy(&req->l2_rewrite_dmac, &req->dmac, ETH_ALEN);
memcpy(&req->l2_rewrite_smac, &req->smac, ETH_ALEN);
}
}
req.action_flags = cpu_to_le16(action_flags);
req->action_flags = cpu_to_le16(action_flags);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send_silent(bp, req);
if (!rc) {
resp = bnxt_get_hwrm_resp_addr(bp, &req);
/* CFA_FLOW_ALLOC response interpretation:
* fw with fw with
* 16-bit 64-bit
......@@ -778,7 +782,7 @@ static int bnxt_hwrm_cfa_flow_alloc(struct bnxt *bp, struct bnxt_tc_flow *flow,
flow_node->flow_id = resp->flow_id;
}
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......@@ -788,67 +792,69 @@ static int hwrm_cfa_decap_filter_alloc(struct bnxt *bp,
__le32 ref_decap_handle,
__le32 *decap_filter_handle)
{
struct hwrm_cfa_decap_filter_alloc_input req = { 0 };
struct hwrm_cfa_decap_filter_alloc_output *resp;
struct ip_tunnel_key *tun_key = &flow->tun_key;
struct hwrm_cfa_decap_filter_alloc_input *req;
u32 enables = 0;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_DECAP_FILTER_ALLOC, -1, -1);
rc = hwrm_req_init(bp, req, HWRM_CFA_DECAP_FILTER_ALLOC);
if (rc)
goto exit;
req.flags = cpu_to_le32(CFA_DECAP_FILTER_ALLOC_REQ_FLAGS_OVS_TUNNEL);
req->flags = cpu_to_le32(CFA_DECAP_FILTER_ALLOC_REQ_FLAGS_OVS_TUNNEL);
enables |= CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_TUNNEL_TYPE |
CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_IP_PROTOCOL;
req.tunnel_type = CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
req.ip_protocol = CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_UDP;
req->tunnel_type = CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
req->ip_protocol = CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_UDP;
if (flow->flags & BNXT_TC_FLOW_FLAGS_TUNL_ID) {
enables |= CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_TUNNEL_ID;
/* tunnel_id is wrongly defined in hsi defn. as __le32 */
req.tunnel_id = tunnel_id_to_key32(tun_key->tun_id);
req->tunnel_id = tunnel_id_to_key32(tun_key->tun_id);
}
if (flow->flags & BNXT_TC_FLOW_FLAGS_TUNL_ETH_ADDRS) {
enables |= CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_MACADDR;
ether_addr_copy(req.dst_macaddr, l2_info->dmac);
ether_addr_copy(req->dst_macaddr, l2_info->dmac);
}
if (l2_info->num_vlans) {
enables |= CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_T_IVLAN_VID;
req.t_ivlan_vid = l2_info->inner_vlan_tci;
req->t_ivlan_vid = l2_info->inner_vlan_tci;
}
enables |= CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_ETHERTYPE;
req.ethertype = htons(ETH_P_IP);
req->ethertype = htons(ETH_P_IP);
if (flow->flags & BNXT_TC_FLOW_FLAGS_TUNL_IPV4_ADDRS) {
enables |= CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_SRC_IPADDR |
CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_IPADDR |
CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_IPADDR_TYPE;
req.ip_addr_type = CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV4;
req.dst_ipaddr[0] = tun_key->u.ipv4.dst;
req.src_ipaddr[0] = tun_key->u.ipv4.src;
req->ip_addr_type =
CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV4;
req->dst_ipaddr[0] = tun_key->u.ipv4.dst;
req->src_ipaddr[0] = tun_key->u.ipv4.src;
}
if (flow->flags & BNXT_TC_FLOW_FLAGS_TUNL_PORTS) {
enables |= CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_PORT;
req.dst_port = tun_key->tp_dst;
req->dst_port = tun_key->tp_dst;
}
/* Eventhough the decap_handle returned by hwrm_cfa_decap_filter_alloc
* is defined as __le32, l2_ctxt_ref_id is defined in HSI as __le16.
*/
req.l2_ctxt_ref_id = (__force __le16)ref_decap_handle;
req.enables = cpu_to_le32(enables);
req->l2_ctxt_ref_id = (__force __le16)ref_decap_handle;
req->enables = cpu_to_le32(enables);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
if (!rc) {
resp = bnxt_get_hwrm_resp_addr(bp, &req);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send_silent(bp, req);
if (!rc)
*decap_filter_handle = resp->decap_filter_id;
} else {
hwrm_req_drop(bp, req);
exit:
if (rc)
netdev_info(bp->dev, "%s: Error rc=%d\n", __func__, rc);
}
mutex_unlock(&bp->hwrm_cmd_lock);
return rc;
}
......@@ -856,13 +862,14 @@ static int hwrm_cfa_decap_filter_alloc(struct bnxt *bp,
static int hwrm_cfa_decap_filter_free(struct bnxt *bp,
__le32 decap_filter_handle)
{
struct hwrm_cfa_decap_filter_free_input req = { 0 };
struct hwrm_cfa_decap_filter_free_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_DECAP_FILTER_FREE, -1, -1);
req.decap_filter_id = decap_filter_handle;
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_CFA_DECAP_FILTER_FREE);
if (!rc) {
req->decap_filter_id = decap_filter_handle;
rc = hwrm_req_send(bp, req);
}
if (rc)
netdev_info(bp->dev, "%s: Error rc=%d\n", __func__, rc);
......@@ -874,18 +881,18 @@ static int hwrm_cfa_encap_record_alloc(struct bnxt *bp,
struct bnxt_tc_l2_key *l2_info,
__le32 *encap_record_handle)
{
struct hwrm_cfa_encap_record_alloc_input req = { 0 };
struct hwrm_cfa_encap_record_alloc_output *resp;
struct hwrm_cfa_encap_data_vxlan *encap =
(struct hwrm_cfa_encap_data_vxlan *)&req.encap_data;
struct hwrm_vxlan_ipv4_hdr *encap_ipv4 =
(struct hwrm_vxlan_ipv4_hdr *)encap->l3;
struct hwrm_cfa_encap_record_alloc_input *req;
struct hwrm_cfa_encap_data_vxlan *encap;
struct hwrm_vxlan_ipv4_hdr *encap_ipv4;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_ENCAP_RECORD_ALLOC, -1, -1);
req.encap_type = CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN;
rc = hwrm_req_init(bp, req, HWRM_CFA_ENCAP_RECORD_ALLOC);
if (rc)
goto exit;
encap = (struct hwrm_cfa_encap_data_vxlan *)&req->encap_data;
req->encap_type = CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN;
ether_addr_copy(encap->dst_mac_addr, l2_info->dmac);
ether_addr_copy(encap->src_mac_addr, l2_info->smac);
if (l2_info->num_vlans) {
......@@ -894,6 +901,7 @@ static int hwrm_cfa_encap_record_alloc(struct bnxt *bp,
encap->ovlan_tpid = l2_info->inner_vlan_tpid;
}
encap_ipv4 = (struct hwrm_vxlan_ipv4_hdr *)encap->l3;
encap_ipv4->ver_hlen = 4 << VXLAN_IPV4_HDR_VER_HLEN_VERSION_SFT;
encap_ipv4->ver_hlen |= 5 << VXLAN_IPV4_HDR_VER_HLEN_HEADER_LENGTH_SFT;
encap_ipv4->ttl = encap_key->ttl;
......@@ -905,15 +913,14 @@ static int hwrm_cfa_encap_record_alloc(struct bnxt *bp,
encap->dst_port = encap_key->tp_dst;
encap->vni = tunnel_id_to_key32(encap_key->tun_id);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
if (!rc) {
resp = bnxt_get_hwrm_resp_addr(bp, &req);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send_silent(bp, req);
if (!rc)
*encap_record_handle = resp->encap_record_id;
} else {
hwrm_req_drop(bp, req);
exit:
if (rc)
netdev_info(bp->dev, "%s: Error rc=%d\n", __func__, rc);
}
mutex_unlock(&bp->hwrm_cmd_lock);
return rc;
}
......@@ -921,13 +928,14 @@ static int hwrm_cfa_encap_record_alloc(struct bnxt *bp,
static int hwrm_cfa_encap_record_free(struct bnxt *bp,
__le32 encap_record_handle)
{
struct hwrm_cfa_encap_record_free_input req = { 0 };
struct hwrm_cfa_encap_record_free_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_ENCAP_RECORD_FREE, -1, -1);
req.encap_record_id = encap_record_handle;
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_CFA_ENCAP_RECORD_FREE);
if (!rc) {
req->encap_record_id = encap_record_handle;
rc = hwrm_req_send(bp, req);
}
if (rc)
netdev_info(bp->dev, "%s: Error rc=%d\n", __func__, rc);
......@@ -1673,14 +1681,20 @@ static int
bnxt_hwrm_cfa_flow_stats_get(struct bnxt *bp, int num_flows,
struct bnxt_tc_stats_batch stats_batch[])
{
struct hwrm_cfa_flow_stats_input req = { 0 };
struct hwrm_cfa_flow_stats_output *resp;
__le16 *req_flow_handles = &req.flow_handle_0;
__le32 *req_flow_ids = &req.flow_id_0;
struct hwrm_cfa_flow_stats_input *req;
__le16 *req_flow_handles;
__le32 *req_flow_ids;
int rc, i;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_FLOW_STATS, -1, -1);
req.num_flows = cpu_to_le16(num_flows);
rc = hwrm_req_init(bp, req, HWRM_CFA_FLOW_STATS);
if (rc)
goto exit;
req_flow_handles = &req->flow_handle_0;
req_flow_ids = &req->flow_id_0;
req->num_flows = cpu_to_le16(num_flows);
for (i = 0; i < num_flows; i++) {
struct bnxt_tc_flow_node *flow_node = stats_batch[i].flow_node;
......@@ -1688,13 +1702,12 @@ bnxt_hwrm_cfa_flow_stats_get(struct bnxt *bp, int num_flows,
&req_flow_handles[i], &req_flow_ids[i]);
}
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (!rc) {
__le64 *resp_packets;
__le64 *resp_bytes;
resp = bnxt_get_hwrm_resp_addr(bp, &req);
resp_packets = &resp->packet_0;
resp_bytes = &resp->byte_0;
......@@ -1704,10 +1717,11 @@ bnxt_hwrm_cfa_flow_stats_get(struct bnxt *bp, int num_flows,
stats_batch[i].hw_stats.bytes =
le64_to_cpu(resp_bytes[i]);
}
} else {
netdev_info(bp->dev, "error rc=%d\n", rc);
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
exit:
if (rc)
netdev_info(bp->dev, "error rc=%d\n", rc);
return rc;
}
......
drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c
View file @ 49f9df5b
......@@ -22,6 +22,7 @@
#include "bnxt_hsi.h"
#include "bnxt.h"
#include "bnxt_hwrm.h"
#include "bnxt_ulp.h"
static int bnxt_register_dev(struct bnxt_en_dev *edev, int ulp_id,
......@@ -237,27 +238,33 @@ static int bnxt_send_msg(struct bnxt_en_dev *edev, int ulp_id,
{
struct net_device *dev = edev->net;
struct bnxt *bp = netdev_priv(dev);
struct output *resp;
struct input *req;
u32 resp_len;
int rc;
if (ulp_id != BNXT_ROCE_ULP && bp->fw_reset_state)
return -EBUSY;
mutex_lock(&bp->hwrm_cmd_lock);
req = fw_msg->msg;
req->resp_addr = cpu_to_le64(bp->hwrm_cmd_resp_dma_addr);
rc = _hwrm_send_message(bp, fw_msg->msg, fw_msg->msg_len,
fw_msg->timeout);
if (!rc) {
struct output *resp = bp->hwrm_cmd_resp_addr;
u32 len = le16_to_cpu(resp->resp_len);
rc = hwrm_req_init(bp, req, 0 /* don't care */);
if (rc)
return rc;
if (fw_msg->resp_max_len < len)
len = fw_msg->resp_max_len;
rc = hwrm_req_replace(bp, req, fw_msg->msg, fw_msg->msg_len);
if (rc)
return rc;
memcpy(fw_msg->resp, resp, len);
hwrm_req_timeout(bp, req, fw_msg->timeout);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
resp_len = le16_to_cpu(resp->resp_len);
if (resp_len) {
if (fw_msg->resp_max_len < resp_len)
resp_len = fw_msg->resp_max_len;
memcpy(fw_msg->resp, resp, resp_len);
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......
drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c
View file @ 49f9df5b
......@@ -15,6 +15,7 @@
#include "bnxt_hsi.h"
#include "bnxt.h"
#include "bnxt_hwrm.h"
#include "bnxt_vfr.h"
#include "bnxt_devlink.h"
#include "bnxt_tc.h"
......@@ -27,38 +28,40 @@
static int hwrm_cfa_vfr_alloc(struct bnxt *bp, u16 vf_idx,
u16 *tx_cfa_action, u16 *rx_cfa_code)
{
struct hwrm_cfa_vfr_alloc_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_cfa_vfr_alloc_input req = { 0 };
struct hwrm_cfa_vfr_alloc_output *resp;
struct hwrm_cfa_vfr_alloc_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_VFR_ALLOC, -1, -1);
req.vf_id = cpu_to_le16(vf_idx);
sprintf(req.vfr_name, "vfr%d", vf_idx);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_CFA_VFR_ALLOC);
if (!rc) {
*tx_cfa_action = le16_to_cpu(resp->tx_cfa_action);
*rx_cfa_code = le16_to_cpu(resp->rx_cfa_code);
netdev_dbg(bp->dev, "tx_cfa_action=0x%x, rx_cfa_code=0x%x",
*tx_cfa_action, *rx_cfa_code);
} else {
netdev_info(bp->dev, "%s error rc=%d\n", __func__, rc);
req->vf_id = cpu_to_le16(vf_idx);
sprintf(req->vfr_name, "vfr%d", vf_idx);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (!rc) {
*tx_cfa_action = le16_to_cpu(resp->tx_cfa_action);
*rx_cfa_code = le16_to_cpu(resp->rx_cfa_code);
netdev_dbg(bp->dev, "tx_cfa_action=0x%x, rx_cfa_code=0x%x",
*tx_cfa_action, *rx_cfa_code);
}
hwrm_req_drop(bp, req);
}
mutex_unlock(&bp->hwrm_cmd_lock);
if (rc)
netdev_info(bp->dev, "%s error rc=%d\n", __func__, rc);
return rc;
}
static int hwrm_cfa_vfr_free(struct bnxt *bp, u16 vf_idx)
{
struct hwrm_cfa_vfr_free_input req = { 0 };
struct hwrm_cfa_vfr_free_input *req;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_VFR_FREE, -1, -1);
sprintf(req.vfr_name, "vfr%d", vf_idx);
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
rc = hwrm_req_init(bp, req, HWRM_CFA_VFR_FREE);
if (!rc) {
sprintf(req->vfr_name, "vfr%d", vf_idx);
rc = hwrm_req_send(bp, req);
}
if (rc)
netdev_info(bp->dev, "%s error rc=%d\n", __func__, rc);
return rc;
......@@ -67,17 +70,18 @@ static int hwrm_cfa_vfr_free(struct bnxt *bp, u16 vf_idx)
static int bnxt_hwrm_vfr_qcfg(struct bnxt *bp, struct bnxt_vf_rep *vf_rep,
u16 *max_mtu)
{
struct hwrm_func_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_func_qcfg_input req = {0};
struct hwrm_func_qcfg_output *resp;
struct hwrm_func_qcfg_input *req;
u16 mtu;
int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_QCFG, -1, -1);
req.fid = cpu_to_le16(bp->pf.vf[vf_rep->vf_idx].fw_fid);
mutex_lock(&bp->hwrm_cmd_lock);
rc = hwrm_req_init(bp, req, HWRM_FUNC_QCFG);
if (rc)
return rc;
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
req->fid = cpu_to_le16(bp->pf.vf[vf_rep->vf_idx].fw_fid);
resp = hwrm_req_hold(bp, req);
rc = hwrm_req_send(bp, req);
if (!rc) {
mtu = le16_to_cpu(resp->max_mtu_configured);
if (!mtu)
......@@ -85,7 +89,7 @@ static int bnxt_hwrm_vfr_qcfg(struct bnxt *bp, struct bnxt_vf_rep *vf_rep,
else
*max_mtu = mtu;
}
mutex_unlock(&bp->hwrm_cmd_lock);
hwrm_req_drop(bp, req);
return rc;
}
......
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