Commit 4a2d7882 authored by amy.shih's avatar amy.shih Committed by Guenter Roeck

hwmon: (nct7904) Fix incorrect temperature limitation register setting of LTD.

According to kernel hwmon sysfs-interface documentation, temperature
critical max value, typically greater than corresponding temp_max values.
Thus, reads the LTD_HV_HL (LTD HIGH VALUE HIGH LIMITATION) and LTD_LV_HL
(LTD LOW VALUE HIGH LIMITATION) for case hwmon_temp_crit and
hwmon_temp_crit_hyst. Reads the LTD_HV_LL (HIGH VALUE LOW LIMITATION)
and LTD_LV_LL (LOW VALUE LOW LIMITATION) for case hwmon_temp_max
and hwmon_temp_max_hyst.
Signed-off-by: default avataramy.shih <amy.shih@advantech.com.tw>
Link: https://lore.kernel.org/r/20850618155720.24857-1-Amy.Shih@advantech.com.twSigned-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
parent 7b1b68f0
...@@ -398,22 +398,22 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel, ...@@ -398,22 +398,22 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
} }
return 0; return 0;
case hwmon_temp_max: case hwmon_temp_max:
reg1 = LTD_HV_HL_REG; reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG; reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG; reg3 = DTS_T_CPU1_W_REG;
break; break;
case hwmon_temp_max_hyst: case hwmon_temp_max_hyst:
reg1 = LTD_LV_HL_REG; reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG; reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG; reg3 = DTS_T_CPU1_WH_REG;
break; break;
case hwmon_temp_crit: case hwmon_temp_crit:
reg1 = LTD_HV_LL_REG; reg1 = LTD_HV_HL_REG;
reg2 = TEMP_CH1_C_REG; reg2 = TEMP_CH1_C_REG;
reg3 = DTS_T_CPU1_C_REG; reg3 = DTS_T_CPU1_C_REG;
break; break;
case hwmon_temp_crit_hyst: case hwmon_temp_crit_hyst:
reg1 = LTD_LV_LL_REG; reg1 = LTD_LV_HL_REG;
reg2 = TEMP_CH1_CH_REG; reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG; reg3 = DTS_T_CPU1_CH_REG;
break; break;
...@@ -507,22 +507,22 @@ static int nct7904_write_temp(struct device *dev, u32 attr, int channel, ...@@ -507,22 +507,22 @@ static int nct7904_write_temp(struct device *dev, u32 attr, int channel,
switch (attr) { switch (attr) {
case hwmon_temp_max: case hwmon_temp_max:
reg1 = LTD_HV_HL_REG; reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG; reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG; reg3 = DTS_T_CPU1_W_REG;
break; break;
case hwmon_temp_max_hyst: case hwmon_temp_max_hyst:
reg1 = LTD_LV_HL_REG; reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG; reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG; reg3 = DTS_T_CPU1_WH_REG;
break; break;
case hwmon_temp_crit: case hwmon_temp_crit:
reg1 = LTD_HV_LL_REG; reg1 = LTD_HV_HL_REG;
reg2 = TEMP_CH1_C_REG; reg2 = TEMP_CH1_C_REG;
reg3 = DTS_T_CPU1_C_REG; reg3 = DTS_T_CPU1_C_REG;
break; break;
case hwmon_temp_crit_hyst: case hwmon_temp_crit_hyst:
reg1 = LTD_LV_LL_REG; reg1 = LTD_LV_HL_REG;
reg2 = TEMP_CH1_CH_REG; reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG; reg3 = DTS_T_CPU1_CH_REG;
break; break;
......
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