Commit 4b594b8d authored by David Francis's avatar David Francis Committed by Alex Deucher

drm/amd/display: Check for dmcu initialization before calling dmcu

[Why]
DMCU firmware is not required - the system is expected to run
fine without it.  Therefore, wherever dmcu functions could be
called, dmcu initialization shoudl be checked

[How]
Use the helpful hook dmcu_funcs->is_dmcu_initialized
Signed-off-by: default avatarDavid Francis <David.Francis@amd.com>
Reviewed-by: default avatarHersen Wu <hersenxs.wu@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8ce504b9
...@@ -2218,7 +2218,7 @@ bool dc_link_set_psr_enable(const struct dc_link *link, bool enable, bool wait) ...@@ -2218,7 +2218,7 @@ bool dc_link_set_psr_enable(const struct dc_link *link, bool enable, bool wait)
struct dc *core_dc = link->ctx->dc; struct dc *core_dc = link->ctx->dc;
struct dmcu *dmcu = core_dc->res_pool->dmcu; struct dmcu *dmcu = core_dc->res_pool->dmcu;
if (dmcu != NULL && link->psr_enabled) if ((dmcu != NULL && dmcu->funcs->is_dmcu_initialized(dmcu)) && link->psr_enabled)
dmcu->funcs->set_psr_enable(dmcu, enable, wait); dmcu->funcs->set_psr_enable(dmcu, enable, wait);
return true; return true;
......
...@@ -277,7 +277,8 @@ static int dce_set_clock( ...@@ -277,7 +277,8 @@ static int dce_set_clock(
if (requested_clk_khz == 0) if (requested_clk_khz == 0)
clk_mgr_dce->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL; clk_mgr_dce->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL;
dmcu->funcs->set_psr_wait_loop(dmcu, actual_clock / 1000 / 7); if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu))
dmcu->funcs->set_psr_wait_loop(dmcu, actual_clock / 1000 / 7);
return actual_clock; return actual_clock;
} }
...@@ -324,9 +325,11 @@ int dce112_set_clock(struct clk_mgr *clk_mgr, int requested_clk_khz) ...@@ -324,9 +325,11 @@ int dce112_set_clock(struct clk_mgr *clk_mgr, int requested_clk_khz)
bp->funcs->set_dce_clock(bp, &dce_clk_params); bp->funcs->set_dce_clock(bp, &dce_clk_params);
if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) {
if (clk_mgr_dce->dfs_bypass_disp_clk != actual_clock) if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {
dmcu->funcs->set_psr_wait_loop(dmcu, if (clk_mgr_dce->dfs_bypass_disp_clk != actual_clock)
actual_clock / 1000 / 7); dmcu->funcs->set_psr_wait_loop(dmcu,
actual_clock / 1000 / 7);
}
} }
clk_mgr_dce->dfs_bypass_disp_clk = actual_clock; clk_mgr_dce->dfs_bypass_disp_clk = actual_clock;
......
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