Commit 4d8c08c7 authored by Finn Thain's avatar Finn Thain Committed by Martin K. Petersen

ncr5380: Move NCR53C400-specific code

Move board-specific code like this,
	NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE);
from the core driver to the board driver. Eliminate the NCR53C400 macro
from the core driver. Removal of all macros like this one will be
necessary in order to have one core driver that can support all kinds of
boards.
Signed-off-by: default avatarFinn Thain <fthain@telegraphics.com.au>
Reviewed-by: default avatarHannes Reinecke <hare@suse.com>
Tested-by: default avatarOndrej Zary <linux@rainbow-software.org>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent b6488f97
......@@ -653,9 +653,6 @@ static void prepare_info(struct Scsi_Host *instance)
#endif
#ifdef UNSAFE
"UNSAFE "
#endif
#ifdef NCR53C400
"NCR53C400 "
#endif
"");
}
......@@ -782,15 +779,6 @@ static int NCR5380_init(struct Scsi_Host *instance, int flags)
if(in_interrupt())
printk(KERN_ERR "NCR5380_init called with interrupts off!\n");
/*
* On NCR53C400 boards, NCR5380 registers are mapped 8 past
* the base address.
*/
#ifdef NCR53C400
if (flags & FLAG_NCR53C400)
instance->io_port += NCR53C400_address_adjust;
#endif
hostdata->aborted = 0;
hostdata->id_mask = 1 << instance->this_id;
......@@ -824,12 +812,6 @@ static int NCR5380_init(struct Scsi_Host *instance, int flags)
NCR5380_write(MODE_REG, MR_BASE);
NCR5380_write(TARGET_COMMAND_REG, 0);
NCR5380_write(SELECT_ENABLE_REG, 0);
#ifdef NCR53C400
if (hostdata->flags & FLAG_NCR53C400) {
NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE);
}
#endif
return 0;
}
......
......@@ -64,9 +64,7 @@
#define AUTOPROBE_IRQ
#ifdef CONFIG_SCSI_GENERIC_NCR53C400
#define NCR53C400_PSEUDO_DMA 1
#define PSEUDO_DMA
#define NCR53C400
#endif
#include <asm/io.h>
......@@ -263,7 +261,7 @@ static int __init generic_NCR5380_detect(struct scsi_host_template *tpnt)
static unsigned int __initdata dtc_3181e_ports[] = {
0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
};
int flags = 0;
int flags;
struct Scsi_Host *instance;
#ifdef SCSI_G_NCR5380_MEM
unsigned long base;
......@@ -324,12 +322,15 @@ static int __init generic_NCR5380_detect(struct scsi_host_template *tpnt)
continue;
ports = NULL;
flags = 0;
switch (overrides[current_override].board) {
case BOARD_NCR5380:
flags = FLAG_NO_PSEUDO_DMA;
break;
case BOARD_NCR53C400:
#ifdef PSEUDO_DMA
flags = FLAG_NCR53C400;
#endif
break;
case BOARD_NCR53C400A:
flags = FLAG_NO_PSEUDO_DMA;
......@@ -415,6 +416,13 @@ static int __init generic_NCR5380_detect(struct scsi_host_template *tpnt)
#ifndef SCSI_G_NCR5380_MEM
instance->io_port = overrides[current_override].NCR5380_map_name;
instance->n_io_port = region_size;
/*
* On NCR53C400 boards, NCR5380 registers are mapped 8 past
* the base address.
*/
if (overrides[current_override].board == BOARD_NCR53C400)
instance->io_port += 8;
#else
instance->base = overrides[current_override].NCR5380_map_name;
((struct NCR5380_hostdata *)instance->hostdata)->iomem = iomem;
......@@ -422,6 +430,9 @@ static int __init generic_NCR5380_detect(struct scsi_host_template *tpnt)
NCR5380_init(instance, flags);
if (overrides[current_override].board == BOARD_NCR53C400)
NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE);
NCR5380_maybe_reset_bus(instance);
if (overrides[current_override].irq != IRQ_AUTO)
......@@ -506,7 +517,7 @@ generic_NCR5380_biosparam(struct scsi_device *sdev, struct block_device *bdev,
}
#endif
#ifdef NCR53C400_PSEUDO_DMA
#ifdef PSEUDO_DMA
/**
* NCR5380_pread - pseudo DMA read
......
......@@ -14,7 +14,7 @@
#ifndef GENERIC_NCR5380_H
#define GENERIC_NCR5380_H
#ifdef NCR53C400
#ifdef CONFIG_SCSI_GENERIC_NCR53C400
#define BIOSPARAM
#define NCR5380_BIOSPARAM generic_NCR5380_biosparam
#else
......@@ -37,9 +37,8 @@
#define NCR5380_map_type int
#define NCR5380_map_name port
#define NCR53C400_register_offset 0
#define NCR53C400_address_adjust 8
#ifdef NCR53C400
#ifdef CONFIG_SCSI_GENERIC_NCR53C400
#define NCR5380_region_size 16
#else
#define NCR5380_region_size 8
......@@ -58,7 +57,6 @@
#define NCR5380_map_type unsigned long
#define NCR5380_map_name base
#define NCR53C400_register_offset 0x108
#define NCR53C400_address_adjust 0
#define NCR53C400_mem_base 0x3880
#define NCR53C400_host_buffer 0x3900
#define NCR5380_region_size 0x3a00
......
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