Commit 4e411ee4 authored by Zhengjun Xing's avatar Zhengjun Xing Committed by Arnaldo Carvalho de Melo

perf vendor events intel: Add uncore event list for Sapphirerapids

Add JSON uncore events for Sapphirerapids to perf.

Based on JSON list v1.01:

https://download.01.org/perfmon/SPR/Signed-off-by: default avatarZhengjun Xing <zhengjun.xing@linux.intel.com>
Reviewed-by: default avatarKan Liang <kan.liang@linux.intel.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20220425132211.801228-2-zhengjun.xing@linux.intel.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 9061dffd
[
{
"BriefDescription": "IMC Clockticks at DCLK frequency",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x01",
"EventName": "UNC_M_CLOCKTICKS",
"PerPkg": "1",
"UMask": "0x0000000001",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "IMC Clockticks at HCLK frequency",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x01",
"EventName": "UNC_M_HCLOCKTICKS",
"PerPkg": "1",
"Unit": "iMC"
},
{
"BriefDescription": "All DRAM read CAS commands issued (does not include underfills)",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD_REG",
"PerPkg": "1",
"UMask": "0x00000000c1",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM underfill read CAS commands issued",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD_UNDERFILL",
"PerPkg": "1",
"UMask": "0x00000000c4",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "All DRAM read CAS commands issued (including underfills)",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD",
"PerPkg": "1",
"UMask": "0x00000000cf",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "All DRAM write CAS commands issued",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.WR",
"PerPkg": "1",
"UMask": "0x00000000f0",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Read Pending Queue Allocations",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x10",
"EventName": "UNC_M_RPQ_INSERTS.PCH0",
"PerPkg": "1",
"UMask": "0x0000000001",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Read Pending Queue Allocations",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x10",
"EventName": "UNC_M_RPQ_INSERTS.PCH1",
"PerPkg": "1",
"UMask": "0x0000000002",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Write Pending Queue Allocations",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x20",
"EventName": "UNC_M_WPQ_INSERTS.PCH0",
"PerPkg": "1",
"UMask": "0x0000000001",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Write Pending Queue Allocations",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x20",
"EventName": "UNC_M_WPQ_INSERTS.PCH1",
"PerPkg": "1",
"UMask": "0x0000000002",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Read Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x80",
"EventName": "UNC_M_RPQ_OCCUPANCY_PCH0",
"PerPkg": "1",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Read Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x81",
"EventName": "UNC_M_RPQ_OCCUPANCY_PCH1",
"PerPkg": "1",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Write Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x82",
"EventName": "UNC_M_WPQ_OCCUPANCY_PCH0",
"PerPkg": "1",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Write Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x83",
"EventName": "UNC_M_WPQ_OCCUPANCY_PCH1",
"PerPkg": "1",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Read Pending Queue occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xe0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH0",
"PerPkg": "1",
"UMask": "0x0000000001",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Read Pending Queue occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xe0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH1",
"PerPkg": "1",
"UMask": "0x0000000002",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Read Pending Queue inserts",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xe3",
"EventName": "UNC_M_PMM_RPQ_INSERTS",
"PerPkg": "1",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Write Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xe4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL",
"PerPkg": "1",
"UMask": "0x03",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Write Pending Queue inserts",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xe7",
"EventName": "UNC_M_PMM_WPQ_INSERTS",
"PerPkg": "1",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Write Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH0",
"PerPkg": "1",
"UMask": "0x0000000001",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Write Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH1",
"PerPkg": "1",
"UMask": "0x0000000002",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Activate due to read, write, underfill, or bypass",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x02",
"EventName": "UNC_M_ACT_COUNT.ALL",
"PerPkg": "1",
"UMask": "0x00000000ff",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Precharge due to read on page miss",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.RD",
"PerPkg": "1",
"UMask": "0x0000000011",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Precharge due to write on page miss",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.WR",
"PerPkg": "1",
"UMask": "0x0000000022",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands. : Precharge due to (?)",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.PGT",
"PerPkg": "1",
"UMask": "0x0000000088",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "Precharge due to read, write, underfill, or PGT",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.ALL",
"PerPkg": "1",
"UMask": "0x00000000ff",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "All DRAM CAS commands issued",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.ALL",
"PerPkg": "1",
"UMask": "0x00000000ff",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD_PRE_REG",
"PerPkg": "1",
"UMask": "0x00000000c2",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD_PRE_UNDERFILL",
"PerPkg": "1",
"UMask": "0x00000000c8",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.WR_PRE",
"PerPkg": "1",
"UMask": "0x00000000e0",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xe0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH0",
"PerPkg": "1",
"UMask": "0x0000000004",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xe0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH1",
"PerPkg": "1",
"UMask": "0x0000000008",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands. : Precharge due to read",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.RD_PCH0",
"PerPkg": "1",
"UMask": "0x0000000001",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands. : Precharge due to write",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.WR_PCH0",
"PerPkg": "1",
"UMask": "0x0000000002",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.UFILL_PCH0",
"PerPkg": "1",
"UMask": "0x0000000004",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands. : Prechages from Page Table",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.PGT_PCH0",
"PerPkg": "1",
"UMask": "0x0000000008",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.RD_PCH1",
"PerPkg": "1",
"UMask": "0x0000000010",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.WR_PCH1",
"PerPkg": "1",
"UMask": "0x0000000020",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.UFILL_PCH1",
"PerPkg": "1",
"UMask": "0x0000000040",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.PGT_PCH1",
"PerPkg": "1",
"UMask": "0x0000000080",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM Precharge commands",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.UFILL",
"PerPkg": "1",
"UMask": "0x0000000044",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.WR_NONPRE",
"PerPkg": "1",
"UMask": "0x00000000D0",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Channel 0",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.PCH0",
"PerPkg": "1",
"UMask": "0x0000000040",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Channel 1",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.PCH1",
"PerPkg": "1",
"UMask": "0x0000000080",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH0",
"PerPkg": "1",
"UMask": "0x0000000010",
"UMaskExt": "0x00000000",
"Unit": "iMC"
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH1",
"PerPkg": "1",
"UMask": "0x0000000020",
"UMaskExt": "0x00000000",
"Unit": "iMC"
}
]
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[
{
"BriefDescription": "PCU PCLK Clockticks",
"Counter": "0,1,2,3",
"CounterType": "PGMABLE",
"EventCode": "0x01",
"EventName": "UNC_P_CLOCKTICKS",
"PerPkg": "1",
"UMaskExt": "0x00000000",
"Unit": "PCU"
}
]
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