Commit 4e748b1b authored by Sean Anderson's avatar Sean Anderson Committed by David S. Miller

arm64: dts: layerscape: Add nodes for QSGMII PCSs

Now that we actually read registers from QSGMII PCSs, it's important
that we have the correct address (instead of hoping that we're the MAC
with all the QSGMII PCSs on its bus). This adds nodes for the QSGMII
PCSs.  The exact mapping of QSGMII to MACs depends on the SoC.

Since the first QSGMII PCSs share an address with the SGMII and XFI
PCSs, we only add new nodes for PCSs 2-4. This avoids address conflicts
on the bus.
Signed-off-by: default avatarSean Anderson <sean.anderson@seco.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4e31b808
......@@ -24,9 +24,12 @@ &fman0 {
/* these aliases provide the FMan ports mapping */
enet0: ethernet@e0000 {
pcs-handle-names = "qsgmii";
};
enet1: ethernet@e2000 {
pcsphy-handle = <&pcsphy1>, <&qsgmiib_pcs1>;
pcs-handle-names = "sgmii", "qsgmii";
};
enet2: ethernet@e4000 {
......@@ -36,11 +39,32 @@ enet3: ethernet@e6000 {
};
enet4: ethernet@e8000 {
pcsphy-handle = <&pcsphy4>, <&qsgmiib_pcs2>;
pcs-handle-names = "sgmii", "qsgmii";
};
enet5: ethernet@ea000 {
pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs3>;
pcs-handle-names = "sgmii", "qsgmii";
};
enet6: ethernet@f0000 {
};
mdio@e1000 {
qsgmiib_pcs1: ethernet-pcs@1 {
compatible = "fsl,lynx-pcs";
reg = <0x1>;
};
qsgmiib_pcs2: ethernet-pcs@2 {
compatible = "fsl,lynx-pcs";
reg = <0x2>;
};
qsgmiib_pcs3: ethernet-pcs@3 {
compatible = "fsl,lynx-pcs";
reg = <0x3>;
};
};
};
......@@ -23,6 +23,8 @@ &soc {
&fman0 {
/* these aliases provide the FMan ports mapping */
enet0: ethernet@e0000 {
pcsphy-handle = <&qsgmiib_pcs3>;
pcs-handle-names = "qsgmii";
};
enet1: ethernet@e2000 {
......@@ -35,14 +37,37 @@ enet3: ethernet@e6000 {
};
enet4: ethernet@e8000 {
pcsphy-handle = <&pcsphy4>, <&qsgmiib_pcs1>;
pcs-handle-names = "sgmii", "qsgmii";
};
enet5: ethernet@ea000 {
pcsphy-handle = <&pcsphy5>, <&pcsphy5>;
pcs-handle-names = "sgmii", "qsgmii";
};
enet6: ethernet@f0000 {
};
enet7: ethernet@f2000 {
pcsphy-handle = <&pcsphy7>, <&qsgmiib_pcs2>, <&pcsphy7>;
pcs-handle-names = "sgmii", "qsgmii", "xfi";
};
mdio@eb000 {
qsgmiib_pcs1: ethernet-pcs@1 {
compatible = "fsl,lynx-pcs";
reg = <0x1>;
};
qsgmiib_pcs2: ethernet-pcs@2 {
compatible = "fsl,lynx-pcs";
reg = <0x2>;
};
qsgmiib_pcs3: ethernet-pcs@3 {
compatible = "fsl,lynx-pcs";
reg = <0x3>;
};
};
};
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