Commit 4f74c398 authored by Tadeusz Struk's avatar Tadeusz Struk Committed by Herbert Xu

crypto: qat - Fixed SKU1 dev issue

Fix for issue with SKU1 device.
SKU1 device has 8 micro engines as opposed to 12 in other SKUs
so it was not possible to start the non-existing micro engines.
Signed-off-by: default avatarBo Cui <bo.cui@intel.com>
Signed-off-by: default avatarTadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent d9a44abf
...@@ -256,10 +256,6 @@ static int qat_uclo_fetch_initmem_ae(struct icp_qat_fw_loader_handle *handle, ...@@ -256,10 +256,6 @@ static int qat_uclo_fetch_initmem_ae(struct icp_qat_fw_loader_handle *handle,
pr_err("QAT: Parse num for AE number failed\n"); pr_err("QAT: Parse num for AE number failed\n");
return -EINVAL; return -EINVAL;
} }
if (!test_bit(*ae, (unsigned long *)&handle->hal_handle->ae_mask)) {
pr_err("QAT: ae %d to be init is fused off\n", *ae);
return -EINVAL;
}
if (*ae >= ICP_QAT_UCLO_MAX_AE) { if (*ae >= ICP_QAT_UCLO_MAX_AE) {
pr_err("QAT: ae %d out of range\n", *ae); pr_err("QAT: ae %d out of range\n", *ae);
return -EINVAL; return -EINVAL;
...@@ -456,7 +452,7 @@ static int qat_uclo_init_memory(struct icp_qat_fw_loader_handle *handle) ...@@ -456,7 +452,7 @@ static int qat_uclo_init_memory(struct icp_qat_fw_loader_handle *handle)
(sizeof(struct icp_qat_uof_memvar_attr) * (sizeof(struct icp_qat_uof_memvar_attr) *
initmem->val_attr_num)); initmem->val_attr_num));
} }
for (ae = 0; ae < ICP_QAT_UCLO_MAX_AE; ae++) { for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
if (qat_hal_batch_wr_lm(handle, ae, if (qat_hal_batch_wr_lm(handle, ae,
obj_handle->lm_init_tab[ae])) { obj_handle->lm_init_tab[ae])) {
pr_err("QAT: fail to batch init lmem for AE %d\n", ae); pr_err("QAT: fail to batch init lmem for AE %d\n", ae);
......
...@@ -59,7 +59,7 @@ ...@@ -59,7 +59,7 @@
#define ADF_DH895XCC_FUSECTL_SKU_4 0x3 #define ADF_DH895XCC_FUSECTL_SKU_4 0x3
#define ADF_DH895XCC_MAX_ACCELERATORS 6 #define ADF_DH895XCC_MAX_ACCELERATORS 6
#define ADF_DH895XCC_MAX_ACCELENGINES 12 #define ADF_DH895XCC_MAX_ACCELENGINES 12
#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 18 #define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 13
#define ADF_DH895XCC_ACCELERATORS_MASK 0x3F #define ADF_DH895XCC_ACCELERATORS_MASK 0x3F
#define ADF_DH895XCC_ACCELENGINES_MASK 0xFFF #define ADF_DH895XCC_ACCELENGINES_MASK 0xFFF
#define ADF_DH895XCC_LEGFUSE_OFFSET 0x4C #define ADF_DH895XCC_LEGFUSE_OFFSET 0x4C
......
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